[Build] fix issue when GC_DEV_LINK_LLVM_DYLIB is ON (#328)

Author: xurui1995

lib/gc/Transforms/CMakeLists.txt

@@ -3,7 +3,6 @@ add_subdirectory(Utils)
 gc_set_mlir_link_components(MLIR_LINK_COMPONENTS
   MLIRIR
   MLIRSupport
-  MLIRMicrokernelTransforms
   MLIRBufferizationToMemRef
   MLIRBufferizationPipelines)
 
@@ -37,6 +36,7 @@ gc_add_mlir_library(GcPasses
     ${MLIR_LINK_COMPONENTS}
     ${GC_ONEDNN_DIALECT_LIB_NAME}
     GcInterface
+    MLIRMicrokernelTransforms
   )
 
 if(GC_ENABLE_IMEX)

lib/gc/Transforms/Microkernel/CMakeLists.txt

@@ -1,8 +1,8 @@
-gc_set_mlir_link_components(MLIR_LINK_COMPONENTS MLIRIR MLIRMicrokernel)
+gc_set_mlir_link_components(MLIR_LINK_COMPONENTS MLIRIR)
 
 include(onednn)
 
-gc_add_mlir_dialect_library(MLIRMicrokernelTransforms
+gc_add_mlir_library(MLIRMicrokernelTransforms
 	ConvertLinalgToMicrokernel.cpp
         ExpandMicrokernel.cpp
         ConvertMicrokernelToDnnlFunc.cpp
@@ -20,6 +20,7 @@ gc_add_mlir_dialect_library(MLIRMicrokernelTransforms
         ${MLIR_LINK_COMPONENTS}
         GcInterface 
 	GcUtilsIR
+        MLIRMicrokernel
         )
 
 get_property(GC_DNNL_INCLUDES GLOBAL PROPERTY GC_DNNL_INCLUDES)

test/benchgc/src/benchgc/mlir/util.py

@@ -195,7 +195,6 @@ def attach_dlti(flags: argparse.Namespace, module: ir.Module):
             #dlti.dl_entry<"max_vector_width", {max_vector_width} : i64>>
         >}} {{}}
     """
-    print(dlti_template)
     with module.context:
         template_module = ir.Module.parse(dlti_template)
         module.operation.attributes["dlti.target_system_spec"] = (