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DianaChenigcbot
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Translate pre-Xe_PVC PredCtrl value to Xe_PVC's when possible
Xe_PVC has removed predCtrl width. Only .any, .all and .seq (default) are supported. Try to translate PredCtrl values to compatible ones in Xe_PVC+ at BinaryEncodingIGA. - When the execution size matches predCtrl's group size, .all or .any is equal to .all*h or .any*h. For example, when exec_size=2, then .all2h in pre-PVC is equal to .all in PVC - No vertical combination is available in PVC. .anyv and .allv are no longer represent-able. Assert at the cases.
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visa/BinaryEncodingIGA.cpp

Lines changed: 46 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -76,7 +76,7 @@ class BinaryEncodingIGA
7676
const G4_INST *inst, const Model *m, bool allowUnknownOp, const IR_Builder& builder);
7777
private:
7878
static PredCtrl getIGAPredCtrl(G4_Predicate_Control g4PredCntrl);
79-
static Predication getIGAPredication(G4_Predicate* predG4);
79+
static Predication getIGAPredication(const G4_Predicate* predG4, G4_ExecSize execSize, const IR_Builder& builder);
8080
static BranchCntrl getIGABranchCntrl(bool isOn)
8181
{
8282
return isOn ? BranchCntrl::ON : BranchCntrl::OFF;
@@ -818,7 +818,7 @@ void BinaryEncodingIGA::getIGAFlagInfo(
818818

819819
if (opSpec->supportsPredication() && predG4 != nullptr)
820820
{
821-
pred = getIGAPredication(predG4);
821+
pred = getIGAPredication(predG4, inst->getExecSize(), *kernel.fg.builder);
822822
predFlag = getIGAFlagReg(predG4->getBase());
823823
flagReg = predFlag;
824824
hasPredFlag = true;
@@ -1772,12 +1772,54 @@ PredCtrl BinaryEncodingIGA::getIGAPredCtrl(G4_Predicate_Control g4PrCtl)
17721772
}
17731773
}
17741774

1775-
Predication BinaryEncodingIGA::getIGAPredication(G4_Predicate* predG4)
1775+
Predication BinaryEncodingIGA::getIGAPredication(const G4_Predicate* predG4,
1776+
G4_ExecSize execSize, const IR_Builder& builder)
17761777
{
1778+
// Xe_PVC+ has removed predCtrl width. Only .any, .all and .seq (default) are supported.
1779+
// Try to translate PredCtrl values to compatible ones on Xe_PVC+
1780+
// Return true on success, false on fail
1781+
auto translatePredCtrl = [&](G4_Predicate_Control& predCtrl) {
1782+
if (builder.predCtrlHasWidth())
1783+
return true;
1784+
if (predCtrl == PRED_ANY_WHOLE || predCtrl == PRED_ALL_WHOLE || predCtrl == PRED_DEFAULT)
1785+
return true;
1786+
// .any*h/.all*h (pre-pvc) is equal to .any/.all (pvc+) only when the instruction execSize
1787+
// match the predCtrl group size
1788+
if (execSize != predG4->getPredCtrlGroupSize())
1789+
return false;
1790+
1791+
// translate to equivalent .any or .all whenever possible
1792+
switch (predCtrl)
1793+
{
1794+
case PRED_ANY2H:
1795+
case PRED_ANY4H:
1796+
case PRED_ANY8H:
1797+
case PRED_ANY16H:
1798+
case PRED_ANY32H:
1799+
predCtrl = PRED_ANY_WHOLE;
1800+
break;
1801+
case PRED_ALL2H:
1802+
case PRED_ALL4H:
1803+
case PRED_ALL8H:
1804+
case PRED_ALL16H:
1805+
case PRED_ALL32H:
1806+
predCtrl = PRED_ALL_WHOLE;
1807+
break;
1808+
default:
1809+
// PRED_ANY_WHOLE, PRED_ALL_WHOLE, PRED_DEFAULT are handled above
1810+
// PRED_ANYV, PRED_ALLV are not supported
1811+
return false;
1812+
}
1813+
return true;
1814+
};
1815+
17771816
Predication pred;
17781817
if (predG4)
17791818
{
1780-
pred.function = getIGAPredCtrl(predG4->getControl());
1819+
G4_Predicate_Control g4PrCtl = predG4->getControl();
1820+
ASSERT_USER(translatePredCtrl(g4PrCtl), "illegal predicate control");
1821+
1822+
pred.function = getIGAPredCtrl(g4PrCtl);
17811823
pred.inverse = predG4->getState() != PredState_Plus;
17821824
}
17831825
return pred;

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