IIGC and vISA refactors

This commit contains mostly refactors and few minor fixes.
Refactors related to passing arguments through
references and rule of three.
Fixes `,` omission in `visa/G4_IR.cpp`.

Author: fda0

IGC/AdaptorOCL/SPIRV/SPIRVInternal.h

@@ -927,7 +927,7 @@ void decorateSPIRVExtInst(std::string &S, std::vector<Type*> ArgTypes);
 bool isFunctionBuiltin(llvm::Function* F);
 
 /// Get a canonical function name for a SPIR-V op code.
-std::string getSPIRVBuiltinName(Op OC, SPIRVInstruction *BI, std::vector<Type*> ArgTypes, std::string suffix);
+std::string getSPIRVBuiltinName(Op OC, SPIRVInstruction *BI, std::vector<Type*> ArgTypes, const std::string& suffix);
 
 /// Mutates function call instruction by changing the arguments.
 /// \param ArgMutate mutates the function arguments.

IGC/AdaptorOCL/SPIRV/SPIRVReader.cpp

@@ -4604,7 +4604,7 @@ SPIRVToLLVM::transAddressingModel() {
 
 static llvm::MDNode*
 transDecorationsToMetadataList(llvm::LLVMContext* Context,
-    std::vector<SPIRVDecorate const*> Decorates) {
+    const std::vector<SPIRVDecorate const*>& Decorates) {
     SmallVector<Metadata*, 4> MDs;
     MDs.reserve(Decorates.size());
     for (const auto* Deco : Decorates) {
@@ -4783,7 +4783,7 @@ static void convertAnnotaionsToAttributes(llvm::Function *F, const std::vector<s
                     ::isspace),
                 numThreadPerEU.end());
 
-            F->addFnAttr("num-thread-per-eu", numThreadPerEU == "auto" ? "0" : numThreadPerEU);
+            F->addFnAttr("num-thread-per-eu", numThreadPerEU == "auto" ? "0" : std::move(numThreadPerEU));
         }
     }
 }

IGC/AdaptorOCL/SPIRV/SPIRVUtil.cpp

@@ -274,7 +274,7 @@ isFunctionBuiltin(llvm::Function* F) {
 }
 
 std::string
-getSPIRVBuiltinName(Op OC, SPIRVInstruction *BI, std::vector<Type*> ArgTypes, std::string suffix) {
+getSPIRVBuiltinName(Op OC, SPIRVInstruction *BI, std::vector<Type*> ArgTypes, const std::string& suffix) {
   std::string name = OCLSPIRVBuiltinMap::map(OC);
 
   if (!name.empty()) {

IGC/Compiler/CISACodeGen/CVariable.hpp

@@ -205,6 +205,8 @@ namespace IGC {
         {
         }
 
+        CVariable& operator=(const CVariable&) = delete;
+
         e_alignment GetAlign() const
         {
             IGC_ASSERT_MESSAGE(!m_isImmediate, "Calling GetAlign() on an immediate returns undefined result");

IGC/Compiler/CISACodeGen/CheckInstrTypes.hpp

@@ -25,7 +25,7 @@ namespace IGC
 
     class CheckInstrTypes : public llvm::FunctionPass, public llvm::InstVisitor<CheckInstrTypes>
     {
-        llvm::LoopInfo* LI;
+        llvm::LoopInfo* LI = nullptr;
 
     public:
         static char ID;

IGC/Compiler/CISACodeGen/CodeSinking.cpp

@@ -1702,7 +1702,7 @@ namespace IGC {
             if (j == je) {
                 // No match found, create the new one.
                 OperandUseGroup &OUG = AllGroups[i];
-                OUG.Operands = theUses;
+                OUG.Operands = std::move(theUses);
                 OUG.Users.push_back(I);
                 InstUseInfo.push_back(&OUG);
             }

IGC/Compiler/CISACodeGen/EmitVISAPass.cpp

@@ -21025,14 +21025,11 @@ LSC_CACHE_OPTS EmitPass::translateLSCCacheControlsFromMetadata(
                 return cacheOpts;
             }
 
-            if (inst)
+            const MDNode* node = inst ? inst->getMetadata("lsc.cache.ctrl") : nullptr;
+            if (node)
             {
-                const MDNode* node = inst ? inst->getMetadata("lsc.cache.ctrl") : nullptr;
-                if (node)
-                {
-                    ConstantAsMetadata* MD = cast<ConstantAsMetadata>(node->getOperand(0));
-                    cacheOpts = translateLSCCacheControlsFromValue(MD->getValue(), isLoad);
-                }
+                ConstantAsMetadata* MD = cast<ConstantAsMetadata>(node->getOperand(0));
+                cacheOpts = translateLSCCacheControlsFromValue(MD->getValue(), isLoad);
             }
         }
 

IGC/Compiler/CISACodeGen/GenIRLowering.cpp

@@ -513,7 +513,7 @@ bool GEPLowering::simplifyGEP(BasicBlock &BB) const {
         Exprs.emplace_back(PointerExpr{GEP, E, BaseWithMinDiff, Offset});
     }
     std::vector<Instruction *> DeadInsts;
-    for (auto B : Pointers) {
+    for (const auto& B : Pointers) {
         for (auto PI = B.second.rbegin(),
                   PE = B.second.rend(); PI != PE; ++PI) {
             auto &P = *PI;

IGC/Compiler/CISACodeGen/LowerGEPForPrivMem.cpp

@@ -351,7 +351,7 @@ StatusPrivArr2Reg LowerGEPForPrivMem::CheckIfAllocaPromotable(llvm::AllocaInst*
         // subtract impact from GEP operations related to alloca from the register pressure
         // since after promotion alloca to register these GEPs will be eliminated
         unsigned int GEPImpact = 0;
-        for (auto GEPinst : GEPliveranges)
+        for (const auto& GEPinst : GEPliveranges)
         {
             if (GEPinst.LR->contains(i))
                 GEPImpact += GEPinst.varSize;
@@ -361,7 +361,7 @@ StatusPrivArr2Reg LowerGEPForPrivMem::CheckIfAllocaPromotable(llvm::AllocaInst*
         pressure = std::max(pressure, RPinst - GEPImpact);
     }
 
-    for (auto it : m_promotedLiveranges)
+    for (const auto& it : m_promotedLiveranges)
     {
         // check interval intersection
         if ((it.lowId < lowestAssignedNumber && it.highId > lowestAssignedNumber) ||

IGC/Compiler/CISACodeGen/MemOpt.cpp

@@ -692,7 +692,7 @@ bool MemOpt::removeRedBlockRead(GenIntrinsicInst* LeadingBlockRead,
     Value* subgroupLocalInvocationId = nullptr;
 
     //Go through the collected blockreads to replace them with shuffles
-    for (auto ITuple : BlockReadToRemove) {
+    for (const auto& ITuple : BlockReadToRemove) {
         Instruction* I = std::get<0>(ITuple);
 
         if (BlockReadToOptimize != I) {
@@ -4686,7 +4686,7 @@ void LdStCombine::createCombinedStores(Function& F)
         //     1. set nontemporal if any merged store has it (make sense?)
         SmallVector<std::pair<unsigned, llvm::MDNode*>, 4> MDs;
         leadStore->getAllMetadata(MDs);
-        for (auto MII : MDs) {
+        for (const auto& MII : MDs) {
             finalStore->setMetadata(MII.first, MII.second);
         }
 

IGC/Compiler/CISACodeGen/OpenCLKernelCodeGen.cpp

@@ -258,15 +258,15 @@ namespace IGC
 
             //check if option is set to use certain GRF size
             auto FuncName = pFunc->getName().str();
-            for (auto SubNameR : ctx->m_Options.RegularGRFKernels)
+            for (const auto& SubNameR : ctx->m_Options.RegularGRFKernels)
             {
                 if (FuncName.find(SubNameR) != std::string::npos)
                 {
                     m_regularGRFRequested = true;
                     break;
                 }
             }
-            for (auto SubNameL : ctx->m_Options.LargeGRFKernels)
+            for (const auto& SubNameL : ctx->m_Options.LargeGRFKernels)
             {
                 if (FuncName.find(SubNameL) != std::string::npos)
                 {

IGC/Compiler/CISACodeGen/OpenCLKernelCodeGen.hpp

@@ -77,7 +77,7 @@ namespace IGC
 
 
             // Logic for native ZEBin support
-            auto supportsZEBin = [&](CPlatform platformInfo)
+            auto supportsZEBin = [&](const CPlatform& platformInfo)
             {
                 switch (platformInfo.GetProductFamily())
                 {

IGC/Compiler/CISACodeGen/PruneUnusedArguments.cpp

@@ -95,7 +95,7 @@ bool PruneUnusedArguments::runOnModule(Module& M) {
                 CallInst* CI = dyn_cast<CallInst>(U);
                 if (!CI)
                     continue;
-                for (auto Item : UnusedArgs) {
+                for (const auto& Item : UnusedArgs) {
                     auto Arg = Item.first;
                     auto Index = Item.second;
                     if (!isa<UndefValue>(CI->getArgOperand(Index))) {

IGC/Compiler/CISACodeGen/PushAnalysis.cpp

@@ -456,7 +456,7 @@ namespace IGC
         PushInfo& pushInfo = m_context->getModuleMetaData()->pushInfo;
 
         // then check for static flag so that we can do push safely
-        for (auto it : pushInfo.pushableAddresses)
+        for (const auto& it : pushInfo.pushableAddresses)
         {
             if (runtimeval0 * 4 != it.addressOffset)
             {
@@ -1657,7 +1657,7 @@ namespace IGC
         // Update IGC Metadata and shaders map
         // Function declarations are changing, this needs to be reflected in the metadata.
         MetadataBuilder mbuilder(&M);
-        for (auto i : funcsMapping)
+        for (const auto& i : funcsMapping)
         {
             IGCMD::IGCMetaDataHelper::moveFunction(
                 *m_pMdUtils, *m_context->getModuleMetaData(), i.first, i.second);

IGC/Compiler/CISACodeGen/RuntimeValueLegalizationPass.cpp

@@ -144,7 +144,7 @@ static void GetDisjointRegions(
     // ->{ {6, 6},  RuntimeValue* }
     // ->{ {8, 19}, RuntimeValue* }
     //   { {8, 8},  RuntimeValue* }
-    for (auto it : runtimeValueCalls)
+    for (const auto& it : runtimeValueCalls)
     {
         std::pair<uint32_t, uint32_t> range = it.first;
         if (disjointRegions.empty() ||
@@ -286,7 +286,7 @@ bool RuntimeValueLegalizationPass::runOnModule(llvm::Module& module)
         GetAccessedRegions(accessedRegions, runtimeValueCalls, dataGRFAlignmentInDwords);
 
         // Loop through all RuntimeValue calls
-        for (auto it : runtimeValueCalls)
+        for (const auto& it : runtimeValueCalls)
         {
             llvm::CallInst* callToResolve = llvm::cast<llvm::CallInst>(it.second);
 

IGC/Compiler/CISACodeGen/ShaderCodeGen.cpp

@@ -1115,7 +1115,7 @@ bool SimdEarlyCheck(CodeGenContext* ctx)
 
 void destroyShaderMap(CShaderProgram::KernelShaderMap& shaders)
 {
-    for (auto i : shaders)
+    for (const auto& i : shaders)
     {
         CShaderProgram* shader = i.second;
         COMPILER_SHADER_STATS_PRINT(shader->m_shaderStats,

IGC/Compiler/CISACodeGen/SinkCommonOffsetFromGEP.cpp

@@ -290,7 +290,7 @@ bool DivergentPointersGroups::createAddNewGroups(const DivergentPointer& DP) {
 void DivergentPointersGroups::add(const DivergentPointer& DP) {
     // Check all GEPs without last index have the same type
     SmallVector<Type*, 2> Types;
-    for (auto IT : DP.Geps) {
+    for (const auto& IT : DP.Geps) {
         GetElementPtrInst* GEP = IT.second.GEP;
         SmallVector<Value*, 2> IdxList { GEP->idx_begin(), GEP->idx_end() - 1 };
         auto Type = GetElementPtrInst::getIndexedType(GEP->getSourceElementType(), IdxList);
@@ -405,7 +405,7 @@ static bool sinkCommonOffsetForGroup(const CommonBaseGroup& Group) {
         auto OffsetGEP = GetElementPtrInst::Create(OffsetType, BasePhi, Indices, "", BasePhi->getNextNonDebugInstruction());
 
         bool isInBounds = false;
-        for (auto Gep : Geps)
+        for (const auto& Gep : Geps)
             isInBounds |= Gep.second.GEP->isInBounds();
         OffsetGEP->setIsInBounds(isInBounds);
 

IGC/Compiler/CISACodeGen/helper.cpp

@@ -908,7 +908,7 @@ namespace IGC
                 // Make sure constant folding is safe by looking up in pushableAddresses
                 PushInfo& pushInfo = pContext->getModuleMetaData()->pushInfo;
 
-                for (auto it : pushInfo.pushableAddresses)
+                for (const auto& it : pushInfo.pushableAddresses)
                 {
                     if ((bufIdOrGRFOffset * 4 == it.addressOffset) && (IGC_IS_FLAG_ENABLED(DisableStaticCheckForConstantFolding) || it.isStatic))
                     {
@@ -2949,7 +2949,7 @@ bool PDT_dominates(llvm::PostDominatorTree& PTD,
 // are not necessarily trivially dead. For example, store instruction.
 void RecursivelyDeleteDeadInstructions(
     Instruction * I, const TargetLibraryInfo * TLI, MemorySSAUpdater * MSSAU,
-    std::function<void(Value*)> AboutToDeleteCallback) {
+    const std::function<void(Value*)>& AboutToDeleteCallback) {
     SmallVector<Instruction*, 16> DeadInsts;
     DeadInsts.push_back(I);
     RecursivelyDeleteDeadInstructions(DeadInsts, TLI, MSSAU,
@@ -2961,7 +2961,7 @@ void RecursivelyDeleteDeadInstructions(
     const SmallVectorImpl<Instruction*>&DeadInsts,
     const TargetLibraryInfo * TLI,
     MemorySSAUpdater * MSSAU,
-    std::function<void(Value*)> AboutToDeleteCallback) {
+    const std::function<void(Value*)>& AboutToDeleteCallback) {
 #if LLVM_VERSION_MAJOR < 11
     SmallVector<Instruction*, 16> trivialDeadInsts;
 #else

IGC/Compiler/CISACodeGen/helper.h

@@ -609,13 +609,13 @@ namespace IGC
         llvm::Instruction* I,
         const llvm::TargetLibraryInfo* TLI = nullptr,
         llvm::MemorySSAUpdater* MSSAU = nullptr,
-        std::function<void(llvm::Value*)> AboutToDeleteCallback =
+        const std::function<void(llvm::Value*)>& AboutToDeleteCallback =
             std::function<void(llvm::Value*)>());
 
     void RecursivelyDeleteDeadInstructions(
         const llvm::SmallVectorImpl<llvm::Instruction*>& DeadInsts,
         const llvm::TargetLibraryInfo* TLI = nullptr,
         llvm::MemorySSAUpdater* MSSAU = nullptr,
-        std::function<void(llvm::Value*)> AboutToDeleteCallback =
+        const std::function<void(llvm::Value*)>& AboutToDeleteCallback =
             std::function<void(llvm::Value*)>());
 } // namespace IGC

IGC/Compiler/GenTTI.cpp

@@ -286,9 +286,9 @@ namespace llvm {
 
             // Find at least one base address, such that all loads
             // from it can be replaced by registers
-            for (auto LIIterator : LoadInstructions) {
+            for (const auto& LIIterator : LoadInstructions) {
                 bool Found = true;
-                for (auto LI : LIIterator.second)
+                for (const auto& LI : LIIterator.second)
                     Found &= canReplaceWithRegisters(LI, L, SE);
                 if (Found) {
                     UP.UpperBound = true;

IGC/Compiler/Optimizer/BuiltInFuncImport.cpp

@@ -186,7 +186,7 @@ static std::string updatedMangleName(const std::string& FuncName, const std::str
 static std::string updateSPIRmangleName(StringRef FuncName, const MangleSubstTy& MangleSubst)
 {
     std::string NewNameStr = FuncName.str();
-    for (auto Key : MangleSubst)
+    for (const auto& Key : MangleSubst)
     {
         auto Mangle = Key.first.str();
         auto NewMangle = Key.second.str();
@@ -873,7 +873,7 @@ bool BIImport::runOnModule(Module& M)
                         IGC_ASSERT(subgroup_size != 0);
 
                         // Parse each variant string in the table, stop at the first one that matches subgroup_size
-                        for (auto var : VariantsTable)
+                        for (const auto& var : VariantsTable)
                         {
                             // We only need to get the SIMD size from the string
                             auto [symStr, fName, vecLen] = IGC::ParseVectorVariantFunctionString(var);
@@ -1457,7 +1457,7 @@ bool PreBIImportAnalysis::runOnModule(Module& M)
           (float) value));
     }
 
-    for (auto CIPair : CallToReplace)
+    for (const auto& CIPair : CallToReplace)
     {
       auto oldCI = CIPair.first;
       auto newCI = CIPair.second;

IGC/Compiler/Optimizer/IndirectCallOptimization.cpp

@@ -200,7 +200,7 @@ namespace IGC
         {
             IRB.SetInsertPoint(&*(endBlock->begin()));
             PHINode* phi = IRB.CreatePHI(CI.getType(), callToBBPair.size());
-            for (auto it : callToBBPair)
+            for (const auto& it : callToBBPair)
             {
                 phi->addIncoming(it.first, it.second);
             }

IGC/Compiler/Optimizer/OpenCLPasses/GenericAddressResolution/LowerGPCallArg.cpp

@@ -208,7 +208,7 @@ std::optional<unsigned> LowerGPCallArg::getOriginAddressSpace(Function* func, un
 // Loops over the argument list transferring uses from old function to new one.
 void LowerGPCallArg::updateFunctionArgs(Function* oldFunc, Function* newFunc)
 {
-    for (auto ArgPair : llvm::zip(oldFunc->args(), newFunc->args()))
+    for (const auto& ArgPair : llvm::zip(oldFunc->args(), newFunc->args()))
     {
         Value* oldArg = &std::get<0>(ArgPair);
         Value* newArg = &std::get<1>(ArgPair);

IGC/Compiler/Optimizer/OpenCLPasses/OpenCLPrintf/OpenCLPrintfResolution.cpp

@@ -367,7 +367,7 @@ std::string OpenCLPrintfResolution::getPrintfStringsMDNodeName(Function& F)
     return "printf.strings";
 }
 
-static StoreInst* genStoreInternal(Value* Val, Value* Ptr, BasicBlock* InsertAtEnd, DebugLoc DL, bool isNontemporal)
+static StoreInst* genStoreInternal(Value* Val, Value* Ptr, BasicBlock* InsertAtEnd, const DebugLoc& DL, bool isNontemporal)
 {
     bool isVolatile = false;
     unsigned Align = 4;

IGC/Compiler/Optimizer/OpenCLPasses/ScalarArgAsPointer/ScalarArgAsPointer.cpp

@@ -295,7 +295,7 @@ bool ScalarArgAsPointerAnalysis::findStoredArgs(llvm::LoadInst& LI, ArgSet& args
                     for (auto it = offsets.begin(); it != offsets.end(); ++it)
                         tmp.push_back(*it + i * byteSize);
 
-                offsets = tmp;
+                offsets = std::move(tmp);
             }
         }
     }

IGC/Compiler/Optimizer/OpenCLPasses/StatelessToStateful/StatelessToStateful.cpp

@@ -225,7 +225,7 @@ Argument* StatelessToStateful::getBufferOffsetArg(Function* F, uint32_t ArgNumbe
 // The final instruction of the expansion is returned in 'offset'
 //
 bool StatelessToStateful::getOffsetFromGEP(
-    Function* F, SmallVector<GetElementPtrInst*, 4> GEPs,
+    Function* F, const SmallVector<GetElementPtrInst*, 4>& GEPs,
     uint32_t argNumber, bool isImplicitArg, Value*& offset)
 {
     Module* M = F->getParent();

IGC/Compiler/Optimizer/OpenCLPasses/StatelessToStateful/StatelessToStateful.hpp

@@ -114,7 +114,7 @@ namespace IGC
         bool pointerIsFromKernelArgument(llvm::Value& ptr);
 
         bool getOffsetFromGEP(
-            llvm::Function* F, llvm::SmallVector<llvm::GetElementPtrInst*, 4> GEPs,
+            llvm::Function* F, const llvm::SmallVector<llvm::GetElementPtrInst*, 4>& GEPs,
             uint32_t argNumber, bool isImplicitArg, llvm::Value*& offset);
         llvm::Argument* getBufferOffsetArg(llvm::Function* F, uint32_t ArgNumber);
         void setPointerSizeTo32bit(int32_t AddrSpace, llvm::Module* M);

IGC/Compiler/Optimizer/SynchronizationObjectCoalescing.cpp

@@ -1174,7 +1174,7 @@ static void SearchInstructions(
         }
     };
 
-    for (auto it : workList)
+    for (const auto& it : workList)
     {
         const llvm::BasicBlock* pCurrentBasicBlock = it->getParent();
         // use the iterator only if it wasn't visited or restricted

IGC/DebugInfo/DIE.cpp

@@ -528,6 +528,7 @@ void DIEBlock::EmitValue(StreamEmitter *Asm, dwarf::Form Form) const {
   switch (Form) {
   default:
     IGC_ASSERT_EXIT_MESSAGE(0, "Improper form for block");
+    break;
   case dwarf::DW_FORM_block1:
     Asm->EmitInt8(Size);
     break;

IGC/DebugInfo/StreamEmitter.hpp

@@ -57,6 +57,8 @@ class StreamEmitter {
 
   /// @brief Destructor.
   ~StreamEmitter();
+  StreamEmitter(const StreamEmitter &) = delete;
+  StreamEmitter &operator=(const StreamEmitter &) = delete;
 
   const Settings &GetEmitterSettings() const { return StreamOptions; };
 

IGC/common/ShaderOverride.cpp

@@ -256,7 +256,6 @@ void overrideShaderIGA(PLATFORM const & platform, void *& genxbin, int & binSize
     fIGAReleaseContext = (pIGAReleaseContext)GetProcAddress(hModule, IGA_RELEASE_CONTEXT_STR);
 
     if (fCreateContext == nullptr ||
-        fCreateContext == nullptr ||
         fIGAGetErrors == nullptr ||
         fIGAGetWarnings == nullptr ||
         fIGADiagnosticGetMessage == nullptr ||