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Sidorenko, Antonsys_zuul
Sidorenko, Anton
authored and
sys_zuul
committed
Make alignment target dependent
Change-Id: I529a91920626f719bfd4c81cc1ac04c7d077c395
1 parent 92b475c commit 0a907cc

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9 files changed

+117
-26
lines changed

9 files changed

+117
-26
lines changed

‎IGC/VectorCompiler/lib/GenXCodeGen/GenX.h

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -26,6 +26,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
2626

2727
#ifndef TARGET_GENX_H
2828
#define TARGET_GENX_H
29+
#include "visa_igc_common_header.h"
2930
#include "llvm/ADT/ArrayRef.h"
3031
#include "llvm/ADT/SmallVector.h"
3132
#include "llvm/ADT/StringRef.h"
@@ -129,18 +130,23 @@ const constexpr int ByteBits = 8;
129130
const constexpr int WordBits = 16;
130131
const constexpr int DWordBits = 32;
131132
const constexpr int QWordBits = 64;
133+
const constexpr int OWordBits = 128;
132134
const constexpr int GRFBits = 256;
133135

134136
const constexpr int ByteBytes = ByteBits / ByteBits;
135137
const constexpr int WordBytes = WordBits / ByteBits;
136138
const constexpr int DWordBytes = DWordBits / ByteBits;
137139
const constexpr int QWordBytes = QWordBits / ByteBits;
140+
const constexpr int OWordBytes = OWordBits / ByteBits;
138141

139142
// vISA allows [-512,511] for operation to be baled as offset
140143
// for rdregion, copied from visa
141144
const constexpr int G4_MAX_ADDR_IMM = 511;
142145
const constexpr int G4_MIN_ADDR_IMM = -512;
143146

147+
// Default GRF Width if subtarget is not available
148+
const constexpr int defaultGRFWidth = 32;
149+
144150
// describe integer vector immediate (V, UV)
145151
enum ImmIntVec {
146152
Width = 8, // num elem in vector

‎IGC/VectorCompiler/lib/GenXCodeGen/GenXBaling.cpp

Lines changed: 6 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -245,7 +245,7 @@ bool GenXBaling::isRegionOKForIntrinsic(unsigned ArgInfoBits, const Region &R,
245245
unsigned Restriction = AI.getRestriction();
246246
if (!Restriction)
247247
return true;
248-
unsigned GRFWidth = ST ? ST->getGRFWidth() : 32;
248+
unsigned GRFWidth = ST ? ST->getGRFWidth() : defaultGRFWidth;
249249
unsigned ElementsPerGrf = GRFWidth / R.ElementBytes;
250250
unsigned GRFLogAlign = Log2_32(GRFWidth);
251251
if (AI.Info & GenXIntrinsicInfo::GRFALIGNED) {
@@ -530,7 +530,8 @@ void GenXBaling::processWrRegion(Instruction *Inst)
530530
(ValIntrinID != GenXIntrinsic::genx_sat) &&
531531
!GenXIntrinsic::isRdRegion(V) && !GenXIntrinsic::isWrRegion(V) &&
532532
(II.getRetInfo().getCategory() == GenXIntrinsicInfo::RAW))
533-
Liveness->getOrCreateLiveRange(Inst)->LogAlignment = 5;
533+
Liveness->getOrCreateLiveRange(Inst)->LogAlignment = getLogAlignment(
534+
VISA_Align::ALIGN_GRF, ST ? ST->getGRFWidth() : defaultGRFWidth);
534535
}
535536
}
536537
}
@@ -1238,7 +1239,9 @@ void GenXBaling::processMainInst(Instruction *Inst, int IntrinID)
12381239
if (Liveness) {
12391240
Value *Opnd = Inst->getOperand(ArgIdx);
12401241
Opnd = cast<Instruction>(Opnd)->getOperand(0);
1241-
Liveness->getOrCreateLiveRange(Opnd)->LogAlignment = 5;
1242+
Liveness->getOrCreateLiveRange(Opnd)->LogAlignment =
1243+
getLogAlignment(VISA_Align::ALIGN_GRF,
1244+
ST ? ST->getGRFWidth() : defaultGRFWidth);
12421245
}
12431246
}
12441247
break;

‎IGC/VectorCompiler/lib/GenXCodeGen/GenXCategory.cpp

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -842,7 +842,9 @@ CategoryAndAlignment GenXCategory::getCategoryAndAlignmentForDef(Value *V) const
842842
auto AI = II.getRetInfo();
843843
return CategoryAndAlignment(
844844
intrinsicCategoryToRegCategory(AI.getCategory()),
845-
AI.getLogAlignment());
845+
getLogAlignment(AI.getAlignment(), Subtarget
846+
? Subtarget->getGRFWidth()
847+
: defaultGRFWidth));
846848
} else if (GenXIntrinsic::isRdRegion(IntrinsicID)) {
847849
// Add this to avoid conversion in case of read-region on SurfaceIndex
848850
// or SamplerIndex type
@@ -970,7 +972,9 @@ CategoryAndAlignment GenXCategory::getCategoryAndAlignmentForUse(
970972
auto AI = II.getArgInfo(U->getOperandNo());
971973
return CategoryAndAlignment(
972974
intrinsicCategoryToRegCategory(AI.getCategory()),
973-
AI.getLogAlignment());
975+
getLogAlignment(AI.getAlignment(),
976+
Subtarget ? Subtarget->getGRFWidth()
977+
: defaultGRFWidth));
974978
}
975979
break;
976980
}

‎IGC/VectorCompiler/lib/GenXCodeGen/GenXCisaBuilder.cpp

Lines changed: 8 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -2852,7 +2852,9 @@ void GenXKernelBuilder::AddGenVar(Register &Reg) {
28522852
// This is not an aliased register. Go through all the aliases and
28532853
// determine the biggest alignment required. If the register is at least
28542854
// as big as a GRF, make the alignment GRF.
2855-
unsigned Alignment = 5; // GRF alignment
2855+
unsigned Alignment = getLogAlignment(
2856+
VISA_Align::ALIGN_GRF, Subtarget ? Subtarget->getGRFWidth()
2857+
: defaultGRFWidth); // GRF alignment
28562858
Type *Ty = Reg.Ty;
28572859
unsigned NBits = Ty->isPointerTy() ? DL.getPointerSizeInBits()
28582860
: Ty->getPrimitiveSizeInBits();
@@ -2888,12 +2890,11 @@ void GenXKernelBuilder::AddGenVar(Register &Reg) {
28882890

28892891
visa::TypeDetails TD(DL, Reg.Ty, Reg.Signed);
28902892

2891-
CISA_CALL(Kernel->CreateVISAGenVar(
2892-
Decl, Reg.NameStr.c_str(), TD.NumElements,
2893-
static_cast<VISA_Type>(TD.VisaType),
2894-
// 0x7 is a hack because for some reasons
2895-
// alignment can be a large number
2896-
static_cast<VISA_Align>(Reg.Alignment & 0x7), parentDecl, 0));
2893+
VISA_Align VA = getVISA_Align(
2894+
Reg.Alignment, Subtarget ? Subtarget->getGRFWidth() : defaultGRFWidth);
2895+
CISA_CALL(Kernel->CreateVISAGenVar(Decl, Reg.NameStr.c_str(), TD.NumElements,
2896+
static_cast<VISA_Type>(TD.VisaType), VA,
2897+
parentDecl, 0));
28972898

28982899
Reg.SetVar(Kernel, Decl);
28992900

‎IGC/VectorCompiler/lib/GenXCodeGen/GenXIntrinsics.h

Lines changed: 9 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -35,6 +35,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
3535
//===----------------------------------------------------------------------===//
3636
#ifndef GENXINTRINSICS_H
3737
#define GENXINTRINSICS_H
38+
#include "GenX.h"
3839
#include "GenXVisa.h"
3940

4041
#define GENX_ITR_CATVAL(v) ((v) << CATBASE)
@@ -192,18 +193,19 @@ class GenXIntrinsicInfo {
192193
ArgInfo(unsigned Info) : Info(Info) {}
193194
// getCategory : return field category
194195
unsigned getCategory() { return Info & CATMASK; }
195-
// getLogAlignment : get any special alignment requirement, else 0
196-
unsigned getLogAlignment() {
196+
// getAlignment : get any special alignment requirement, else align to 1
197+
// byte
198+
VISA_Align getAlignment() {
197199
if (isGeneral()) {
198200
if (Info & GRFALIGNED)
199-
return 5;
201+
return VISA_Align::ALIGN_GRF;
200202
if (Info & OWALIGNED)
201-
return 4;
202-
return 0;
203+
return VISA_Align::ALIGN_OWORD;
204+
return VISA_Align::ALIGN_BYTE;
203205
}
204206
if (isRaw())
205-
return 5;
206-
return 0;
207+
return VISA_Align::ALIGN_GRF;
208+
return VISA_Align::ALIGN_BYTE;
207209
}
208210
// isGeneral : test whether this is a general operand
209211
bool isGeneral() { return getCategory() == GENERAL; }

‎IGC/VectorCompiler/lib/GenXCodeGen/GenXLiveness.cpp

Lines changed: 11 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -78,6 +78,8 @@ bool GenXLiveness::runOnFunctionGroup(FunctionGroup &ArgFG)
7878
{
7979
clear();
8080
FG = &ArgFG;
81+
auto STP = getAnalysisIfAvailable<GenXSubtargetPass>();
82+
Subtarget = STP ? STP->getSubtarget() : nullptr;
8183
return false;
8284
}
8385

@@ -116,14 +118,14 @@ void GenXLiveness::setLiveRange(SimpleValue V, LiveRange *LR)
116118
assert(LiveRangeMap.find(V) == LiveRangeMap.end() && "Attempting to set LiveRange for Value that already has one");
117119
LR->addValue(V);
118120
LiveRangeMap[V] = LR;
119-
LR->setAlignmentFromValue(V);
121+
LR->setAlignmentFromValue(V, Subtarget ? Subtarget->getGRFWidth()
122+
: defaultGRFWidth);
120123
}
121124

122125
/***********************************************************************
123126
* setAlignmentFromValue : set a live range's alignment from a value
124127
*/
125-
void LiveRange::setAlignmentFromValue(SimpleValue V)
126-
{
128+
void LiveRange::setAlignmentFromValue(SimpleValue V, unsigned GRFWidth) {
127129
Type *Ty = IndexFlattener::getElementType(
128130
V.getValue()->getType(), V.getIndex());
129131
if (Ty->isPointerTy())
@@ -133,8 +135,10 @@ void LiveRange::setAlignmentFromValue(SimpleValue V)
133135
SizeInBits *= VT->getNumElements();
134136
unsigned LogAlign = Log2_32(SizeInBits) - 3;
135137
// Set max alignment to GRF
136-
if (LogAlign > 5)
137-
LogAlign = 5;
138+
unsigned MaxLogAlignment =
139+
genx::getLogAlignment(VISA_Align::ALIGN_GRF, GRFWidth);
140+
LogAlign = (LogAlign > MaxLogAlignment) ? MaxLogAlignment : LogAlign;
141+
LogAlign = CeilAlignment(LogAlign, GRFWidth);
138142
setLogAlignment(LogAlign);
139143
}
140144

@@ -585,7 +589,8 @@ LiveRange *GenXLiveness::getOrCreateLiveRange(SimpleValue V)
585589
LR = new LiveRange;
586590
LR->Values.push_back(V);
587591
i->second = LR;
588-
LR->setAlignmentFromValue(V);
592+
LR->setAlignmentFromValue(V, Subtarget ? Subtarget->getGRFWidth()
593+
: defaultGRFWidth);
589594
}
590595
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
591596
// Give the Value a name if it doesn't already have one.

‎IGC/VectorCompiler/lib/GenXCodeGen/GenXLiveness.h

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -174,6 +174,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
174174
#define GENXLIVENESS_H
175175

176176
#include "FunctionGroup.h"
177+
#include "GenXSubtarget.h"
177178
#include "IgnoreRAUWValueMap.h"
178179
#include "llvm/IR/DerivedTypes.h"
179180
#include "llvm/IR/Value.h"
@@ -422,7 +423,7 @@ class LiveRange {
422423
// getLogAlignment : get log alignment
423424
unsigned getLogAlignment() const { return LogAlignment; }
424425
// setAlignmentFromValue : increase alignment if necessary from a value
425-
void setAlignmentFromValue(SimpleValue V);
426+
void setAlignmentFromValue(SimpleValue V, unsigned GRFWidth);
426427
// setLogAlignment : set log alignment to greater than implied by the LR's values
427428
void setLogAlignment(unsigned Align) { LogAlignment = std::max(LogAlignment, Align); }
428429
// addSegment : add a segment to a live range
@@ -505,6 +506,7 @@ class GenXLiveness : public FunctionGroupPass {
505506
genx::CallGraph *CG;
506507
GenXBaling *Baling;
507508
GenXNumbering *Numbering;
509+
const GenXSubtarget *Subtarget;
508510
std::map<Function *, Value *> UnifiedRets;
509511
std::map<Value *, Function *> UnifiedRetToFunc;
510512
std::map<AssertingVH<Value>, Value *> ArgAddressBaseMap;

‎IGC/VectorCompiler/lib/GenXCodeGen/GenXUtil.cpp

Lines changed: 59 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1512,3 +1512,62 @@ bool genx::isFuncPointerVec(Value *V, SetVector<Function *> *Funcs) {
15121512
return Res;
15131513
}
15141514

1515+
1516+
unsigned genx::getLogAlignment(VISA_Align Align, unsigned GRFWidth) {
1517+
switch (Align) {
1518+
case ALIGN_BYTE:
1519+
return Log2_32(ByteBytes);
1520+
case ALIGN_WORD:
1521+
return Log2_32(WordBytes);
1522+
case ALIGN_DWORD:
1523+
return Log2_32(DWordBytes);
1524+
case ALIGN_QWORD:
1525+
return Log2_32(QWordBytes);
1526+
case ALIGN_OWORD:
1527+
return Log2_32(OWordBytes);
1528+
case ALIGN_GRF:
1529+
return Log2_32(GRFWidth);
1530+
case ALIGN_2_GRF:
1531+
return Log2_32(GRFWidth) + 1;
1532+
default:
1533+
report_fatal_error("Unknown alignment");
1534+
}
1535+
}
1536+
1537+
VISA_Align genx::getVISA_Align(unsigned LogAlignment, unsigned GRFWidth) {
1538+
if (LogAlignment == Log2_32(ByteBytes))
1539+
return ALIGN_BYTE;
1540+
else if (LogAlignment == Log2_32(WordBytes))
1541+
return ALIGN_WORD;
1542+
else if (LogAlignment == Log2_32(DWordBytes))
1543+
return ALIGN_DWORD;
1544+
else if (LogAlignment == Log2_32(QWordBytes))
1545+
return ALIGN_QWORD;
1546+
else if (LogAlignment == Log2_32(OWordBytes))
1547+
return ALIGN_OWORD;
1548+
else if (LogAlignment == Log2_32(GRFWidth))
1549+
return ALIGN_GRF;
1550+
else if (LogAlignment == Log2_32(GRFWidth) + 1)
1551+
return ALIGN_2_GRF;
1552+
else
1553+
report_fatal_error("Unknown log alignment");
1554+
}
1555+
1556+
unsigned genx::CeilAlignment(unsigned LogAlignment, unsigned GRFWidth) {
1557+
if (LogAlignment <= Log2_32(ByteBytes))
1558+
return Log2_32(ByteBytes);
1559+
else if (LogAlignment <= Log2_32(WordBytes))
1560+
return Log2_32(WordBytes);
1561+
else if (LogAlignment <= Log2_32(DWordBytes))
1562+
return Log2_32(DWordBytes);
1563+
else if (LogAlignment <= Log2_32(QWordBytes))
1564+
return Log2_32(QWordBytes);
1565+
else if (LogAlignment <= Log2_32(OWordBytes))
1566+
return Log2_32(OWordBytes);
1567+
else if (LogAlignment <= Log2_32(GRFWidth))
1568+
return Log2_32(GRFWidth);
1569+
else if (LogAlignment <= Log2_32(GRFWidth) + 1)
1570+
return Log2_32(GRFWidth) + 1;
1571+
else
1572+
report_fatal_error("Unknown log alignment");
1573+
}

‎IGC/VectorCompiler/lib/GenXCodeGen/GenXUtil.h

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -459,6 +459,15 @@ CastInst *scalarizeOrVectorizeIfNeeded(Instruction *Inst,
459459
Instruction *InstToReplace);
460460

461461

462+
// Returns log alignment for align type and target grf width, because ALIGN_GRF
463+
// must be target-dependent.
464+
unsigned getLogAlignment(VISA_Align Align, unsigned GRFWidth);
465+
// The opposite of getLogAlignment.
466+
VISA_Align getVISA_Align(unsigned LogAlignment, unsigned GRFWidth);
467+
// Some log alignments cannot be transparently transformed to VISA_Align. This
468+
// chooses suitable log alignment which is convertible to VISA_Align.
469+
unsigned CeilAlignment(unsigned LogAlignment, unsigned GRFWidth);
470+
462471
} // namespace genx
463472
} // namespace llvm
464473

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