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aratajewigcbot
aratajew
authored and
igcbot
committed
Implement support for both SPV-IR forms of atomic builtins
1 parent 75a71af commit 12123e2

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6 files changed

+583
-583
lines changed

6 files changed

+583
-583
lines changed

‎IGC/BiFModule/Headers/spirv.h

Lines changed: 196 additions & 196 deletions
Large diffs are not rendered by default.

‎IGC/BiFModule/Implementation/atomics.cl

Lines changed: 291 additions & 291 deletions
Large diffs are not rendered by default.

‎IGC/BiFModule/Implementation/barrier.cl

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -173,7 +173,7 @@ local __namedBarrier* __builtin_spirv_OpNamedBarrierInitialize_i32_p3__namedBarr
173173
static INLINE OVERLOADABLE
174174
uint AtomicCompareExchange(local uint *Pointer, uint Scope, uint Equal, uint Unequal, uint Value, uint Comparator)
175175
{
176-
return __builtin_spirv_OpAtomicCompareExchange_p3i32_i32_i32_i32_i32_i32((volatile local uint*)Pointer, Scope, Equal, Unequal, Value, Comparator);
176+
return SPIRV_BUILTIN(AtomicCompareExchange, _p3i32_i32_i32_i32_i32_i32, )((local int*)Pointer, Scope, Equal, Unequal, Value, Comparator);
177177
}
178178

179179
static INLINE
@@ -185,19 +185,19 @@ uint SubgroupLocalId()
185185
static INLINE OVERLOADABLE
186186
uint AtomicLoad(local uint *Pointer, uint Scope, uint Semantics)
187187
{
188-
return __builtin_spirv_OpAtomicLoad_p3i32_i32_i32((volatile local uint*)Pointer, Scope, Semantics);
188+
return SPIRV_BUILTIN(AtomicLoad, _p3i32_i32_i32, )((local int*)Pointer, Scope, Semantics);
189189
}
190190

191191
static INLINE OVERLOADABLE
192192
void AtomicStore(local uint *Pointer, uint Scope, uint Semantics, uint Value)
193193
{
194-
__builtin_spirv_OpAtomicStore_p3i32_i32_i32_i32((volatile local uint*)Pointer, Scope, Semantics, Value);
194+
SPIRV_BUILTIN(AtomicStore, _p3i32_i32_i32_i32, )((local int*)Pointer, Scope, Semantics, Value);
195195
}
196196

197197
static INLINE OVERLOADABLE
198198
uint AtomicInc(local uint *Pointer, uint Scope, uint Semantics)
199199
{
200-
return __builtin_spirv_OpAtomicIIncrement_p3i32_i32_i32((volatile local uint*)Pointer, Scope, Semantics);
200+
return SPIRV_BUILTIN(AtomicIIncrement, _p3i32_i32_i32, )((local int*)Pointer, Scope, Semantics);
201201
}
202202

203203
static INLINE

‎IGC/BiFModule/Implementation/group.cl

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -979,7 +979,7 @@ bool __builtin_spirv_OpGroupAll_i32_i1(uint Execution, bool Predicate)
979979
GET_MEMPOOL_PTR(tmp, int, false, 1)
980980
*tmp = 0;
981981
SPIRV_BUILTIN(ControlBarrier, _i32_i32_i32, )(Execution, 0, AcquireRelease | WorkgroupMemory); // Wait for tmp to be initialized
982-
__builtin_spirv_OpAtomicOr_p3i32_i32_i32_i32((volatile local uint*)tmp, Device, Relaxed, Predicate == 0); // Set to true if predicate is zero
982+
SPIRV_BUILTIN(AtomicOr, _p3i32_i32_i32_i32, )((local int*)tmp, Device, Relaxed, Predicate == 0); // Set to true if predicate is zero
983983
SPIRV_BUILTIN(ControlBarrier, _i32_i32_i32, )(Execution, 0, AcquireRelease | WorkgroupMemory); // Wait for threads
984984
return (*tmp == 0); // Return true if none of them failed the test
985985
}
@@ -1003,7 +1003,7 @@ bool __builtin_spirv_OpGroupAny_i32_i1(uint Execution, bool Predicate)
10031003
GET_MEMPOOL_PTR(tmp, int, false, 1)
10041004
*tmp = 0;
10051005
SPIRV_BUILTIN(ControlBarrier, _i32_i32_i32, )(Execution, 0, AcquireRelease | WorkgroupMemory); // Wait for tmp to be initialized
1006-
__builtin_spirv_OpAtomicOr_p3i32_i32_i32_i32((volatile local uint*)tmp, Device, Relaxed, Predicate != 0); // Set to true if predicate is non-zero
1006+
SPIRV_BUILTIN(AtomicOr, _p3i32_i32_i32_i32, )((local int*)tmp, Device, Relaxed, Predicate != 0); // Set to true if predicate is non-zero
10071007
SPIRV_BUILTIN(ControlBarrier, _i32_i32_i32, )(Execution, 0, AcquireRelease | WorkgroupMemory);
10081008
return *tmp; // Return true if any of them passed the test
10091009
}

‎IGC/BiFModule/Implementation/pipe.cl

Lines changed: 22 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -129,12 +129,12 @@ INLINE static uint extract_index( ReserveId_t rid )
129129

130130
INLINE static bool intel_lock_pipe_read( __global pipe_control_intel_t* p )
131131
{
132-
int lock = __builtin_spirv_OpAtomicLoad_p1i32_i32_i32( &p->lock, Device, Relaxed );
132+
int lock = SPIRV_BUILTIN(AtomicLoad, _p1i32_i32_i32, )( ( global int* )&p->lock, Device, Relaxed );
133133
while( lock <= 0 )
134134
{
135135
int newLock = lock - 1;
136-
if (__builtin_spirv_OpAtomicCompareExchange_p1i32_i32_i32_i32_i32_i32(
137-
&p->lock,
136+
if (SPIRV_BUILTIN(AtomicCompareExchange, _p1i32_i32_i32_i32_i32_i32, )(
137+
( global int* ) &p->lock,
138138
Device,
139139
SequentiallyConsistent,
140140
SequentiallyConsistent,
@@ -153,22 +153,22 @@ INLINE static bool intel_lock_pipe_read( __global pipe_control_intel_t* p )
153153

154154
static void intel_unlock_pipe_read( __global pipe_control_intel_t* p )
155155
{
156-
__builtin_spirv_OpAtomicIIncrement_p1i32_i32_i32(
157-
&p->lock,
156+
SPIRV_BUILTIN(AtomicIIncrement, _p1i32_i32_i32, )(
157+
( global int* ) &p->lock,
158158
Device,
159159
SequentiallyConsistent );
160160
// OK to inc, since we must have locked.
161161
}
162162

163163
static bool intel_lock_pipe_write( __global pipe_control_intel_t* p )
164164
{
165-
int lock = __builtin_spirv_OpAtomicLoad_p1i32_i32_i32( &p->lock, Device, Relaxed );
165+
int lock = SPIRV_BUILTIN(AtomicLoad, _p1i32_i32_i32, )( ( global int* )&p->lock, Device, Relaxed );
166166

167167
while( lock >= 0 )
168168
{
169169
int newLock = lock + 1;
170-
if( __builtin_spirv_OpAtomicCompareExchange_p1i32_i32_i32_i32_i32_i32(
171-
&p->lock,
170+
if( SPIRV_BUILTIN(AtomicCompareExchange, _p1i32_i32_i32_i32_i32_i32, )(
171+
( global int* ) &p->lock,
172172
Device,
173173
SequentiallyConsistent,
174174
SequentiallyConsistent,
@@ -187,17 +187,17 @@ static bool intel_lock_pipe_write( __global pipe_control_intel_t* p )
187187

188188
static void intel_unlock_pipe_write( __global pipe_control_intel_t* p )
189189
{
190-
__builtin_spirv_OpAtomicIDecrement_p1i32_i32_i32(
191-
&p->lock,
190+
SPIRV_BUILTIN(AtomicIDecrement, _p1i32_i32_i32, )(
191+
( global int* ) &p->lock,
192192
Device,
193193
SequentiallyConsistent );
194194
// OK to dec, since we must have locked.
195195
}
196196

197197
static uint read_head( __global pipe_control_intel_t* p )
198198
{
199-
uint head = __builtin_spirv_OpAtomicLoad_p1i32_i32_i32(
200-
&p->head,
199+
int head = SPIRV_BUILTIN(AtomicLoad, _p1i32_i32_i32, )(
200+
( global int* )&p->head,
201201
Device,
202202
SequentiallyConsistent );
203203

@@ -206,8 +206,8 @@ static uint read_head( __global pipe_control_intel_t* p )
206206

207207
static uint read_tail( __global pipe_control_intel_t* p )
208208
{
209-
uint tail = __builtin_spirv_OpAtomicLoad_p1i32_i32_i32(
210-
&p->tail,
209+
int tail = SPIRV_BUILTIN(AtomicLoad, _p1i32_i32_i32, )(
210+
( global int* )&p->tail,
211211
Device,
212212
SequentiallyConsistent );
213213

@@ -258,8 +258,8 @@ int __builtin_spirv_OpReadPipe_i64_p4i8_i32( Pipe_t Pipe, generic void *Pointer,
258258
break;
259259
}
260260

261-
if( __builtin_spirv_OpAtomicCompareExchange_p1i32_i32_i32_i32_i32_i32(
262-
&p->head,
261+
if( SPIRV_BUILTIN(AtomicCompareExchange, _p1i32_i32_i32_i32_i32_i32, )(
262+
( global int* ) &p->head,
263263
Device,
264264
SequentiallyConsistent,
265265
SequentiallyConsistent,
@@ -326,8 +326,8 @@ int __builtin_spirv_OpWritePipe_i64_p4i8_i32( Pipe_wo_t Pipe, const generic void
326326
break;
327327
}
328328

329-
if( __builtin_spirv_OpAtomicCompareExchange_p1i32_i32_i32_i32_i32_i32(
330-
&p->tail,
329+
if( SPIRV_BUILTIN(AtomicCompareExchange, _p1i32_i32_i32_i32_i32_i32, )(
330+
( global int* ) &p->tail,
331331
Device,
332332
SequentiallyConsistent,
333333
SequentiallyConsistent,
@@ -447,8 +447,8 @@ ReserveId_t __builtin_spirv_OpReserveReadPipePackets_i64_i32_i32( Pipe_t Pipe, u
447447
break;
448448
}
449449

450-
if( __builtin_spirv_OpAtomicCompareExchange_p1i32_i32_i32_i32_i32_i32(
451-
&p->head,
450+
if( SPIRV_BUILTIN(AtomicCompareExchange, _p1i32_i32_i32_i32_i32_i32, )(
451+
( global int* ) &p->head,
452452
Device,
453453
SequentiallyConsistent,
454454
SequentiallyConsistent,
@@ -527,8 +527,8 @@ ReserveId_t __builtin_spirv_OpReserveWritePipePackets_i64_i32_i32(Pipe_wo_t Pipe
527527
break;
528528
}
529529

530-
if( __builtin_spirv_OpAtomicCompareExchange_p1i32_i32_i32_i32_i32_i32(
531-
&p->tail,
530+
if( SPIRV_BUILTIN(AtomicCompareExchange, _p1i32_i32_i32_i32_i32_i32, )(
531+
( global int* ) &p->tail,
532532
Device,
533533
SequentiallyConsistent,
534534
SequentiallyConsistent,

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