@@ -692,7 +692,7 @@ void BinaryEncodingIGA::DoAll()
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Instruction *igaInst = nullptr ;
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auto igaOpcode = getIGAOp (inst->opcode (), inst, platformModel->platform );
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// common fields: op, predicate, flag reg, exec size, exec mask offset, mask ctrl, conditional modifier
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- const OpSpec* opSpec = &( platformModel->lookupOpSpec (igaOpcode) );
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+ const OpSpec* opSpec = &platformModel->lookupOpSpec (igaOpcode);
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if (opSpec->op == Op::INVALID)
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{
@@ -701,10 +701,10 @@ void BinaryEncodingIGA::DoAll()
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continue ;
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}
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Predication pred;
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- RegRef flagReg = { 0 , 0 };
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+ RegRef flagReg { 0 , 0 };
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ExecSize execSize = getIGAExecSize (inst->getExecSize ());
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ChannelOffset chOff = getIGAChannelOffset (inst->getMaskOffset ());
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- MaskCtrl maskCtrl = getIGAMaskCtrl (inst->opcode () == G4_jmpi ? true : inst->isWriteEnableInst ());
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+ MaskCtrl maskCtrl = getIGAMaskCtrl (inst->opcode () == G4_jmpi || inst->isWriteEnableInst ());
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FlagModifier condModifier = FlagModifier::NONE;
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getIGAFlagInfo (inst, opSpec, pred, condModifier, flagReg);
@@ -752,16 +752,18 @@ void BinaryEncodingIGA::DoAll()
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{
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igaInst =
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IGAKernel->createBasicInstruction (
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- *opSpec,
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- pred,
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- flagReg,
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- execSize,
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- chOff,
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- maskCtrl,
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- condModifier);
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+ *opSpec,
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+ pred,
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+ flagReg,
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+ execSize,
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+ chOff,
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+ maskCtrl,
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+ condModifier);
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}
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igaInst->setID (IGAInstId++);
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+ igaInst->setLoc (inst->getCISAOff ()); // make IGA src off track CISA id
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+
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if (opSpec->supportsDestination ())
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{
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assert (inst->getDst () && " dst must not be null" );
@@ -770,10 +772,10 @@ void BinaryEncodingIGA::DoAll()
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Region::Horz hstride = getIGAHorz (dst->getHorzStride ());
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Type type = getIGAType (dst->getType ());
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- // work around for SKL bug
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- // not all bits are copied from immediate descriptor
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- if (inst->isSend () &&
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- platform >= GENX_SKL &&
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+ // workaround for SKL bug
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+ // not all bits are copied from immediate descriptor
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+ if (inst->isSend () &&
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+ platform >= GENX_SKL &&
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platform < GENX_CNL)
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{
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G4_SendMsgDescriptor* msgDesc = inst->getMsgDesc ();
@@ -808,7 +810,7 @@ void BinaryEncodingIGA::DoAll()
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}
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else
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{ // Operand::Kind::INDIRECT
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- RegRef regRef = { 0 , 0 };
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+ RegRef regRef { 0 , 0 };
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bool valid;
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regRef.subRegNum = (uint8_t ) dst->ExIndSubRegNum (valid);
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igaInst->setInidirectDestination (
@@ -952,7 +954,7 @@ void BinaryEncodingIGA::DoAll()
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}
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else
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{
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- RegRef regRef = { 0 , 0 };
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+ RegRef regRef { 0 , 0 };
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bool valid;
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regRef.subRegNum = (uint8_t )srcRegion->ExIndSubRegNum (valid);
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igaInst->setInidirectSource (
@@ -1009,9 +1011,9 @@ void BinaryEncodingIGA::DoAll()
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if (bbNew)
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{
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- // Fall through block is created.
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- // So the new block needs to become current block
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- // so that jump offsets can be calculated correctly
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+ // Fall through block is created.
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+ // So the new block needs to become current block
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+ // so that jump offsets can be calculated correctly
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currBB = bbNew;
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}
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// If, in future, we generate multiple binary inst
@@ -1163,7 +1165,7 @@ SendDesc BinaryEncodingIGA::getIGASendExDesc(
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assert (valid && " invalid subreg" );
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}
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}
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- else
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+ else // old unary packed send
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{
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// exDesc is stored in SendMsgDesc and must be IMM
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G4_SendMsgDescriptor* sendDesc = sendInst->getMsgDesc ();
@@ -1177,6 +1179,8 @@ SendDesc BinaryEncodingIGA::getIGASendExDesc(
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tVal = tVal & 0xFFFFFFF0 ;
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}
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exDescArg.imm = tVal;
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+ // non-split send implies Src1.Length == 0
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+ xlen = 0 ;
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}
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return exDescArg;
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