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MichalMroz12igcbot
MichalMroz12
authored and
igcbot
committed
Reverting Coverity fixes
Reverting the changes of Coverity fixes due to performance regression
1 parent 6d8d9c5 commit 1941204

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15 files changed

+36
-39
lines changed

15 files changed

+36
-39
lines changed

‎IGC/AdaptorOCL/SPIRV/SPIRVUtil.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -279,7 +279,7 @@ getSPIRVBuiltinName(Op OC, SPIRVInstruction *BI, const std::vector<Type*>& ArgTy
279279

280280
if (!name.empty()) {
281281
name = name + suffix;
282-
decorateSPIRVBuiltin(name, std::move(ArgTypes));
282+
decorateSPIRVBuiltin(name, ArgTypes);
283283
}
284284
else
285285
{

‎IGC/Compiler/CISACodeGen/ShaderCodeGen.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -434,7 +434,7 @@ void AddLegalizationPasses(CodeGenContext& ctx, IGCPassManager& mpm, PSSignature
434434
GenIntrinsicsTTIImpl GTTI(&ctx);
435435
return TargetTransformInfo(GTTI);
436436
});
437-
mpm.add(new TargetTransformInfoWrapperPass(std::move(GenTTgetIIRAnalysis)));
437+
mpm.add(new TargetTransformInfoWrapperPass(GenTTgetIIRAnalysis));
438438
}
439439

440440
// Disable all target library functions.

‎IGC/Compiler/MetaDataApi/IGCMetaDataHelper.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -38,7 +38,7 @@ void IGCMetaDataHelper::moveFunction(
3838
{
3939
auto funcInfo = loc->second;
4040
FuncMD.erase(OldFunc);
41-
FuncMD[NewFunc] = std::move(funcInfo);
41+
FuncMD[NewFunc] = funcInfo;
4242
}
4343
}
4444

‎IGC/Compiler/Optimizer/OpenCLPasses/GenericAddressResolution/LowerGPCallArg.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -146,7 +146,7 @@ void LowerGPCallArg::updateMetadata(Function* oldFunc, Function* newFunc) {
146146
{
147147
auto funcInfo = loc->second;
148148
FuncMD.erase(oldFunc);
149-
FuncMD[newFunc] = std::move(funcInfo);
149+
FuncMD[newFunc] = funcInfo;
150150
}
151151

152152
m_mdUtils->save(m_module->getContext());

‎IGC/Compiler/Optimizer/PreCompiledFuncImport.cpp

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -2697,14 +2697,12 @@ void PreCompiledFuncImport::checkAndSetEnableSubroutine()
26972697
switch (I->getOpcode()) {
26982698
default:
26992699
break;
2700-
case Instruction::FDiv: {
2700+
case Instruction::FDiv:
27012701
if (DPDivSqrtEmu && I->getOperand(0)->getType()->isDoubleTy())
27022702
{
27032703
m_enableCallForEmulation = true;
27042704
m_pCtx->m_hasDPDivSqrtEmu = true;
27052705
}
2706-
break;
2707-
}
27082706
case Instruction::FMul:
27092707
case Instruction::FAdd:
27102708
case Instruction::FSub:

‎IGC/Compiler/compiler_caps.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -117,7 +117,7 @@ namespace IGC
117117

118118
}
119119

120-
static void DumpCaps(const GT_SYSTEM_INFO &sysinfo, PLATFORM platformInfo, Debug::Dump const& dump)
120+
static void DumpCaps(const GT_SYSTEM_INFO sysinfo, PLATFORM platformInfo, Debug::Dump const& dump)
121121
{
122122
std::string outputString;
123123
CreateCompilerCapsString(&sysinfo, platformInfo, outputString);

‎IGC/OCLFE/igd_fcl_mcl/headers/common_clang.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -36,8 +36,6 @@ namespace Intel { namespace OpenCL { namespace ClangFE {
3636
//
3737
struct IOCLFEBinaryResult
3838
{
39-
IOCLFEBinaryResult(const IOCLFEBinaryResult& cm) = delete;
40-
IOCLFEBinaryResult& operator=(const IOCLFEBinaryResult& cm) = delete;
4139
// Returns the size in bytes of the IR buffer
4240
virtual size_t GetIRSize() const = 0;
4341
// Returns the pointer to the IR buffer or NULL if no IR buffer is present

‎visa/ByteCodeReaderNG.cpp

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -775,7 +775,9 @@ static void readInstructionDataportNG(unsigned &bytePos, const char *buf,
775775
switch (opcode) {
776776
case ISA_MEDIA_ST:
777777
case ISA_MEDIA_LD: {
778-
uint8_t modifier = readPrimitiveOperandNG<uint8_t>(bytePos, buf);
778+
uint8_t modifier = (ISA_MEDIA_LD == opcode || ISA_MEDIA_ST == opcode)
779+
? readPrimitiveOperandNG<uint8_t>(bytePos, buf)
780+
: 0;
779781
uint8_t surface = readPrimitiveOperandNG<uint8_t>(bytePos, buf);
780782
uint8_t plane = (ISA_MEDIA_LD == opcode || ISA_MEDIA_ST == opcode)
781783
? readPrimitiveOperandNG<uint8_t>(bytePos, buf)

‎visa/FlowGraph.cpp

Lines changed: 7 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -382,16 +382,14 @@ int64_t FlowGraph::insertDummyUUIDMov() {
382382
builder->createMov(g4::SIMD1, nullDst, randImm, InstOpt_NoOpt, false);
383383

384384
auto instItEnd = bb->end();
385-
auto it = bb->begin();
386-
387-
if (it != instItEnd) {
388-
if ((*it)->isLabel()) {
389-
bb->insertBefore(++it, movInst);
390-
return uuID;
391-
}
392-
393-
bb->push_front(movInst);
385+
for (auto it = bb->begin(); it != instItEnd; it++) {
386+
if ((*it)->isLabel()) {
387+
bb->insertBefore(++it, movInst);
394388
return uuID;
389+
}
390+
391+
bb->push_front(movInst);
392+
return uuID;
395393
}
396394
}
397395
}

‎visa/G4_IR.cpp

Lines changed: 8 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -2772,6 +2772,7 @@ bool G4_INST::isRAWdep(G4_INST *inst) {
27722772
G4_Operand *dst0 = inst->getDst();
27732773
G4_CondMod *cMod0 = inst->getCondMod();
27742774
G4_Operand *implicitDst0 = inst->getImplAccDst();
2775+
G4_Operand *msg1 = NULL;
27752776
G4_Predicate *pred1 = getPredicate();
27762777
G4_Operand *src1_0 = getSrc(0);
27772778
G4_Operand *src1_1 = getSrc(1);
@@ -2789,6 +2790,7 @@ bool G4_INST::isRAWdep(G4_INST *inst) {
27892790
src1_2->compareOperand(dst0, getBuilder()) != Rel_disjoint) ||
27902791
(src1_3 &&
27912792
src1_3->compareOperand(dst0, getBuilder()) != Rel_disjoint) ||
2793+
(msg1 && msg1->compareOperand(dst0, getBuilder()) != Rel_disjoint) ||
27922794
(pred1 && pred1->compareOperand(dst0, getBuilder()) != Rel_disjoint) ||
27932795
(implicitSrc1 &&
27942796
implicitSrc1->compareOperand(dst0, getBuilder()) != Rel_disjoint)) {
@@ -3893,7 +3895,7 @@ uint8_t G4_SrcRegRegion::getMaxExecSize(const IR_Builder &builder, int pos,
38933895
// conservative.
38943896
// Here we assume that no cross width if row size is larger than width
38953897
// mul (16) V112(0,0)<1>:f V111(0,0)<16;16,1>:f r1.0<1;4,0>:f
3896-
if (!alignToRow && desc->vertStride != 0 &&
3898+
if (!alignToRow && !contRegion && desc->vertStride != 0 &&
38973899
desc->horzStride != 0) {
38983900
wd = vs =
38993901
(uint16_t)roundDownPow2((pos / desc->width + 1) * desc->width - pos);
@@ -3926,7 +3928,7 @@ uint8_t G4_SrcRegRegion::getMaxExecSize(const IR_Builder &builder, int pos,
39263928
eleInFirstRow = desc->width - posInFirstRow;
39273929
uint8_t pow2 = roundDownPow2(eleInFirstRow);
39283930

3929-
if (eleInFirstRow != pow2) {
3931+
if (eleInFirstRow != pow2 && !contRegion) {
39303932
wd = pow2;
39313933
vs = wd * desc->horzStride;
39323934
return pow2;
@@ -3950,7 +3952,7 @@ uint8_t G4_SrcRegRegion::getMaxExecSize(const IR_Builder &builder, int pos,
39503952
elSize;
39513953

39523954
// check cross row boundary
3953-
if (posInRow == 0) {
3955+
if ((!contRegion || desc->vertStride == 0) && posInRow == 0) {
39543956
uint8_t pow2Val = roundDownPow2(eleInRow);
39553957
if (pow2Val != eleInRow ||
39563958
((desc->vertStride == 0 || negVS) && !alignToRow)) {
@@ -3984,7 +3986,7 @@ uint8_t G4_SrcRegRegion::getMaxExecSize(const IR_Builder &builder, int pos,
39843986
// subregister offset of two GRFs are different and not contiguous(too
39853987
// conservative?)
39863988
if (pow2Val != maxSize ||
3987-
(!(alignToRow && maxSize <= desc->width) &&
3989+
(!contRegion && !(alignToRow && maxSize <= desc->width) &&
39883990
newLB % builder.numEltPerGRF<Type_UB>() !=
39893991
(getLeftBound() + currPos) %
39903992
builder.numEltPerGRF<Type_UB>())) {
@@ -4006,7 +4008,7 @@ uint8_t G4_SrcRegRegion::getMaxExecSize(const IR_Builder &builder, int pos,
40064008
maxSize++;
40074009
eleInRow++;
40084010
// make sure the number of elements in two rows are the same
4009-
if (crossRow && eleInRow == eleInFirstRow && !alignToRow) {
4011+
if (crossRow && eleInRow == eleInFirstRow && !alignToRow && !contRegion) {
40104012
break;
40114013
}
40124014

@@ -5308,7 +5310,7 @@ unsigned G4_Predicate::computeRightBound(uint8_t exec_size) {
53085310

53095311
right_bound = left_bound + totalBits - 1;
53105312

5311-
bitVec[0] = exec_size >= 32 ? 0xFFFFFFFF : (1 << exec_size) - 1;
5313+
bitVec[0] = exec_size == 32 ? 0xFFFFFFFF : (1 << exec_size) - 1;
53125314
}
53135315

53145316
return right_bound;

‎visa/GraphColor.cpp

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -5550,7 +5550,7 @@ void Augmentation::buildSummaryForCallees() {
55505550
}
55515551
}
55525552
}
5553-
localSummaryOfCallee[func] = std::move(funcSummary);
5553+
localSummaryOfCallee[func] = funcSummary;
55545554
}
55555555
}
55565556

@@ -5634,7 +5634,7 @@ void Augmentation::augmentIntfGraph() {
56345634
dclIntervals.push_back(std::make_tuple(dcl, interval.interval.start,
56355635
interval.interval.end));
56365636
}
5637-
updateDebugInfo(kernel, std::move(dclIntervals));
5637+
updateDebugInfo(kernel, dclIntervals);
56385638
}
56395639

56405640
// Perform linear scan to augment graph
@@ -9696,7 +9696,9 @@ void VarSplit::localSplit(IR_Builder &builder, G4_BB *bb) {
96969696
if (topdcl && (topdclLR = gra.getLocalLR(topdcl)) &&
96979697
topdcl->getIsRefInSendDcl() && topdclLR->isLiveRangeLocal() &&
96989698
topdcl->getRegFile() == G4_GRF) {
9699-
G4_VarBase *base = src->asSrcRegRegion()->getBase();
9699+
G4_VarBase *base =
9700+
(topdcl != NULL ? topdcl->getRegVar()
9701+
: src->asSrcRegRegion()->getBase());
97009702

97019703
INST_LIST_ITER iterToInsert = rit.base();
97029704
iterToInsert--;

‎visa/Passes/AccSubstitution.cpp

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -912,7 +912,6 @@ struct AccAssignment {
912912
// on inst type/size) we have to spill active intervals that occupy acc0/acc1.
913913
// the pre-assigned interavl is also pushed to active list
914914
void handlePreAssignedInterval(AccInterval *interval) {
915-
vISA_ASSERT(interval->assignedAcc >= 0, "interval->assignedAcc can't be negative");
916915
if (!freeAccs[interval->assignedAcc]) {
917916
spillInterval(interval->assignedAcc);
918917
}

‎visa/ReduceExecSize.cpp

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -12,8 +12,6 @@ SPDX-License-Identifier: MIT
1212
#include "InstSplit.h"
1313
#include "Optimizer.h"
1414

15-
#include <algorithm>
16-
1715
using namespace vISA;
1816

1917
uint8_t HWConformity::checkMinExecSize(G4_opcode op) {
@@ -101,8 +99,8 @@ bool HWConformity::fixDstAlignmentWithVectorImm(INST_LIST_ITER iter,
10199
// we can interleave the vector to avoid a move
102100
// e.g., mov (2) r1.0<1>:d 0x21:uv -->
103101
// mov (2) r1.0<1>:d 0x0201:uv
104-
uint64_t bitValue = 0;
105-
uint32_t immBits = static_cast<uint32_t>(src->asImm()->getImm());
102+
uint32_t bitValue = 0;
103+
uint16_t immBits = (uint16_t)src->asImm()->getImm();
106104
for (int i = 0; i < execSize; ++i) {
107105
int val = (immBits >> (i * 4)) & 0xF;
108106
bitValue |= val << (i * 8);

‎visa/RegAlloc.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -670,7 +670,7 @@ void LivenessAnalysis::computeLiveness() {
670670
//
671671
// initialize entry block with payload input
672672
//
673-
def_in[fg.getEntryBB()->getId()] = std::move(inputDefs);
673+
def_in[fg.getEntryBB()->getId()] = inputDefs;
674674

675675
//
676676
// forward flow analysis to propagate defs (locate first defs)

‎visa/iga/IGALibrary/Frontend/Formatter.hpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -208,10 +208,10 @@ class BasicFormatter {
208208
// enables you emit a list of things
209209
//
210210
// emit(foo, bar, baz, ...);
211-
template <typename T, typename... Ts> void emit(const T& t) { emitT(t); }
212-
template <typename T, typename... Ts> void emit(const T& t, const Ts&... ts) {
213-
emitT(t);
214-
emit(ts...);
211+
template <typename T, typename... Ts> void emit(T t) { emitT(t); }
212+
template <typename T, typename... Ts> void emit(T t, Ts... ts) {
213+
emitT(std::move(t));
214+
emit(std::move(ts)...);
215215
}
216216

217217
// emits an sequence conditionally surrounded by an ANSI color

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