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Validate cache control support in EmitVISAPass.cpp
Move platform specific validation of cache controls to a later stage in compilation.
1 parent 7f79a7e commit 1f95617

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5 files changed

+390
-88
lines changed

5 files changed

+390
-88
lines changed

‎IGC/AdaptorOCL/Utils/CacheControlsHelper.h

Lines changed: 17 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -54,7 +54,6 @@ namespace IGC
5454
{
5555
T L1;
5656
T L3;
57-
GFXCORE_FAMILY MinimumSupportedCoreFamily = IGFX_XE_HP_CORE;
5857
};
5958

6059
template<typename T>
@@ -80,9 +79,9 @@ namespace IGC
8079
{ LSC_L1S_L3UC, { LoadCacheControl::Streaming, LoadCacheControl::Uncached } },
8180
{ LSC_L1S_L3C_WB, { LoadCacheControl::Streaming, LoadCacheControl::Cached } },
8281
{ LSC_L1IAR_WB_L3C_WB, { LoadCacheControl::InvalidateAfterRead, LoadCacheControl::Cached } },
83-
{ LSC_L1UC_L3CC, { LoadCacheControl::Uncached, LoadCacheControl::ConstCached, IGFX_XE2_LPG_CORE } },
84-
{ LSC_L1C_L3CC, { LoadCacheControl::Cached, LoadCacheControl::ConstCached, IGFX_XE2_LPG_CORE } },
85-
{ LSC_L1IAR_L3IAR, { LoadCacheControl::InvalidateAfterRead, LoadCacheControl::InvalidateAfterRead, IGFX_XE2_LPG_CORE } },
82+
{ LSC_L1UC_L3CC, { LoadCacheControl::Uncached, LoadCacheControl::ConstCached, } },
83+
{ LSC_L1C_L3CC, { LoadCacheControl::Cached, LoadCacheControl::ConstCached, } },
84+
{ LSC_L1IAR_L3IAR, { LoadCacheControl::InvalidateAfterRead, LoadCacheControl::InvalidateAfterRead } },
8685
};
8786

8887
using CacheLevel = uint64_t;
@@ -132,44 +131,42 @@ namespace IGC
132131
return {};
133132
}
134133

135-
inline LSC_L1_L3_CC mapToLSCCacheControl(CodeGenContext *ctx, StoreCacheControl L1Control, StoreCacheControl L3Control)
134+
inline LSC_L1_L3_CC mapToLSCCacheControl(StoreCacheControl L1Control, StoreCacheControl L3Control)
136135
{
137136
for (auto& [LSCEnum, SPIRVEnum] : supportedStoreConfigs)
138-
if (SPIRVEnum.L1 == L1Control && SPIRVEnum.L3 == L3Control && ctx->platform.isCoreChildOf(SPIRVEnum.MinimumSupportedCoreFamily))
137+
if (SPIRVEnum.L1 == L1Control && SPIRVEnum.L3 == L3Control)
139138
return LSCEnum;
140139

141140
return LSC_CC_INVALID;
142141
}
143142

144-
inline LSC_L1_L3_CC mapToLSCCacheControl(CodeGenContext *ctx, LoadCacheControl L1Control, LoadCacheControl L3Control)
143+
inline LSC_L1_L3_CC mapToLSCCacheControl(LoadCacheControl L1Control, LoadCacheControl L3Control)
145144
{
146145
for (auto& [LSCEnum, SPIRVEnum] : supportedLoadConfigs)
147-
if (SPIRVEnum.L1 == L1Control && SPIRVEnum.L3 == L3Control && ctx->platform.isCoreChildOf(SPIRVEnum.MinimumSupportedCoreFamily))
146+
if (SPIRVEnum.L1 == L1Control && SPIRVEnum.L3 == L3Control)
148147
return LSCEnum;
149148

150149
return LSC_CC_INVALID;
151150
}
152151

153152
template<typename T>
154-
std::pair<T, T> mapToSPIRVCacheControl(CodeGenContext*, LSC_L1_L3_CC) = delete;
153+
SeparateCacheControlsL1L3<T> mapToSPIRVCacheControl(LSC_L1_L3_CC) = delete;
155154

156155
template <>
157-
inline std::pair<LoadCacheControl, LoadCacheControl> mapToSPIRVCacheControl<LoadCacheControl>(CodeGenContext *ctx, LSC_L1_L3_CC LSCControl)
156+
inline SeparateCacheControlsL1L3<LoadCacheControl> mapToSPIRVCacheControl<LoadCacheControl>(LSC_L1_L3_CC LSCControl)
158157
{
159158
if (auto I = supportedLoadConfigs.find(LSCControl); I != supportedLoadConfigs.end())
160-
if (ctx->platform.isCoreChildOf(I->second.MinimumSupportedCoreFamily))
161-
return { I->second.L1, I->second.L3 };
159+
return I->second;
162160

163161
IGC_ASSERT_MESSAGE(false, "Unsupported cache controls combination!");
164162
return { LoadCacheControl::Invalid, LoadCacheControl::Invalid };
165163
}
166164

167165
template <>
168-
inline std::pair<StoreCacheControl, StoreCacheControl> mapToSPIRVCacheControl<StoreCacheControl>(CodeGenContext *ctx, LSC_L1_L3_CC LSCControl)
166+
inline SeparateCacheControlsL1L3<StoreCacheControl> mapToSPIRVCacheControl<StoreCacheControl>(LSC_L1_L3_CC LSCControl)
169167
{
170168
if (auto I = supportedStoreConfigs.find(LSCControl); I != supportedStoreConfigs.end())
171-
if (ctx->platform.isCoreChildOf(I->second.MinimumSupportedCoreFamily))
172-
return { I->second.L1, I->second.L3 };
169+
return I->second;
173170

174171
IGC_ASSERT_MESSAGE(false, "Unsupported cache controls combination!");
175172
return { StoreCacheControl::Invalid, StoreCacheControl::Invalid };
@@ -261,14 +258,14 @@ namespace IGC
261258
}
262259

263260
LSC_L1_L3_CC defaultLSCCacheControls = static_cast<LSC_L1_L3_CC>(cacheDefault);
264-
auto [L1Default, L3Default] = mapToSPIRVCacheControl<T>(ctx, defaultLSCCacheControls);
265-
IGC_ASSERT(L1Default != T::Invalid && L3Default != T::Invalid);
261+
auto L1L3Default = mapToSPIRVCacheControl<T>(defaultLSCCacheControls);
262+
IGC_ASSERT(L1L3Default.L1 != T::Invalid && L1L3Default.L3 != T::Invalid);
266263

267-
T newL1CacheControl = L1CacheControl ? L1CacheControl.value() : L1Default;
268-
T newL3CacheControl = L3CacheControl ? L3CacheControl.value() : L3Default;
264+
T newL1CacheControl = L1CacheControl ? L1CacheControl.value() : L1L3Default.L1;
265+
T newL3CacheControl = L3CacheControl ? L3CacheControl.value() : L1L3Default.L3;
269266

270267
LSC_L1_L3_CC newLSCCacheControl =
271-
mapToLSCCacheControl(ctx, newL1CacheControl, newL3CacheControl);
268+
mapToLSCCacheControl(newL1CacheControl, newL3CacheControl);
272269

273270
if (newLSCCacheControl == LSC_CC_INVALID)
274271
{

‎IGC/Compiler/CISACodeGen/EmitVISAPass.cpp

Lines changed: 41 additions & 33 deletions
Original file line numberDiff line numberDiff line change
@@ -21641,10 +21641,30 @@ void EmitPass::emitsrnd(llvm::GenIntrinsicInst* GII)
2164121641
}
2164221642
}
2164321643

21644-
static LSC_CACHE_OPTS translateLSCCacheControlsEnum(
21645-
LSC_L1_L3_CC l1l3cc, bool isLoad
21646-
)
21644+
bool EmitPass::isSupportedLSCCacheControlsEnum(LSC_L1_L3_CC l1l3cc, bool isLoad) const
21645+
{
21646+
if (isLoad)
21647+
{
21648+
switch (l1l3cc)
21649+
{
21650+
default: break;
21651+
case LSC_L1UC_L3CC:
21652+
case LSC_L1C_L3CC:
21653+
case LSC_L1IAR_L3IAR:
21654+
return (m_pCtx->platform.isCoreChildOf(IGFX_XE2_LPG_CORE));
21655+
}
21656+
}
21657+
return true;
21658+
}
21659+
21660+
LSC_CACHE_OPTS EmitPass::translateLSCCacheControlsEnum(
21661+
LSC_L1_L3_CC l1l3cc, bool isLoad, const Value* warningContextValue) const
2164721662
{
21663+
if (!isSupportedLSCCacheControlsEnum(l1l3cc, isLoad)) {
21664+
m_pCtx->EmitWarning("Unsupported cache controls configuration requested. Applying default configuration.", warningContextValue);
21665+
l1l3cc = LSC_L1DEF_L3DEF;
21666+
}
21667+
2164821668
LSC_CACHE_OPTS cacheOpts {LSC_CACHING_DEFAULT, LSC_CACHING_DEFAULT};
2164921669
switch (l1l3cc)
2165021670
{
@@ -21716,15 +21736,13 @@ LSC_CACHE_OPTS EmitPass::translateLSCCacheControlsFromValue(
2171621736
{
2171721737
return translateLSCCacheControlsEnum(
2171821738
static_cast<LSC_L1_L3_CC>(cast<ConstantInt>(value)->getSExtValue()),
21719-
isLoad
21720-
);
21739+
isLoad, value);
2172121740
}
2172221741

21723-
static Optional<LSC_CACHE_OPTS>
21724-
setCacheOptionsForConstantBufferLoads(Instruction& inst, LSC_L1_L3_CC Ctrl
21725-
)
21742+
Optional<LSC_CACHE_OPTS>
21743+
EmitPass::cacheOptionsForConstantBufferLoads(Instruction* inst, LSC_L1_L3_CC Ctrl) const
2172621744
{
21727-
if (const Value* resourcePointer = GetBufferOperand(&inst))
21745+
if (const Value* resourcePointer = GetBufferOperand(inst))
2172821746
{
2172921747
uint addressSpace = resourcePointer->getType()->getPointerAddressSpace();
2173021748
BufferType bufferType = GetBufferType(addressSpace);
@@ -21733,37 +21751,34 @@ setCacheOptionsForConstantBufferLoads(Instruction& inst, LSC_L1_L3_CC Ctrl
2173321751
(bufferType == BINDLESS_CONSTANT_BUFFER) ||
2173421752
(bufferType == SSH_BINDLESS_CONSTANT_BUFFER))
2173521753
{
21736-
return translateLSCCacheControlsEnum(Ctrl, true
21737-
);
21754+
return translateLSCCacheControlsEnum(Ctrl, true, inst);
2173821755
}
2173921756
}
2174021757
return None;
2174121758
}
2174221759

2174321760
Optional<LSC_CACHE_OPTS>
21744-
EmitPass::setCacheOptionsForConstantBufferLoads(Instruction& inst) const
21761+
EmitPass::cacheOptionsForConstantBufferLoads(Instruction* inst) const
2174521762
{
2174621763
Optional<LSC_CACHE_OPTS> cacheOpts;
2174721764
if (IGC_IS_FLAG_DISABLED(DisableSystemMemoryCachingInGPUForConstantBuffers) &&
2174821765
m_currShader->m_Platform->isCoreChildOf(IGFX_XE2_LPG_CORE))
2174921766
{
21750-
if (auto Opts = ::setCacheOptionsForConstantBufferLoads(inst, LSC_L1C_L3CC
21751-
))
21767+
if (auto Opts = cacheOptionsForConstantBufferLoads(inst, LSC_L1C_L3CC))
2175221768
cacheOpts = *Opts;
2175321769
}
2175421770
if (m_pCtx->type == ShaderType::RAYTRACING_SHADER &&
2175521771
IGC_IS_FLAG_ENABLED(ForceRTConstantBufferCacheCtrl))
2175621772
{
2175721773
auto Ctrl = (LSC_L1_L3_CC)IGC_GET_FLAG_VALUE(RTConstantBufferCacheCtrl);
21758-
if (auto Opts = ::setCacheOptionsForConstantBufferLoads(inst, Ctrl
21759-
))
21774+
if (auto Opts = cacheOptionsForConstantBufferLoads(inst, Ctrl))
2176021775
cacheOpts = *Opts;
2176121776
}
2176221777
return cacheOpts;
2176321778
}
2176421779

21765-
static bool tryOverrideCacheOpts(LSC_CACHE_OPTS& cacheOpts, bool isLoad, bool isTGM
21766-
)
21780+
bool EmitPass::tryOverrideCacheOpts(LSC_CACHE_OPTS& cacheOpts, bool isLoad, bool isTGM,
21781+
const Value* warningContextValue) const
2176721782
{
2176821783
uint32_t l1l3CacheVal = 0;
2176921784

@@ -21782,9 +21797,7 @@ static bool tryOverrideCacheOpts(LSC_CACHE_OPTS& cacheOpts, bool isLoad, bool is
2178221797

2178321798
if (l1l3CacheVal != 0)
2178421799
{
21785-
cacheOpts = translateLSCCacheControlsEnum(
21786-
static_cast<LSC_L1_L3_CC>(l1l3CacheVal), isLoad
21787-
);
21800+
cacheOpts = translateLSCCacheControlsEnum(static_cast<LSC_L1_L3_CC>(l1l3CacheVal), isLoad, warningContextValue);
2178821801
}
2178921802
return l1l3CacheVal != 0;
2179021803
}
@@ -21812,8 +21825,7 @@ LSC_CACHE_OPTS EmitPass::translateLSCCacheControlsFromMetadata(
2181221825
{
2181321826
if (m_pCtx->platform.supportsNonDefaultLSCCacheSetting())
2181421827
{
21815-
if (tryOverrideCacheOpts(cacheOpts, isLoad, isTGM
21816-
))
21828+
if (tryOverrideCacheOpts(cacheOpts, isLoad, isTGM, inst))
2181721829
{
2181821830
// global override cache settings have highest priority
2181921831
return cacheOpts;
@@ -21839,14 +21851,12 @@ LSC_CACHE_OPTS EmitPass::translateLSCCacheControlsFromMetadata(
2183921851
if (isLoad && m_pCtx->getModuleMetaData()->compOpt.LoadCacheDefault != -1)
2184021852
{ // load
2184121853
LSC_L1_L3_CC L1L3Val = static_cast<LSC_L1_L3_CC>(m_pCtx->getModuleMetaData()->compOpt.LoadCacheDefault);
21842-
cacheOpts = translateLSCCacheControlsEnum(L1L3Val, true
21843-
);
21854+
cacheOpts = translateLSCCacheControlsEnum(L1L3Val, true, inst);
2184421855
}
2184521856
else if (!isLoad && m_pCtx->getModuleMetaData()->compOpt.StoreCacheDefault != -1)
2184621857
{ // store
2184721858
LSC_L1_L3_CC L1L3Val = static_cast<LSC_L1_L3_CC>(m_pCtx->getModuleMetaData()->compOpt.StoreCacheDefault);
21848-
cacheOpts = translateLSCCacheControlsEnum(L1L3Val, false
21849-
);
21859+
cacheOpts = translateLSCCacheControlsEnum(L1L3Val, false, inst);
2185021860
}
2185121861
}
2185221862

@@ -21869,8 +21879,7 @@ LSC_CACHE_OPTS EmitPass::translateLSCCacheControlsFromMetadata(
2186921879
}
2187021880
}
2187121881

21872-
if (tryOverrideCacheOpts(cacheOpts, isLoad, isTGM
21873-
))
21882+
if (tryOverrideCacheOpts(cacheOpts, isLoad, isTGM, inst))
2187421883
{
2187521884
// global override cache settings have highest priority
2187621885
return cacheOpts;
@@ -21901,7 +21910,7 @@ LSC_CACHE_OPTS EmitPass::translateLSCCacheControlsFromMetadata(
2190121910

2190221911
if (inst && isLoad)
2190321912
{
21904-
if (auto Opts = setCacheOptionsForConstantBufferLoads(*inst))
21913+
if (auto Opts = cacheOptionsForConstantBufferLoads(inst))
2190521914
cacheOpts = *Opts;
2190621915
}
2190721916

@@ -22110,7 +22119,7 @@ void EmitPass::emitLscIntrinsicLoad(llvm::GenIntrinsicInst* inst)
2211022119
LSC_CACHE_OPTS cacheOpts = translateLSCCacheControlsFromValue(inst->getOperand(4), true);
2211122120
LSC_DOC_ADDR_SPACE addrSpace = m_pCtx->getUserAddrSpaceMD().Get(inst);
2211222121

22113-
if (auto Opts = setCacheOptionsForConstantBufferLoads(*inst))
22122+
if (auto Opts = cacheOptionsForConstantBufferLoads(inst))
2211422123
cacheOpts = *Opts;
2211522124

2211622125
emitLscIntrinsicFragments(m_destination, dataSize, dataElems, immOffset,
@@ -23094,8 +23103,7 @@ LSC_CACHE_OPTS EmitPass::getDefaultRaytracingCachePolicy(bool isLoad) const
2309423103
LSC_L1IAR_WB_L3C_WB;
2309523104
}
2309623105

23097-
return translateLSCCacheControlsEnum(Opts, isLoad
23098-
);
23106+
return translateLSCCacheControlsEnum(Opts, isLoad, nullptr);
2309923107
}
2310023108

2310123109
void EmitPass::emitAsyncStackID(llvm::GenIntrinsicInst *I)

‎IGC/Compiler/CISACodeGen/EmitVISAPass.hpp

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -356,7 +356,9 @@ class EmitPass : public llvm::FunctionPass
356356
void emitFastClearSend(llvm::Instruction* pInst);
357357
void setRovCacheCtrl(llvm::GenIntrinsicInst* inst);
358358
llvm::Optional<LSC_CACHE_OPTS>
359-
setCacheOptionsForConstantBufferLoads(Instruction& inst) const;
359+
cacheOptionsForConstantBufferLoads(Instruction* inst, LSC_L1_L3_CC Ctrl) const;
360+
llvm::Optional<LSC_CACHE_OPTS>
361+
cacheOptionsForConstantBufferLoads(Instruction* inst) const;
360362
bool useRasterizerOrderedByteAddressBuffer(llvm::GenIntrinsicInst* inst);
361363
void emitUniformAtomicCounter(llvm::GenIntrinsicInst* pInst);
362364

@@ -539,6 +541,9 @@ class EmitPass : public llvm::FunctionPass
539541
void emitHDCuncompressedwrite(llvm::GenIntrinsicInst* I);
540542
////////////////////////////////////////////////////////////////////
541543
// LSC related functions
544+
bool tryOverrideCacheOpts(LSC_CACHE_OPTS& cacheOpts, bool isLoad, bool isTGM, const llvm::Value* warningContextValue) const;
545+
bool isSupportedLSCCacheControlsEnum(LSC_L1_L3_CC l1l3cc, bool isLoad) const;
546+
LSC_CACHE_OPTS translateLSCCacheControlsEnum(LSC_L1_L3_CC l1l3cc, bool isLoad, const llvm::Value* warningContextValue) const;
542547
LSC_CACHE_OPTS translateLSCCacheControlsFromValue(
543548
llvm::Value *value, bool isLoad) const;
544549
LSC_CACHE_OPTS translateLSCCacheControlsFromMetadata(

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