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Fix generation of variable location descriptor for llvm.dbg.declare
For support llvm.declare - it is necessary to make the correct sequence to access the memory location. In base implementation for llvm.declare generates sequence ``` 0: DW_OP_breg[x] 1: DW_OP_const1u 2: DW_OP_const1u 3: DW_OP_INTEL_push_bit_piece_stack ``` DW_OP_breg[x] - was generated by method addRegisterLoc. But in intel DWARF extensions - Item #3, transforms the original "register location" defined by Item #0 to a "memory location". And this sequence becomes incorrect, because DW_OP_breg is addressing operation, which pushed on stack contents of a register(but here expecting register location). Here operations DW_OP_breg[x] is replaced for DW_OP_reg[x], that returns register location for reg. Sequence for llvm.declare after current change will be: ``` 0: DW_OP_reg[x] 1: DW_OP_const1u 2: DW_OP_const1u 3: DW_OP_INTEL_push_bit_piece_stack ```
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IGC/DebugInfo/DwarfCompileUnit.cpp

Lines changed: 1 addition & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -486,10 +486,7 @@ void CompileUnit::addSourceLine(DIE* Die, DIType* Ty)
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void CompileUnit::addRegisterLoc(IGC::DIEBlock* TheDie, unsigned DWReg, int64_t Offset, const llvm::Instruction* dbgInst)
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{
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if (isa<llvm::DbgDeclareInst>(dbgInst))
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addRegisterOffset(TheDie, DWReg, Offset);
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else
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addRegisterOp(TheDie, DWReg);
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addRegisterOp(TheDie, DWReg);
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}
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/// addRegisterOp - Add register operand.

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