[IGC vISA] Fix the data flow analysis issue for the case that uses are scalar or indirect operands

1, If the uses are scalar or indirect 1x1/vx1 operands, we should treat the uses as
if they are NoMask, and any non-NoMask instruction can't kill it. This applies to both
GRF and ARF.
2, IF the uses are indirect vxh operands, we should handle address register
separately but not the same as GRF in alignedWithChannelMask.

Author: fangliu2020

visa/G4_IR.cpp

@@ -1790,6 +1790,11 @@ bool G4_INST::canPropagateTo(G4_INST *useInst, Gen4_Operand_Number opndNum,
   G4_Operand *use = useInst->getOperand(opndNum);
   G4_Type useType = use->getType();
 
+  if (use->isIndirect()) {
+    // don't copy propagate for address register used in indirect access
+    return false;
+  }
+
   // If the operand to be copied is acc register, need to check if the use
   // operand can use acc register
   if (src->isAccReg()) {
@@ -6020,6 +6025,12 @@ bool G4_Operand::isIndirect() const {
   return false;
 }
 
+bool G4_Operand::isVxHIndirect() const {
+  if (isSrcRegRegion())
+    return asSrcRegRegion()->isVxHIndirect();
+  return false;
+}
+
 bool G4_Operand::crossGRF(const IR_Builder &builder) {
   return getRightBound() / builder.numEltPerGRF<Type_UB>() !=
          getLeftBound() / builder.numEltPerGRF<Type_UB>();

visa/G4_Operand.h

@@ -227,6 +227,7 @@ class G4_Operand {
   G4_VarBase *getBase() { return base; }
   void setBase(G4_VarBase *b) { base = b; }
   bool isIndirect() const;
+  bool isVxHIndirect() const;
 
   const G4_Declare *getBaseRegVarRootDeclare() const;
   G4_Declare *getBaseRegVarRootDeclare();
@@ -598,6 +599,10 @@ class G4_SrcRegRegion final : public G4_Operand {
 
   bool isIndirect() const { return acc != Direct; }
 
+  bool isVxHIndirect() const {
+    return isIndirect() && getRegion()->isRegionWH() && getRegion()->width == 1;
+  }
+
   unsigned computeRightBound(uint8_t exec_size) override;
   G4_CmpRelation compareOperand(G4_Operand *opnd,
                                 const IR_Builder &builder) override;

visa/LocalDataflow.cpp

@@ -261,7 +261,14 @@ bool LiveNode::addDefinition(G4_INST *DefInst, Gen4_Operand_Number DefOpNum,
 
 bool LiveNode::dependsOnChannelMask(bool IsInSimdFlow, G4_INST *Inst,
                                     Gen4_Operand_Number OpNum) {
-  if (!IsInSimdFlow || Inst->isWriteEnableInst())
+  // Treat scalar and indirect 1x1/Vx1 uses as noMask. Any non-noMask
+  // inst can't kill it.
+  auto opnd = Inst->getOperand(OpNum);
+  bool isScalarSrc = opnd->isScalarSrc();
+  bool isIndirect1x1Vx1 = opnd->isIndirect() && !opnd->isVxHIndirect();
+
+  if (!IsInSimdFlow || Inst->isWriteEnableInst() || isScalarSrc ||
+      isIndirect1x1Vx1)
     return false;
 
   // Otherwise.
@@ -304,6 +311,13 @@ bool LiveNode::alignedWithChannelMask(G4_INST *DefInst,
     return DefOffset == UseOffset;
   }
 
+  // UseOpnd is indirect VxH
+  if (UseOpnd->isVxHIndirect()) {
+    int DefOffset = int(DefLB - DefMaskOffset * TypeSize(ADDR_REG_TYPE));
+    int UseOffset = int(UseLB - UseMaskOffset * TypeSize(ADDR_REG_TYPE));
+    return DefOffset == UseOffset;
+  }
+
   // Do not analyze instructions that may exceed two GRF boundary
   if (DefInst->mayExceedTwoGRF() || UseInst->mayExceedTwoGRF())
     return true;