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Fix a bug in pre-RA ACC substitution
Fix a bug in pre-RA ACC substitution
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+22
-5
lines changed

1 file changed

+22
-5
lines changed

visa/G4_IR.cpp

Lines changed: 22 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -8353,19 +8353,36 @@ bool G4_INST::canSrcBeAccAfterHWConform(Gen4_Operand_Number opndNum) const
83538353
G4_SrcRegRegion* src = getSrc(srcId)->asSrcRegRegion();
83548354

83558355
// dst must be GRF-aligned
8356-
if ((getDst()->getLinearizedStart() % getBuilder().numEltPerGRF<Type_UB>()) != 0)
8356+
if (G4_VarBase* base = dst->getBase())
83578357
{
8358-
if (!(isMixedMode() && builder.getPlatform() == Xe_XeHPSDV))
8359-
return false;
8358+
if (base->isRegVar())
8359+
{
8360+
if (base->asRegVar()->isPhyRegAssigned())
8361+
{
8362+
if ((dst->getLinearizedStart() % getBuilder().numEltPerGRF<Type_UB>()) != 0)
8363+
{
8364+
if (!(isMixedMode() && builder.getPlatform() == Xe_XeHPSDV))
8365+
return false;
8366+
}
8367+
}
8368+
else
8369+
{
8370+
//If the destination offset is not GRF aligned, such as has sub register offset, the src cannot be replaced with ACC
8371+
if (!builder.isOpndAligned(dst, getBuilder().numEltPerGRF<Type_UB>()))
8372+
{
8373+
return false;
8374+
}
8375+
}
8376+
}
83608377
}
83618378

83628379
// check that src0 and dst have the same type/alignment
8363-
auto dstEltSize = getDst()->getHorzStride() * getDst()->getTypeSize();
8380+
auto dstEltSize = dst->getHorzStride() * dst->getTypeSize();
83648381
if (dstEltSize > TypeSize(src->getType()))
83658382
{
83668383
return false;
83678384
}
8368-
else if (isLowPrecisionFloatTy(getDst()->getType()) && src->getType() == Type_F &&
8385+
else if (isLowPrecisionFloatTy(dst->getType()) && src->getType() == Type_F &&
83698386
dstEltSize == 2)
83708387
{
83718388
if (builder.relaxedACCRestrictions())

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