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DianaChenigcbot
DianaChen
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IGC: Move CompilerStats from vISA to IGC/common (NFC)
CompilerStats is the IGC utils which collects stats throughout compilation. Its data is structured for multiple simd-width attributes, which is not aligned with vISA's structure that vISA::IR_Builder and vISA::VISAKernel are built for single simd-width. This change move CompilerStats completely out of vISA: - Remove CompilerStats from vISA::IR_Builder and vISA::VISAKernel. - Remove the code to link CompilerStats instances across vISA and IGC's CodeGenContext - Add vISA stats needed by CompilerStats into vISA::FINALIZER_INFO. Note that some stats might be the same and can be merged with existing ones in vISA::FINALIZER_INFO. Further refoactoring is upcoming. - Move CompilerStats.h from vISA to IGC/common/ - Upddate IGC::CompilerStatsUtils to remvoe the vISA's CompilerStats usage
1 parent 6fb96d3 commit 289297d

16 files changed

+49
-86
lines changed

‎IGC/Compiler/CISACodeGen/CISABuilder.cpp

Lines changed: 2 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -6130,9 +6130,7 @@ namespace IGC
61306130

61316131
if (IGC_IS_FLAG_ENABLED(DumpCompilerStats))
61326132
{
6133-
CompilerStats CompilerStats;
6134-
pMainKernel->GetCompilerStats(CompilerStats);
6135-
CompilerStatsUtils::RecordCodeGenCompilerStats(context, m_program->m_dispatchSize, CompilerStats, jitInfo);
6133+
CompilerStatsUtils::RecordCodeGenCompilerStats(context, m_program->m_dispatchSize, jitInfo);
61366134
}
61376135

61386136
if (vIsaCompile == -1)
@@ -8597,11 +8595,9 @@ namespace IGC
85978595

85988596
void CEncoder::ReportCompilerStatistics(VISAKernel* pMainKernel, SProgramOutput* pOutput)
85998597
{
8600-
CompilerStats compilerStats;
8601-
pMainKernel->GetCompilerStats(compilerStats);
8598+
CompilerStats& compilerStats = m_program->GetContext()->Stats();
86028599
int simdsize = GetThreadCount(m_program->m_dispatchSize);
86038600

8604-
86058601
// set optional statistics
86068602
if (compilerStats.Find(CompilerStats::numCyclesStr()))
86078603
{

‎IGC/VectorCompiler/lib/GenXCodeGen/GenXCisaBuilder.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -73,7 +73,9 @@ SPDX-License-Identifier: MIT
7373
#include "llvmWrapper/IR/Instructions.h"
7474

7575
#include <algorithm>
76+
#include <iostream>
7677
#include <map>
78+
#include <sstream>
7779
#include <string>
7880
#include <vector>
7981

‎IGC/common/CMakeLists.txt

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -51,6 +51,7 @@ set(IGC_BUILD__SRC__IGC_common
5151
)
5252

5353
set(IGC_BUILD__HDR__common
54+
"${CMAKE_CURRENT_SOURCE_DIR}/CompilerStats.h"
5455
"${CMAKE_CURRENT_SOURCE_DIR}/CompilerStatsUtils.hpp"
5556
"${CMAKE_CURRENT_SOURCE_DIR}/igc_debug.h"
5657
"${CMAKE_CURRENT_SOURCE_DIR}/igc_flags.hpp"

‎visa/include/CompilerStats.h renamed to ‎IGC/common/CompilerStats.h

File renamed without changes.

‎IGC/common/CompilerStatsUtils.cpp

Lines changed: 12 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -41,7 +41,6 @@ namespace IGC
4141

4242
void RecordCodeGenCompilerStats(IGC::CodeGenContext *context,
4343
SIMDMode dispatchSize,
44-
CompilerStats &vISACompilerStats,
4544
FINALIZER_INFO *jitInfo)
4645
{
4746
#if COMPILER_STATS_ENABLE
@@ -61,8 +60,6 @@ namespace IGC
6160
{
6261
simdsize = 32;
6362
}
64-
// Copy from vISACompilerStats to compilerStats
65-
compilerStats.MergeStats(vISACompilerStats, simdsize);
6663

6764
compilerStats.SetF64("TimeVISACompile",
6865
context->m_compilerTimeStats->getCompileTimeMS(TIME_CG_vISACompile), simdsize);
@@ -84,6 +81,18 @@ namespace IGC
8481
compilerStats.SetI64("numGRFSpillFill", jitInfo->numGRFSpillFill, simdsize);
8582
compilerStats.SetI64("numFlagSpillFill", jitInfo->numFlagSpillStore + jitInfo->numFlagSpillLoad, simdsize);
8683
compilerStats.SetI64("numInst", jitInfo->numAsmCount, simdsize);
84+
if (jitInfo->preRASchedulerForPressure)
85+
compilerStats.SetFlag("PreRASchedulerForPressure", simdsize);
86+
if (jitInfo->preRASchedulerForLatency)
87+
compilerStats.SetFlag("PreRASchedulerForLatency", simdsize);
88+
compilerStats.SetI64(compilerStats.numSendStr(), jitInfo->numSendInst, simdsize);
89+
compilerStats.SetI64(compilerStats.numGRFSpillStr(), jitInfo->numSendInst, simdsize);
90+
compilerStats.SetI64(compilerStats.numGRFFillStr(), jitInfo->numSendInst, simdsize);
91+
compilerStats.SetI64(compilerStats.numCyclesStr(), jitInfo->numSendInst, simdsize);
92+
if (!jitInfo->raStatus.empty()) {
93+
compilerStats.SetFlag("IsRAsuccessful", simdsize);
94+
compilerStats.SetFlag(jitInfo->raStatus, simdsize);
95+
}
8796
}
8897
#endif // COMPILER_STATS_ENABLE
8998
}

‎IGC/common/CompilerStatsUtils.hpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -8,6 +8,7 @@ SPDX-License-Identifier: MIT
88

99
#pragma once
1010

11+
#include "CompilerStats.h"
1112
#include "Compiler/CodeGenPublic.h" // needed for IGC::CodeGenContext?
1213
#include "JitterDataStruct.h" // needed for FINALIZER_INFO
1314

@@ -18,7 +19,6 @@ namespace IGC
1819
void RecordCompileTimeStats(IGC::CodeGenContext *context);
1920
void RecordCodeGenCompilerStats(IGC::CodeGenContext *context,
2021
SIMDMode dispatchSize,
21-
CompilerStats &vISACompilerStats,
2222
FINALIZER_INFO *jitInfo);
2323
void OutputCompilerStats(IGC::CodeGenContext *context);
2424
}

‎visa/BuildIR.h

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -18,7 +18,6 @@ SPDX-License-Identifier: MIT
1818
#include "BitSet.h"
1919
#include "Common_ISA.h"
2020
#include "Common_ISA_util.h"
21-
#include "CompilerStats.h"
2221
#include "G4_IR.hpp"
2322
#include "G4_Kernel.hpp"
2423
#include "InstSplit.h"
@@ -298,7 +297,6 @@ class IR_Builder {
298297
USE_DEF_ALLOCATOR useDefAllocator;
299298

300299
FINALIZER_INFO *metaData = nullptr;
301-
CompilerStats compilerStats;
302300
// Use a BitSet to track the barrier IDs used
303301
BitSet usedBarriers;
304302

@@ -658,7 +656,6 @@ class IR_Builder {
658656
return kernel.getGenxSamplerIOSize();
659657
}
660658
FINALIZER_INFO *getJitInfo() { return metaData; }
661-
CompilerStats &getcompilerStats() { return compilerStats; }
662659
BitSet &usedBarries() { return usedBarriers; }
663660
// Return the max id set + 1 as the number of barriers used. Ideally the
664661
// number of bits set can be used to represent the number of barriers.

‎visa/LocalScheduler/G4_Sched.cpp

Lines changed: 6 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -1172,8 +1172,7 @@ bool BB_Scheduler::scheduleBlockForPressure(unsigned &MaxPressure,
11721172
if (commitIfBeneficial(MaxPressure)) {
11731173
SCHED_DUMP(rp.dump(ddd.getBB(), "After scheduling for presssure, "));
11741174
Changed = true;
1175-
kernel.fg.builder->getcompilerStats().SetFlag("PreRASchedulerForPressure",
1176-
this->kernel.getSimdSize());
1175+
kernel.fg.builder->getJitInfo()->preRASchedulerForPressure = true;
11771176
} else if (!config.DoClustering &&
11781177
!isSlicedSIMD32(ddd.getKernel())) { // try clustering
11791178
ddd.reset(false);
@@ -1184,8 +1183,7 @@ bool BB_Scheduler::scheduleBlockForPressure(unsigned &MaxPressure,
11841183
if (commitIfBeneficial(MaxPressure)) {
11851184
SCHED_DUMP(rp.dump(ddd.getBB(), "After scheduling for presssure, "));
11861185
Changed = true;
1187-
kernel.fg.builder->getcompilerStats().SetFlag(
1188-
"PreRASchedulerForPressure", this->kernel.getSimdSize());
1186+
kernel.fg.builder->getJitInfo()->preRASchedulerForPressure = true;
11891187
}
11901188
}
11911189
}
@@ -1417,8 +1415,7 @@ bool BB_Scheduler::scheduleBlockForLatency(unsigned &MaxPressure,
14171415
if (NumGrfs >= UpperBoundGRF && SavedEstimation == 0) {
14181416
SCHED_DUMP(rp.dump(ddd.getBB(), "After scheduling for latency, "));
14191417
ddd.getBB()->setLatencySched(true);
1420-
kernel.fg.builder->getcompilerStats().SetFlag(
1421-
"PreRASchedulerForLatency", this->kernel.getSimdSize());
1418+
kernel.fg.builder->getJitInfo()->preRASchedulerForLatency = true;
14221419
return true;
14231420
}
14241421
// if this schedule does not provide expected gain from
@@ -1433,16 +1430,14 @@ bool BB_Scheduler::scheduleBlockForLatency(unsigned &MaxPressure,
14331430
rp.recompute(getBB());
14341431
SCHED_DUMP(rp.dump(ddd.getBB(), "After scheduling for latency, "));
14351432
ddd.getBB()->setLatencySched(true);
1436-
kernel.fg.builder->getcompilerStats().SetFlag(
1437-
"PreRASchedulerForLatency", this->kernel.getSimdSize());
1433+
kernel.fg.builder->getJitInfo()->preRASchedulerForLatency = true;
14381434
return true;
14391435
}
14401436
if (NumGrfs >= UpperBoundGRF) {
14411437
// best schedule is found with the max GRF setting
14421438
SCHED_DUMP(rp.dump(ddd.getBB(), "After scheduling for latency, "));
14431439
ddd.getBB()->setLatencySched(true);
1444-
kernel.fg.builder->getcompilerStats().SetFlag(
1445-
"PreRASchedulerForLatency", this->kernel.getSimdSize());
1440+
kernel.fg.builder->getJitInfo()->preRASchedulerForLatency = true;
14461441
return true;
14471442
}
14481443
// save the current schedule as the potential choice
@@ -1467,8 +1462,7 @@ bool BB_Scheduler::scheduleBlockForLatency(unsigned &MaxPressure,
14671462
rp.recompute(getBB());
14681463
SCHED_DUMP(rp.dump(ddd.getBB(), "After scheduling for latency, "));
14691464
ddd.getBB()->setLatencySched(true);
1470-
kernel.fg.builder->getcompilerStats().SetFlag("PreRASchedulerForLatency",
1471-
this->kernel.getSimdSize());
1465+
kernel.fg.builder->getJitInfo()->preRASchedulerForLatency = true;
14721466
return true;
14731467
}
14741468
return false;

‎visa/LocalScheduler/LocalScheduler_G4IR.cpp

Lines changed: 1 addition & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -118,10 +118,7 @@ void LocalScheduler::localScheduling() {
118118
FINALIZER_INFO *jitInfo = fg.builder->getJitInfo();
119119
jitInfo->BBInfo = bbInfo;
120120
jitInfo->BBNum = i;
121-
122-
fg.builder->getcompilerStats().SetI64(CompilerStats::numCyclesStr(),
123-
totalCycles,
124-
fg.getKernel()->getSimdSize());
121+
jitInfo->numCycles = totalCycles;
125122
}
126123

127124
void G4_BB_Schedule::dumpSchedule(G4_BB *bb) {

‎visa/Optimizer.cpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -7475,8 +7475,7 @@ void Optimizer::collectStats() {
74757475
}
74767476
}
74777477
}
7478-
builder.getcompilerStats().SetI64(CompilerStats::numSendStr(), numSends,
7479-
builder.kernel.getSimdSize());
7478+
builder.getJitInfo()->numSendInst = numSends;
74807479
}
74817480

74827481
// Create a copy of R0 at top of kernel,

‎visa/RegAlloc.cpp

Lines changed: 6 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -3324,25 +3324,21 @@ void GlobalRA::verifyRA(LivenessAnalysis &liveAnalysis) {
33243324

33253325
static void recordRAStats(IR_Builder &builder, G4_Kernel &kernel,
33263326
int RAStatus) {
3327-
#if COMPILER_STATS_ENABLE
3328-
CompilerStats &Stats = builder.getcompilerStats();
3329-
int SimdSize = kernel.getSimdSize();
33303327
if (RAStatus == VISA_SUCCESS) {
3331-
Stats.SetFlag("IsRAsuccessful", SimdSize);
33323328
switch (kernel.getRAType()) {
33333329
case RA_Type::TRIVIAL_BC_RA:
33343330
case RA_Type::TRIVIAL_RA:
3335-
Stats.SetFlag("IsTrivialRA", SimdSize);
3331+
builder.getJitInfo()->raStatus = "IsTrivialRA";
33363332
break;
33373333
case RA_Type::LOCAL_ROUND_ROBIN_BC_RA:
33383334
case RA_Type::LOCAL_ROUND_ROBIN_RA:
33393335
case RA_Type::LOCAL_FIRST_FIT_BC_RA:
33403336
case RA_Type::LOCAL_FIRST_FIT_RA:
3341-
Stats.SetFlag("IsLocalRA", SimdSize);
3337+
builder.getJitInfo()->raStatus = "IsLocalRA";
33423338
break;
33433339
case RA_Type::HYBRID_BC_RA:
33443340
case RA_Type::HYBRID_RA:
3345-
Stats.SetFlag("IsHybridRA", SimdSize);
3341+
builder.getJitInfo()->raStatus = "IsHybridRA";
33463342
break;
33473343
case RA_Type::GRAPH_COLORING_RR_RA:
33483344
case RA_Type::GRAPH_COLORING_FF_RA:
@@ -3354,15 +3350,14 @@ static void recordRAStats(IR_Builder &builder, G4_Kernel &kernel,
33543350
case RA_Type::GRAPH_COLORING_SPILL_FF_BC_RA:
33553351
case RA_Type::GLOBAL_LINEAR_SCAN_RA:
33563352
case RA_Type::GLOBAL_LINEAR_SCAN_BC_RA:
3357-
Stats.SetFlag("IsGlobalRA", SimdSize);
3353+
builder.getJitInfo()->raStatus = "IsGlobalRA";
33583354
break;
33593355
case RA_Type::UNKNOWN_RA:
33603356
break;
33613357
default:
33623358
assert(0 && "Incorrect RA type");
33633359
}
33643360
}
3365-
#endif // COMPILER_STATS_ENABLE
33663361
}
33673362

33683363
static void replaceSSO(G4_Kernel &kernel) {
@@ -3502,7 +3497,8 @@ int regAlloc(IR_Builder &builder, PhyRegPool &regPool, G4_Kernel &kernel) {
35023497
}
35033498
}
35043499

3505-
recordRAStats(builder, kernel, status);
3500+
if (builder.getOption(vISA_EnableCompilerStats))
3501+
recordRAStats(builder, kernel, status);
35063502
if (status != VISA_SUCCESS) {
35073503
return status;
35083504
}

‎visa/SpillManagerGMRF.cpp

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -5481,10 +5481,11 @@ void GlobalRA::expandSpillFillIntrinsics(unsigned int spillSizeInBytes) {
54815481
expandSpillIntrinsic(bb);
54825482
expandFillIntrinsic(bb);
54835483
}
5484-
kernel.fg.builder->getcompilerStats().SetI64(
5485-
CompilerStats::numGRFSpillStr(), numGRFSpill, kernel.getSimdSize());
5486-
kernel.fg.builder->getcompilerStats().SetI64(
5487-
CompilerStats::numGRFFillStr(), numGRFFill, kernel.getSimdSize());
5484+
5485+
if (kernel.fg.builder->getOption(vISA_EnableCompilerStats)) {
5486+
kernel.fg.builder->getJitInfo()->numGRFSpill = numGRFSpill;
5487+
kernel.fg.builder->getJitInfo()->numGRFFill = numGRFFill;
5488+
}
54885489
}
54895490

54905491
SpillAnalysis::~SpillAnalysis() {

‎visa/VISAKernel.h

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -11,7 +11,6 @@ SPDX-License-Identifier: MIT
1111
#include "Attributes.hpp"
1212
#include "BuildCISAIR.h"
1313
#include "Common_ISA_util.h"
14-
#include "CompilerStats.h"
1514
#include "IsaVerification.h"
1615
#include "JitterDataStruct.h"
1716
#include "KernelInfo.h"
@@ -956,7 +955,6 @@ class VISAKernelImpl : public VISAFunction {
956955
VISA_BUILDER_API int GetGenxBinary(void *&buffer, int &size) const override;
957956
VISA_BUILDER_API int GetJitInfo(FINALIZER_INFO *&jitInfo) const override;
958957
VISA_BUILDER_API int GetKernelInfo(KERNEL_INFO *&kernelInfo) const override;
959-
VISA_BUILDER_API int GetCompilerStats(CompilerStats &compilerStats) override;
960958
VISA_BUILDER_API int GetErrorMessage(const char *&errorMsg) const override;
961959
VISA_BUILDER_API virtual int
962960
GetGenxDebugInfo(void *&buffer, unsigned int &size) const override;
@@ -1201,7 +1199,6 @@ class VISAKernelImpl : public VISAFunction {
12011199
void dumpDebugFormatFile(std::vector<vISA::DebugInfoFormat> &debugSymbols,
12021200
std::string filename);
12031201
int InitializeFastPath();
1204-
void initCompilerStats();
12051202
int predefinedVarRegAssignment();
12061203
int calculateTotalInputSize();
12071204
int compileTillOptimize();
@@ -1251,7 +1248,6 @@ class VISAKernelImpl : public VISAFunction {
12511248
char *m_genx_debug_info_buffer;
12521249
FINALIZER_INFO *m_jitInfo;
12531250
KERNEL_INFO *m_kernelInfo;
1254-
CompilerStats m_compilerStats;
12551251

12561252
unsigned long m_cisa_binary_size;
12571253
char *m_cisa_binary_buffer;

‎visa/VISAKernelImpl.cpp

Lines changed: 0 additions & 34 deletions
Original file line numberDiff line numberDiff line change
@@ -662,9 +662,6 @@ int VISAKernelImpl::InitializeFastPath() {
662662
m_kernel->getKernelDebugInfo()->setVISAKernel(this);
663663
}
664664

665-
if (getOptions()->getOption(vISA_EnableCompilerStats)) {
666-
m_compilerStats.Enable(false);
667-
}
668665
m_jitInfo = (FINALIZER_INFO *)m_mem.alloc(sizeof(FINALIZER_INFO));
669666

670667
void *addr = m_kernelMem->alloc(sizeof(class IR_Builder));
@@ -673,9 +670,6 @@ int VISAKernelImpl::InitializeFastPath() {
673670
getCISABuilder(), m_jitInfo, getCISABuilder()->getWATable());
674671

675672
m_builder->setType(m_type);
676-
m_builder->getcompilerStats().Link(m_compilerStats);
677-
initCompilerStats();
678-
679673
return VISA_SUCCESS;
680674
}
681675

@@ -701,29 +695,6 @@ int VISAKernelImpl::InitializeKernel(const char *kernel_name) {
701695
return status;
702696
}
703697

704-
// This is done for all vISA Compiler Statistics. This is done so that a
705-
// statistic is initialized to false/0 even if the corresponding optimization
706-
// did not execute. This enables the the statistic to be printed out even if
707-
// the optimization did not happen.
708-
void VISAKernelImpl::initCompilerStats() {
709-
m_compilerStats.Init(CompilerStats::numGRFSpillStr(),
710-
CompilerStats::type_int64);
711-
m_compilerStats.Init(CompilerStats::numGRFFillStr(),
712-
CompilerStats::type_int64);
713-
m_compilerStats.Init(CompilerStats::numSendStr(), CompilerStats::type_int64);
714-
m_compilerStats.Init(CompilerStats::numCyclesStr(),
715-
CompilerStats::type_int64);
716-
#if COMPILER_STATS_ENABLE
717-
m_compilerStats.Init("PreRASchedulerForPressure", CompilerStats::type_bool);
718-
m_compilerStats.Init("PreRASchedulerForLatency", CompilerStats::type_bool);
719-
m_compilerStats.Init("IsRAsuccessful", CompilerStats::type_bool);
720-
m_compilerStats.Init("IsTrivialRA", CompilerStats::type_bool);
721-
m_compilerStats.Init("IsLocalRA", CompilerStats::type_bool);
722-
m_compilerStats.Init("IsHybridRA", CompilerStats::type_bool);
723-
m_compilerStats.Init("IsGlobalRA", CompilerStats::type_bool);
724-
#endif // COMPILER_STATS_ENABLE
725-
}
726-
727698
int VISAKernelImpl::CISABuildPreDefinedDecls() {
728699
for (unsigned int i = 0; i < m_num_pred_vars; i++) {
729700
auto predefId = mapExternalToInternalPreDefVar(i);
@@ -8535,11 +8506,6 @@ int VISAKernelImpl::GetKernelInfo(KERNEL_INFO *&kernelInfo) const {
85358506
return VISA_SUCCESS;
85368507
}
85378508

8538-
int VISAKernelImpl::GetCompilerStats(CompilerStats &compilerStats) {
8539-
compilerStats.Link(m_compilerStats);
8540-
return VISA_SUCCESS;
8541-
}
8542-
85438509
int VISAKernelImpl::GetErrorMessage(const char *&errorMsg) const {
85448510
// do nothing, doesn't seem like this is actually implemented
85458511
return VISA_SUCCESS;

‎visa/include/JitterDataStruct.h

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -74,6 +74,18 @@ typedef struct _FINALIZER_INFO {
7474

7575
uint32_t numGRFTotal = 0;
7676
uint32_t numThreads = 0;
77+
78+
// vISA stats used by IGC::CompilerStats
79+
// FIXME: the relationship between other fields in this struct
80+
// (e.g. numGRFSpillFill) is yet to be figured out.
81+
bool preRASchedulerForPressure = false;
82+
bool preRASchedulerForLatency = false;
83+
int64_t numCycles = 0;
84+
int64_t numSendInst = 0;
85+
int64_t numGRFSpill = 0;
86+
int64_t numGRFFill = 0;
87+
std::string raStatus;
88+
7789
} FINALIZER_INFO;
7890

7991
#endif // JITTERDATASTRUCT_

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