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srividyakarumuriigcbot
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Support for uniform typed read
1 parent 3129f65 commit 29b2b1a

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4 files changed

+40
-10
lines changed

4 files changed

+40
-10
lines changed

IGC/Compiler/CISACodeGen/EmitVISAPass.cpp

Lines changed: 37 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -11163,7 +11163,7 @@ void EmitPass::JoinSIMD(CVariable* (&tempdst)[N], uint responseLength, SIMDMode
1116311163
}
1116411164
}
1116511165

11166-
CVariable* EmitPass::BroadcastIfUniform(CVariable* pVar)
11166+
CVariable* EmitPass::BroadcastIfUniform(CVariable* pVar, bool nomask)
1116711167
{
1116811168
IGC_ASSERT_MESSAGE(nullptr != pVar, "pVar is null");
1116911169
VISA_Type VarT = pVar->GetType();
@@ -11196,12 +11196,16 @@ CVariable* EmitPass::BroadcastIfUniform(CVariable* pVar)
1119611196

1119711197
for (uint i = 0; i < elts; ++i)
1119811198
{
11199+
if (nomask)
11200+
m_encoder->SetNoMask();
1119911201
m_encoder->SetSrcSubReg(0, i * Stride);
1120011202
if (Stride != 1) m_encoder->SetDstRegion(Stride);
1120111203
m_encoder->SetDstSubReg((i * Stride) * width);
1120211204
m_encoder->Copy(Dst, ImmLo ? ImmLo : Src);
1120311205
m_encoder->Push();
1120411206
if (Need64BitEmu) {
11207+
if (nomask)
11208+
m_encoder->SetNoMask();
1120511209
m_encoder->SetSrcSubReg(0, i * Stride + 1);
1120611210
if (Stride != 1) m_encoder->SetDstRegion(Stride);
1120711211
m_encoder->SetDstSubReg((i * Stride) * width + 1);
@@ -13333,28 +13337,52 @@ void EmitPass::emitTypedRead(llvm::Instruction* pInsn)
1333313337
CVariable* pV = (pR == nullptr && isUndefOrConstInt0(pllV)) ? nullptr : GetSymbol(pllV);
1333413338
CVariable* pU = GetSymbol(pllU);
1333513339

13336-
pU = BroadcastIfUniform(pU);
13337-
pV = pV ? BroadcastIfUniform(pV) : nullptr;
13338-
pR = pR ? BroadcastIfUniform(pR) : nullptr;
13339-
pLOD = pLOD ? BroadcastIfUniform(pLOD) : nullptr;
13340+
pU = BroadcastIfUniform(pU, m_currShader->GetIsUniform(pInsn));
13341+
pV = pV ? BroadcastIfUniform(pV, m_currShader->GetIsUniform(pInsn)) : nullptr;
13342+
pR = pR ? BroadcastIfUniform(pR, m_currShader->GetIsUniform(pInsn)) : nullptr;
13343+
pLOD = pLOD ? BroadcastIfUniform(pLOD, m_currShader->GetIsUniform(pInsn)) : nullptr;
1334013344

1334113345
ResourceDescriptor resource = GetResourceVariable(pllSrcBuffer);
1334213346

1334313347
uint numChannels = iSTD::BitCount(writeMask);
13348+
SIMDMode instWidth = std::min(
13349+
m_currShader->m_Platform->supportsSIMD16TypedRW() ? SIMDMode::SIMD16 : SIMDMode::SIMD8,
13350+
m_currShader->m_SIMDSize);
1334413351

1334513352
if (m_currShader->GetIsUniform(pInsn))
1334613353
{
13347-
IGC_ASSERT_MESSAGE(0, "Uniform ld_uav_typed not implemented yet");
13354+
CVariable* tempdst = nullptr;
13355+
tempdst = m_currShader->GetNewVariable(
13356+
numChannels * numLanes(instWidth),
13357+
ISA_TYPE_F,
13358+
EALIGN_GRF,
13359+
CName("tempDest"));
13360+
m_encoder->SetSimdSize(instWidth);
13361+
m_encoder->SetPredicate(nullptr);
13362+
m_encoder->SetNoMask();
13363+
m_encoder->TypedRead4(resource, pU, pV, pR, pLOD, tempdst, writeMask);
13364+
13365+
m_encoder->Push();
13366+
13367+
// Mov the required channel values to m_destination
13368+
m_encoder->SetSimdSize(SIMDMode::SIMD1);
13369+
m_encoder->SetNoMask();
13370+
13371+
uint32_t width8 = getGRFSize() / 4;
13372+
for (uint i = 0; i < numChannels; ++i)
13373+
{
13374+
m_encoder->SetSrcSubReg(0, i * width8);
13375+
m_encoder->SetDstSubReg(i);
13376+
m_encoder->Copy(m_destination, tempdst);
13377+
m_encoder->Push();
13378+
}
1334813379
}
1334913380
else
1335013381
{
1335113382
uint label = 0;
1335213383
CVariable* flag = nullptr;
1335313384
bool needLoop = ResourceLoopHeader(resource, flag, label);
1335413385
CVariable* tempdst[4] = { nullptr, nullptr, nullptr, nullptr };
13355-
SIMDMode instWidth = std::min(
13356-
m_currShader->m_Platform->supportsSIMD16TypedRW() ? SIMDMode::SIMD16 : SIMDMode::SIMD8,
13357-
m_currShader->m_SIMDSize);
1335813386
bool needsSplit = m_currShader->m_SIMDSize > instWidth;
1335913387

1336013388
if (!needsSplit)

IGC/Compiler/CISACodeGen/EmitVISAPass.hpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -464,7 +464,7 @@ class EmitPass : public llvm::FunctionPass
464464
void SplitSIMD(llvm::Instruction* inst, uint numSources, uint headerSize, CVariable* payload, SIMDMode mode, uint half);
465465
template<size_t N>
466466
void JoinSIMD(CVariable* (&tempdst)[N], uint responseLength, SIMDMode mode);
467-
CVariable* BroadcastIfUniform(CVariable* pVar);
467+
CVariable* BroadcastIfUniform(CVariable* pVar, bool nomask = false);
468468
uint DecideInstanceAndSlice(const llvm::BasicBlock& blk, SDAG& sdag, bool& slicing);
469469
bool IsUndefOrZeroImmediate(const llvm::Value* value);
470470
inline bool isUndefOrConstInt0(const llvm::Value* val)

IGC/Compiler/CISACodeGen/WIAnalysis.cpp

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1222,6 +1222,7 @@ WIAnalysis::WIDependancy WIAnalysisRunner::calculate_dep(const CallInst* inst)
12221222
intrinsic_name == llvm_waveAll ||
12231223
intrinsic_name == llvm_waveClustered ||
12241224
intrinsic_name == llvm_ld_ptr ||
1225+
(IGC_IS_FLAG_DISABLED(DisableUniformTypedAccess) && intrinsic_name == llvm_typed_read) ||
12251226
intrinsic_name == llvm_add_pair ||
12261227
intrinsic_name == llvm_sub_pair ||
12271228
intrinsic_name == llvm_mul_pair ||

IGC/common/igc_flags.def

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -111,6 +111,7 @@ DECLARE_IGC_REGKEY(bool, DisableConstantCoalescing, false, "Setting this to
111111
DECLARE_IGC_REGKEY(bool, DisableConstantCoalescingOutOfBoundsCheck, false, "Setting this to 1/true adds a compiler switch to disable constant coalesing out of bounds check", false)
112112
DECLARE_IGC_REGKEY(bool, UseHDCTypedReadForAllTextures, false, "Setting this to use HDC message rather than sampler ld for texture read", false)
113113
DECLARE_IGC_REGKEY(bool, UseHDCTypedReadForAllTypedBuffers, false, "Setting this to use HDC message rather than sampler ld for buffer read", false)
114+
DECLARE_IGC_REGKEY(bool, DisableUniformTypedAccess, false, "Setting this will disable uniform typed access handling", false)
114115
DECLARE_IGC_REGKEY(bool, DisableURBWriteMerge, false, "Setting this to 1/true adds a compiler switch to disable URB write merge", false)
115116
DECLARE_IGC_REGKEY(bool, DisableEmptyBlockRemoval, false, "Setting this to 1/true adds a compiler switch to disable empty block optimization", false)
116117
DECLARE_IGC_REGKEY(bool, DisableSIMD32Slicing, false, "Setting this to 1/true adds a compiler switch to disable emitting SIMD32 VISA code in slices", false)

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