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scottp101igcbot
scottp101
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igcbot
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Remove GenISA_OWordPtr
1 parent f1bc713 commit 32b9874

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6 files changed

+9
-92
lines changed

6 files changed

+9
-92
lines changed

‎IGC/Compiler/CISACodeGen/ConstantCoalescing.cpp

Lines changed: 0 additions & 70 deletions
Original file line numberDiff line numberDiff line change
@@ -136,7 +136,6 @@ void ConstantCoalescing::ProcessFunction(Function* function)
136136
BasicBlock* top_blk = top_chunk->chunkIO->getParent();
137137
if (dom_tree.dominates(top_blk, cur_blk))
138138
break;
139-
//ChangePTRtoOWordBased(top_chunk);
140139
indcb_owloads.pop_back();
141140
delete top_chunk;
142141
}
@@ -166,7 +165,6 @@ void ConstantCoalescing::ProcessFunction(Function* function)
166165
{
167166
BufChunk* top_chunk = indcb_owloads.back();
168167
indcb_owloads.pop_back();
169-
//ChangePTRtoOWordBased(top_chunk);
170168
delete top_chunk;
171169
}
172170
while (!indcb_gathers.empty())
@@ -2519,72 +2517,4 @@ void ConstantCoalescing::ReplaceLoadWithSamplerLoad(
25192517
loadToReplace->replaceAllUsesWith(result);
25202518
}
25212519

2522-
2523-
/// change GEP to oword-based for oword-aligned load in order to avoid SHL
2524-
void ConstantCoalescing::ChangePTRtoOWordBased(BufChunk* chunk)
2525-
{
2526-
IGC_ASSERT(nullptr != chunk);
2527-
IGC_ASSERT(nullptr != chunk->chunkIO);
2528-
LoadInst* const load = dyn_cast<LoadInst>(chunk->chunkIO);
2529-
IGC_ASSERT(nullptr != load);
2530-
2531-
// has to be a 3d-load for now.
2532-
// Argument pointer coming from OCL may not be oword-aligned
2533-
uint addrSpace = load->getPointerAddressSpace();
2534-
if (addrSpace == ADDRESS_SPACE_CONSTANT)
2535-
{
2536-
return;
2537-
}
2538-
// element index must be a SHL-by-4
2539-
// chunk-start must be oword-aligned
2540-
if (!(chunk->baseIdxV) || chunk->chunkStart % 4)
2541-
{
2542-
return;
2543-
}
2544-
Instruction* ishl = dyn_cast<Instruction>(chunk->baseIdxV);
2545-
if (!ishl ||
2546-
ishl->getOpcode() != Instruction::Shl ||
2547-
!isa<ConstantInt>(ishl->getOperand(1)))
2548-
{
2549-
return;
2550-
}
2551-
unsigned int constant = int_cast<unsigned int>(cast<ConstantInt>(ishl->getOperand(1))->getZExtValue());
2552-
if (constant != 4)
2553-
{
2554-
return;
2555-
}
2556-
Value* owordIndex = ishl->getOperand(0);
2557-
// want the exact pattern
2558-
Value* ptrV = load->getPointerOperand();
2559-
if (!(isa<IntToPtrInst>(ptrV) && ptrV->hasOneUse()))
2560-
{
2561-
return;
2562-
}
2563-
// do different add, owordIndex + chunkStart/4;
2564-
if (chunk->chunkStart != 0)
2565-
{
2566-
Instruction* pInsert = dyn_cast<Instruction>(cast<IntToPtrInst>(ptrV)->getOperand(0));
2567-
if (!pInsert)
2568-
{
2569-
pInsert = cast<IntToPtrInst>(ptrV);
2570-
}
2571-
irBuilder->SetInsertPoint(pInsert);
2572-
owordIndex = irBuilder->CreateAdd(owordIndex, ConstantInt::get(irBuilder->getInt32Ty(), chunk->chunkStart / 4));
2573-
wiAns->incUpdateDepend(owordIndex, wiAns->whichDepend(load));
2574-
}
2575-
Type* vty = IGCLLVM::FixedVectorType::get(load->getType()->getScalarType(), 4);
2576-
Function* l = GenISAIntrinsic::getDeclaration(curFunc->getParent(),
2577-
llvm::GenISAIntrinsic::GenISA_OWordPtr,
2578-
PointerType::get(vty, addrSpace));
2579-
Value* attr[] =
2580-
{
2581-
owordIndex
2582-
};
2583-
irBuilder->SetInsertPoint(load);
2584-
Instruction* owordPtr = irBuilder->CreateCall(l, attr);
2585-
wiAns->incUpdateDepend(owordPtr, wiAns->whichDepend(load));
2586-
load->setOperand(0, owordPtr);
2587-
load->setAlignment(getAlign(16));
2588-
}
2589-
25902520
char IGC::ConstantCoalescing::ID = 0;

‎IGC/Compiler/CISACodeGen/ConstantCoalescing.hpp

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -274,8 +274,6 @@ namespace IGC
274274
llvm::Value* bufIdxV, uint bufid,
275275
llvm::Value* eltIdxV, uint eltid,
276276
std::vector<BufChunk*>& chunk_vec);
277-
/// change IntToPtr to oword-ptr for oword-aligned load in order to avoid SHL
278-
void ChangePTRtoOWordBased(BufChunk* chunk);
279277

280278
bool CleanupExtract(llvm::BasicBlock* bb);
281279
void VectorizePrep(llvm::BasicBlock* bb);

‎IGC/Compiler/CISACodeGen/EmitVISAPass.cpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -8795,8 +8795,7 @@ void EmitPass::EmitGenIntrinsicMessage(llvm::GenIntrinsicInst* inst)
87958795
break; // pseudo instruction, do nothing
87968796
default:
87978797
// we assume that some of gen-intrinsic should always be pattern-matched away,
8798-
// therefore we do not handle them in visa-emission, cases include:
8799-
// - owordPtr
8798+
// therefore we do not handle them in visa-emission.
88008799
// let us know if you see a case that hits this assertion by those intrinsics
88018800
inst->print(IGC::Debug::ods());
88028801
IGC_ASSERT_MESSAGE(0, "unknown intrinsic");

‎IGC/Compiler/CISACodeGen/PatternMatchPass.cpp

Lines changed: 8 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -954,7 +954,7 @@ namespace IGC
954954
switch (I.getOpcode())
955955
{
956956
case Instruction::FSub:
957-
match = MatchFloor(I) ||
957+
match = MatchFloor(I) ||
958958
MatchFrc(I) ||
959959
MatchLrp(I) ||
960960
MatchPredAdd(I) ||
@@ -999,7 +999,7 @@ namespace IGC
999999
MatchModifier(I);
10001000
break;
10011001
case Instruction::FAdd:
1002-
match =
1002+
match =
10031003
MatchLrp(I) ||
10041004
MatchPredAdd(I) ||
10051005
MatchMad(I) ||
@@ -1626,9 +1626,9 @@ namespace IGC
16261626
}
16271627
return found;
16281628
}
1629-
1629+
16301630
/*
1631-
below pass handles x - frac(x) = floor(x) pattern. Refer below :
1631+
below pass handles x - frac(x) = floor(x) pattern. Refer below :
16321632
16331633
frc (8|M0) r20.0<1>:f r19.0<8;8,1>:f {Compacted, @1}
16341634
add (8|M0) (ge)f0.1 r19.0<1>:f r19.0<8;8,1>:f -r20.0<8;8,1>:f {@1}
@@ -2337,18 +2337,14 @@ namespace IGC
23372337
}
23382338
}
23392339
};
2340-
GenIntrinsicInst* ptr = dyn_cast<GenIntrinsicInst>(&ptrVal);
2341-
IntToPtrInst* i2p = dyn_cast<IntToPtrInst>(&ptrVal);
23422340
if (ptrVal.getType()->getPointerAddressSpace() == ADDRESS_SPACE_GLOBAL ||
23432341
ptrVal.getType()->getPointerAddressSpace() == ADDRESS_SPACE_CONSTANT)
23442342
{
23452343
return false;
23462344
}
23472345

23482346
// Store3d supports only types equal or less than 128 bits.
2349-
StoreInst* storeInst = dyn_cast<StoreInst>(&I);
2350-
2351-
if (storeInst)
2347+
if (auto* storeInst = dyn_cast<StoreInst>(&I))
23522348
{
23532349
llvm::VectorType* vectorToStore = dyn_cast<llvm::VectorType>(storeInst->getValueOperand()->getType());
23542350

@@ -2363,19 +2359,19 @@ namespace IGC
23632359
}
23642360
}
23652361

2366-
if (i2p || (ptr && ptr->getIntrinsicID() == GenISAIntrinsic::GenISA_OWordPtr))
2362+
if (auto* i2p = dyn_cast<IntToPtrInst>(&ptrVal))
23672363
{
23682364
LoadStorePointerPattern* pattern = new (m_allocator) LoadStorePointerPattern();
23692365
pattern->inst = &I;
23702366
uint numSources = GetNbSources(I);
23712367
for (uint i = 0; i < numSources; i++)
23722368
{
2373-
if (I.getOperand(i) != &ptrVal)
2369+
if (I.getOperand(i) != i2p)
23742370
{
23752371
MarkAsSource(I.getOperand(i));
23762372
}
23772373
}
2378-
pattern->offset = cast<Instruction>(&ptrVal)->getOperand(0);
2374+
pattern->offset = i2p->getOperand(0);
23792375
pattern->immOffset = ConstantInt::get(Type::getInt32Ty(I.getContext()), 0);
23802376
MarkAsSource(pattern->offset);
23812377
AddPattern(pattern);

‎IGC/Compiler/CISACodeGen/opCode.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -163,7 +163,6 @@ DECLARE_OPCODE(GenISA_icmpxchgatomictyped, GenISAIntrinsic, llvm_icmpxchg_atomic
163163
DECLARE_OPCODE(GenISA_atomiccounterinc, GenISAIntrinsic, llvm_atomic_counter_inc, false, false, false, false, false, true, false)
164164
DECLARE_OPCODE(GenISA_atomiccounterpredec, GenISAIntrinsic, llvm_atomic_counter_predec, false, false, false, false, false, true, false)
165165

166-
DECLARE_OPCODE(GenISA_OWordPtr, GenISAIntrinsic, llvm_owordptr, false, false, false, false, false, false, false)
167166
DECLARE_OPCODE(GenISA_ldraw_indexed, GenISAIntrinsic, llvm_ldraw_indexed, false, false, false, false, false, false, false)
168167
DECLARE_OPCODE(GenISA_ldrawvector_indexed, GenISAIntrinsic, llvm_ldrawvector_indexed, false, false, false, false, false, false, false)
169168
DECLARE_OPCODE(GenISA_storeraw_indexed, GenISAIntrinsic, llvm_storeraw_indexed, false, false, false, false, false, false, false)

‎IGC/GenISAIntrinsics/Intrinsic_definitions.py

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -362,11 +362,6 @@
362362
("int", "emitCount")],
363363
"None"]],
364364
####################################################################################################
365-
"GenISA_OWordPtr": ["",
366-
[("anyptr", "result"),
367-
[("int", "oword index")],
368-
"NoMem"]],
369-
####################################################################################################
370365
"GenISA_OuterScalarTessFactors": ["",
371366
[("void", ""),
372367
[("int", "enum for the type of Tess factor"),

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