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weiyu-chensys_zuul
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sys_zuul
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Add VF immediate support for divm/sqrtm/pow
Change-Id: I49e63a8b4bee9b1179e9a4ad5c31ae6ff70a5d8b
1 parent ef20f5f commit 350842a

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6 files changed

+31
-31
lines changed

6 files changed

+31
-31
lines changed

visa/Gen4_IR.hpp

Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2303,6 +2303,21 @@ class G4_Operand
23032303
{
23042304
return Rel_disjoint;
23052305
}
2306+
2307+
static G4_Type GetNonVectorImmType(G4_Type type)
2308+
{
2309+
switch (type)
2310+
{
2311+
case Type_V:
2312+
return Type_W;
2313+
case Type_UV:
2314+
return Type_UW;
2315+
case Type_VF:
2316+
return Type_F;
2317+
default:
2318+
return type;
2319+
}
2320+
}
23062321
};
23072322

23082323
class G4_VarBase

visa/HWConformity.cpp

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -588,7 +588,7 @@ bool HWConformity::fixMathInst(INST_LIST_ITER it, G4_BB *bb)
588588
bool needsSrc0Mov = needsMove(0, src0_type);
589589
if (needsSrc0Mov)
590590
{
591-
inst->setSrc(insertMovBefore(it, 0, src0->isImm() ? getNonVectorType(src0_type) : src0_type, bb), 0);
591+
inst->setSrc(insertMovBefore(it, 0, src0->isImm() ? G4_Operand::GetNonVectorImmType(src0_type) : src0_type, bb), 0);
592592
src0 = inst->getSrc(0);
593593
}
594594
}
@@ -609,7 +609,7 @@ bool HWConformity::fixMathInst(INST_LIST_ITER it, G4_BB *bb)
609609
}
610610
else
611611
{
612-
inst->setSrc(insertMovBefore(it, 1, src1->isImm() ? getNonVectorType(src1_type) : src1_type, bb), 1);
612+
inst->setSrc(insertMovBefore(it, 1, src1->isImm() ? G4_Operand::GetNonVectorImmType(src1_type) : src1_type, bb), 1);
613613
}
614614
src1 = inst->getSrc(1);
615615
}
@@ -752,7 +752,7 @@ void HWConformity::fixImmAndARFSrc(INST_LIST_ITER it, G4_BB *bb)
752752

753753
if (needConstMov)
754754
{
755-
G4_Type tmpType = getNonVectorType(src0->getType());
755+
G4_Type tmpType = G4_Operand::GetNonVectorImmType(src0->getType());
756756

757757
G4_Operand* newSrc0 = insertMovBefore(it, 0, tmpType, bb);
758758
inst->setSrc(newSrc0, 0);
@@ -859,7 +859,7 @@ void HWConformity::fixImmAndARFSrc(INST_LIST_ITER it, G4_BB *bb)
859859
// mov(8) TV0(0, 0)<1> : uw 0xeca86420 : uv{ Align1 }
860860
// add(8) A0(0, 0)<1> : uw &V36 + 0 TV0(0, 0)<8; 8, 1> : uw{ Align1, Q1 }
861861
G4_Type type = src1->getType();
862-
inst->setSrc(insertMovBefore(it, 1, getNonVectorType(type), bb), 1);
862+
inst->setSrc(insertMovBefore(it, 1, G4_Operand::GetNonVectorImmType(type), bb), 1);
863863
// And we swap addr expr and the new variable
864864
// add(8) A0(0, 0)<1> : uw TV0(0, 0)<8; 8, 1> : uw &V36 + 0 {Align1, Q1}
865865
// The final code sequence is
@@ -872,7 +872,7 @@ void HWConformity::fixImmAndARFSrc(INST_LIST_ITER it, G4_BB *bb)
872872
else
873873
{
874874
G4_Type newSrcType = inst->needsDWType() ? (IS_UNSIGNED_INT(src0->getType()) ? Type_UD : Type_D) :
875-
getNonVectorType(src0->getType());
875+
G4_Operand::GetNonVectorImmType(src0->getType());
876876
inst->setSrc(insertMovBefore(it, 0, newSrcType, bb), 0);
877877
}
878878
}

visa/HWConformity.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -101,7 +101,6 @@ namespace vISA
101101
void fixPackedHFConversions(INST_LIST_ITER it, G4_BB* bb);
102102

103103
bool fixIndirectOpnd(INST_LIST_ITER i, G4_BB *bb);
104-
G4_Type getNonVectorType(G4_Type srcType);
105104
void fix3SrcInst(INST_LIST_ITER i, G4_BB* bb);
106105
void fixAlign13SrcInst(INST_LIST_ITER i, G4_BB* bb);
107106
void fixCompareInst(INST_LIST_ITER i, G4_BB *bb, G4_Type exType, int dst_elsize);

visa/IsaVerification.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1604,12 +1604,12 @@ static void verifyInstructionArith(
16041604
"mul/div does not support Q/UQ types for src%d", i);
16051605
break;
16061606
case ISA_DIVM:
1607-
REPORT_INSTRUCTION(options,srcType == ISA_TYPE_F || srcType == ISA_TYPE_DF,
1608-
"ieee div does not support types for src%d, other than F/DF", i);
1607+
REPORT_INSTRUCTION(options,srcType == ISA_TYPE_F || srcType == ISA_TYPE_DF || srcType == ISA_TYPE_VF,
1608+
"ieee div does not support types for src%d, other than F/DF/VF", i);
16091609
break;
16101610
case ISA_SQRTM:
1611-
REPORT_INSTRUCTION(options,srcType == ISA_TYPE_F || srcType == ISA_TYPE_DF,
1612-
"ieee sqrt does not support types for src%d, other than F/DF", i);
1611+
REPORT_INSTRUCTION(options,srcType == ISA_TYPE_F || srcType == ISA_TYPE_DF || srcType == ISA_TYPE_VF,
1612+
"ieee sqrt does not support types for src%d, other than F/DF/VF", i);
16131613
break;
16141614
case ISA_ADDC:
16151615
case ISA_SUBB:

visa/ReduceExecSize.cpp

Lines changed: 2 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -31,23 +31,6 @@ using namespace vISA;
3131

3232
using std::printf;
3333

34-
G4_Type HWConformity::getNonVectorType( G4_Type srcType )
35-
{
36-
if( srcType == Type_V )
37-
{
38-
return Type_W;
39-
}
40-
else if( srcType == Type_UV )
41-
{
42-
return Type_UW;
43-
}
44-
else if( srcType == Type_VF )
45-
{
46-
return Type_F;
47-
}
48-
return srcType;
49-
}
50-
5134
uint8_t HWConformity::checkMinExecSize( G4_opcode op )
5235
{
5336
if( op == G4_dp2 ||
@@ -1514,7 +1497,7 @@ bool HWConformity::checkSrcDstOverlap( INST_LIST_ITER iter, G4_BB* bb, bool comp
15141497
if (useTmp)
15151498
{
15161499
// insert mov
1517-
inst->setSrc(insertMovBefore(iter, i, getNonVectorType(srcs[i]->getType()), bb), i);
1500+
inst->setSrc(insertMovBefore(iter, i, G4_Operand::GetNonVectorImmType(srcs[i]->getType()), bb), i);
15181501
srcs[i] = inst->getSrc(i);
15191502
// reducing exec size for new MOV
15201503
INST_LIST_ITER newMovIter = iter;
@@ -1549,7 +1532,7 @@ void HWConformity::moveSrcToGRF( INST_LIST_ITER it, uint32_t srcNum, uint16_t nu
15491532
G4_INST* def_inst = NULL;
15501533
def_inst = checkSrcDefInst(inst, def_inst, srcNum);
15511534

1552-
G4_Type tmpType = getNonVectorType(src->getType());
1535+
G4_Type tmpType = G4_Operand::GetNonVectorImmType(src->getType());
15531536

15541537
if( def_inst && def_inst->getDst()->getType() == tmpType &&
15551538
( def_inst->getExecSize() == execSize ) &&

visa/TranslationInterface.cpp

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -252,7 +252,7 @@ void IR_Builder::expandPow(uint8_t exsize, G4_Predicate *predOpnd, bool saturate
252252
// math.log tmp abs(src0)
253253
// mul dst tmp tmp src1
254254
// math.exp dst tmp
255-
G4_Type mathType = src0Opnd->getType();
255+
G4_Type mathType = G4_Operand::GetNonVectorImmType(src0Opnd->getType());
256256
G4_Declare* tmpVar = createTempVar(exsize, mathType, Any);
257257
G4_DstRegRegion* logDst = Create_Dst_Opnd_From_Dcl(tmpVar, 1);
258258
G4_Operand* logSrc = src0Opnd;
@@ -299,6 +299,9 @@ void IR_Builder::expandPow(uint8_t exsize, G4_Predicate *predOpnd, bool saturate
299299
}
300300
break;
301301
}
302+
case Type_VF:
303+
// ToDo: what if VF contains negative values?
304+
break;
302305
default:
303306
assert(false && "unexpected src0 type for pow");
304307
}
@@ -441,7 +444,7 @@ static G4_SrcRegRegion* operandToDirectSrcRegRegion(
441444
{
442445
//src is an immediate
443446
MUST_BE_TRUE(src->isImm(), "expect immediate operand");
444-
G4_Declare *tmpSrc = builder.createTempVarWithNoSpill(exsize, src->getType(), Any);
447+
G4_Declare *tmpSrc = builder.createTempVarWithNoSpill(exsize, G4_Operand::GetNonVectorImmType(src->getType()), Any);
445448
builder.Create_MOV_Inst(tmpSrc, 0, 0, exsize, nullptr, nullptr, src, true);
446449
return builder.Create_Src_Opnd_From_Dcl(tmpSrc, builder.getRegionStride1());
447450
}

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