RemoveCodeAssumptions pass

Instruction combining can miss some optimizations if it happens, that the only use of instructions end up in llvm.assume intrinsic. This change removes llvm.assume calls and runs instruction combining before Legalization pass.

Author: PawelJurek

IGC/Compiler/CISACodeGen/ShaderCodeGen.cpp

@@ -126,6 +126,7 @@ SPDX-License-Identifier: MIT
 #include "Compiler/InitializePasses.h"
 #include "Compiler/GenRotate.hpp"
 #include "Compiler/Optimizer/Scalarizer.h"
+#include "Compiler/RemoveCodeAssumptions.hpp"
 #include "common/debug/Debug.hpp"
 #include "common/igc_regkeys.hpp"
 #include "common/debug/Dump.hpp"
@@ -905,9 +906,9 @@ static void AddLegalizationPasses(CodeGenContext& ctx, IGCPassManager& mpm, PSSi
         }
     }
 
-    // Enabling half promotion AIL for compute shaders only at this point. 
+    // Enabling half promotion AIL for compute shaders only at this point.
     // If needed ctx.type check can be removed to apply for all shader types
-    if (IGC_IS_FLAG_ENABLED(ForceHalfPromotion) || 
+    if (IGC_IS_FLAG_ENABLED(ForceHalfPromotion) ||
         (ctx.getModuleMetaData()->compOpt.WaForceHalfPromotion && ctx.type == ShaderType::COMPUTE_SHADER) ||
         (!ctx.platform.supportFP16() && IGC_IS_FLAG_ENABLED(EnableHalfPromotion)))
     {
@@ -940,12 +941,20 @@ static void AddLegalizationPasses(CodeGenContext& ctx, IGCPassManager& mpm, PSSi
         mpm.add(createNanHandlingPass());
     }
 
+    if(!isOptDisabled) {
+        // Removing code assumptions can enable some InstructionCombining optimizations.
+        // Last instruction combining pass needs to be before Legalization pass, as it can produce illegal instructions.
+        mpm.add(new RemoveCodeAssumptions());
+        mpm.add(createIGCInstructionCombiningPass());
+    }
+
     // TODO: move to use instruction flags
     // to figure out if we need to preserve Nan
     bool preserveNan = !ctx.getCompilerOption().NoNaNs;
 
     // Legalizer does not handle constant expressions
     mpm.add(new BreakConstantExpr());
+
     mpm.add(new Legalization(preserveNan));
 
     // Scalarizer in codegen to handle the vector instructions

IGC/Compiler/CMakeLists.txt

@@ -66,6 +66,7 @@ set(IGC_BUILD__SRC__Compiler
     "${CMAKE_CURRENT_SOURCE_DIR}/SampleMultiversioning.cpp"
     "${CMAKE_CURRENT_SOURCE_DIR}/HandleFRemInstructions.cpp"
     "${CMAKE_CURRENT_SOURCE_DIR}/GenRotate.cpp"
+    "${CMAKE_CURRENT_SOURCE_DIR}/RemoveCodeAssumptions.cpp"
     "${IGC_BUILD__GFX_DEV_SRC_DIR}/skuwa/ibdw_wa.c"
     "${IGC_BUILD__GFX_DEV_SRC_DIR}/skuwa/ichv_wa.c"
     "${IGC_BUILD__GFX_DEV_SRC_DIR}/skuwa/ibxt_wa.c"
@@ -157,6 +158,7 @@ set(IGC_BUILD__HDR__Compiler
     "${CMAKE_CURRENT_SOURCE_DIR}/HandleFRemInstructions.hpp"
     "${CMAKE_CURRENT_SOURCE_DIR}/GenRotate.hpp"
     "${CMAKE_CURRENT_SOURCE_DIR}/SamplerPerfOptPass.hpp"
+    "${CMAKE_CURRENT_SOURCE_DIR}/RemoveCodeAssumptions.hpp"
     ${IGC_BUILD__HDR__Compiler_CISACodeGen}
     ${IGC_BUILD__HDR__Compiler_DebugInfo}
     ${IGC_BUILD__HDR__Compiler_Legalizer}

IGC/Compiler/InitializePasses.h

@@ -226,3 +226,5 @@ void initializeCatchAllLineNumberPass(llvm::PassRegistry&);
 void initializePromoteConstantStructsPass(llvm::PassRegistry&);
 void initializeLowerInvokeSIMDPass(llvm::PassRegistry&);
 void initializeImplicitGIDRestoringPass(llvm::PassRegistry&);
+void initializeRemoveCodeAssumptionsPass(llvm::PassRegistry&);
+

IGC/Compiler/RemoveCodeAssumptions.cpp

@@ -0,0 +1,58 @@
+/*========================== begin_copyright_notice ============================
+
+Copyright (C) 2022 Intel Corporation
+
+SPDX-License-Identifier: MIT
+
+============================= end_copyright_notice ===========================*/
+
+#include "Compiler/RemoveCodeAssumptions.hpp"
+#include "Compiler/IGCPassSupport.h"
+
+using namespace llvm;
+using namespace IGC;
+
+// Register pass to igc-opt
+#define PASS_FLAG "igc-remove-code-assumptions"
+#define PASS_DESCRIPTION "Remove code assumptions from the module"
+#define PASS_CFG_ONLY false
+#define PASS_ANALYSIS false
+IGC_INITIALIZE_PASS_BEGIN(RemoveCodeAssumptions, PASS_FLAG, PASS_DESCRIPTION, PASS_CFG_ONLY, PASS_ANALYSIS)
+IGC_INITIALIZE_PASS_END(RemoveCodeAssumptions, PASS_FLAG, PASS_DESCRIPTION, PASS_CFG_ONLY, PASS_ANALYSIS)
+
+char RemoveCodeAssumptions::ID = 0;
+
+RemoveCodeAssumptions::RemoveCodeAssumptions()
+    : FunctionPass(ID)
+{
+    initializeRemoveCodeAssumptionsPass(*PassRegistry::getPassRegistry());
+}
+
+bool RemoveCodeAssumptions::runOnFunction(Function& F)
+{
+    visit(F);
+
+    bool changed = m_instructionsToRemove.size() > 0;
+    for (auto I : m_instructionsToRemove)
+    {
+        I->eraseFromParent();
+    }
+    m_instructionsToRemove.clear();
+
+    return changed;
+}
+
+
+void RemoveCodeAssumptions::visitIntrinsicInst(llvm::IntrinsicInst& I)
+{
+    auto intrinsicID = I.getIntrinsicID();
+
+    switch (intrinsicID)
+    {
+    case Intrinsic::assume:
+        m_instructionsToRemove.push_back(&I);
+        break;
+    default:
+        break;
+    }
+}

IGC/Compiler/RemoveCodeAssumptions.hpp

@@ -0,0 +1,39 @@
+/*========================== begin_copyright_notice ============================
+
+Copyright (C) 2022 Intel Corporation
+
+SPDX-License-Identifier: MIT
+
+============================= end_copyright_notice ===========================*/
+
+#pragma once
+
+#include "common/LLVMWarningsPush.hpp"
+#include <llvm/Pass.h>
+#include <llvm/IR/Function.h>
+#include <llvm/IR/InstVisitor.h>
+#include "common/LLVMWarningsPop.hpp"
+
+namespace IGC
+{
+    class RemoveCodeAssumptions : public llvm::FunctionPass, public llvm::InstVisitor<RemoveCodeAssumptions>
+    {
+    public:
+        static char ID;
+
+        RemoveCodeAssumptions();
+        ~RemoveCodeAssumptions() {}
+
+        virtual bool runOnFunction(llvm::Function& F) override;
+
+        virtual llvm::StringRef getPassName() const override
+        {
+            return "RemoveCodeAssumptions Pass";
+        }
+
+        void visitIntrinsicInst(llvm::IntrinsicInst& I);
+
+    private:
+        std::vector<llvm::Instruction*> m_instructionsToRemove;
+    };
+} // namespace IGC

IGC/Compiler/tests/RemoveCodeAssumptions/basic.ll

@@ -0,0 +1,25 @@
+;=========================== begin_copyright_notice ============================
+;
+; Copyright (C) 2022 Intel Corporation
+;
+; SPDX-License-Identifier: MIT
+;
+;============================ end_copyright_notice =============================
+
+; RUN: igc_opt %s -S -o - -igc-remove-code-assumptions | FileCheck %s
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f16:16:16-f32:32:32-f64:64:64-f80:128:128-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64-v96:128:128-v128:128:128-v192:256:256-v256:256:256-v512:512:512-v1024:1024:1024-a:64:64-f80:128:128-n8:16:32:64"
+
+define internal spir_func void @test(i64 %in) {
+  ; BASIC TEST CASE
+  ; CHECK-NOT: @llvm.assume
+  ; CHECK: ret void
+  %cmp = icmp sgt i64 %in, -1
+  call void @llvm.assume(i1 %cmp) #3
+  ret void
+}
+
+; Function Attrs: nounwind
+declare void @llvm.assume(i1) #0
+attributes #0 = { nounwind }
+