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esukhovigcbot
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Reintroducing XE2 drop to SIMD16 functionality back
Now we allow SIMD16 drop for spilling kernels on XE2.
1 parent 07a4be8 commit 3f87512

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2 files changed

+22
-3
lines changed

2 files changed

+22
-3
lines changed

IGC/Compiler/CISACodeGen/OpenCLKernelCodeGen.cpp

Lines changed: 18 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -3450,7 +3450,8 @@ namespace IGC
34503450

34513451
if (ctx->platform.getMinDispatchMode() == SIMDMode::SIMD16)
34523452
{
3453-
AddCodeGenPasses(*ctx, shaders, Passes, SIMDMode::SIMD32, false);
3453+
bool abortOnSpills = ctx->platform.isCoreXE2() && (ctx->getModuleMetaData()->csInfo.forcedSIMDSize != 32);
3454+
AddCodeGenPasses(*ctx, shaders, Passes, SIMDMode::SIMD32, abortOnSpills);
34543455
AddCodeGenPasses(*ctx, shaders, Passes, SIMDMode::SIMD16, false);
34553456

34563457
ctx->SetSIMDInfo(SIMD_SKIP_HW, SIMDMode::SIMD8, ShaderDispatchMode::NOT_APPLICABLE);
@@ -3755,9 +3756,23 @@ namespace IGC
37553756
return SIMDStatus::SIMD_FUNC_FAIL;
37563757
}
37573758

3758-
EP.m_canAbortOnSpill = false; // spill is always allowed since we don't do SIMD size lowering
37593759
// Next we check if there is a required sub group size specified
37603760
CodeGenContext* pCtx = GetContext();
3761+
3762+
CShader* simd16Program = m_parent->GetShader(SIMDMode::SIMD16);
3763+
CShader* simd32Program = m_parent->GetShader(SIMDMode::SIMD32);
3764+
3765+
bool compileFunctionVariants = pCtx->m_enableSimdVariantCompilation &&
3766+
(m_FGA && IGC::isIntelSymbolTableVoidProgram(m_FGA->getGroupHead(&F)));
3767+
3768+
if((simd16Program && simd16Program->ProgramOutput()->m_programSize > 0) ||
3769+
(simd32Program && simd32Program->ProgramOutput()->m_programSize > 0))
3770+
{
3771+
bool canCompileMultipleSIMD = compileFunctionVariants;
3772+
if (!(canCompileMultipleSIMD && (pCtx->getModuleMetaData()->csInfo.forcedSIMDSize == 0)))
3773+
return SIMDStatus::SIMD_FUNC_FAIL;
3774+
}
3775+
37613776
MetaDataUtils* pMdUtils = EP.getAnalysis<MetaDataUtilsWrapper>().getMetaDataUtils();
37623777
FunctionInfoMetaDataHandle funcInfoMD = pMdUtils->getFunctionsInfoItem(&F);
37633778
uint32_t simd_size = getReqdSubGroupSize(F, pMdUtils);
@@ -3860,7 +3875,7 @@ namespace IGC
38603875
return SIMDStatus::SIMD_PASS;
38613876
}
38623877

3863-
if (simdMode == SIMDMode::SIMD16 && !hasSubGroupForce && !forceLowestSIMDForStackCalls && !hasSubroutine)
3878+
if (simdMode == SIMDMode::SIMD16 && !pCtx->platform.isCoreXE2() && !hasSubGroupForce && !forceLowestSIMDForStackCalls && !hasSubroutine)
38643879
{
38653880
pCtx->SetSIMDInfo(SIMD_SKIP_PERF, simdMode, ShaderDispatchMode::NOT_APPLICABLE);
38663881
return SIMDStatus::SIMD_FUNC_FAIL;

IGC/Compiler/CISACodeGen/Platform.hpp

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -213,6 +213,10 @@ bool isProductChildOf(PRODUCT_FAMILY product) const
213213
return m_platformInfo.eProductFamily >= product;
214214
}
215215

216+
bool isCoreXE2() const {
217+
return ( m_platformInfo.eRenderCoreFamily == IGFX_XE2_HPG_CORE );
218+
}
219+
216220
// This function checks if core is child of another core
217221
bool isCoreChildOf(GFXCORE_FAMILY core) const
218222
{

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