Encode render target (RT) index directly in RT-write message for TGL.

weiyu-chen · sys_zuul · commit 74e2dad1747d · 2020-01-22T14:42:33.000-08:00
Change-Id: Ic249711e8d06ab028814c087d730f4b79b9f9e13
diff --git a/visa/HWCaps.inc b/visa/HWCaps.inc
@@ -415,6 +415,11 @@
         return getGenxPlatform() == GENX_SKL ||
                getOption(vISA_replaceIndirectCallWithJmpi);
     }
+
+    bool canEncodeFullExtDesc() const
+    {
+        return getGenxPlatform() >= GENX_TGLLP;
+    }
     bool no64bitType() const
     {
         return getGenxPlatform() == GENX_ICLLP || isGen12LP();
@@ -548,11 +553,6 @@
         return false;
     }
 
-    bool canEncodeFullExtDesc() const
-    {
-        return false;
-    }
-
     bool useAccForDF() const
     {
         return false;

Original file line number	Diff line number	Diff line change
`@@ -415,6 +415,11 @@`
`415`	`415`	`return getGenxPlatform() == GENX_SKL \|\|`
`416`	`416`	`getOption(vISA_replaceIndirectCallWithJmpi);`
`417`	`417`	`}`
	`418`	`+`
	`419`	`+ bool canEncodeFullExtDesc() const`
	`420`	`+ {`
	`421`	`+ return getGenxPlatform() >= GENX_TGLLP;`
	`422`	`+ }`
`418`	`423`	`bool no64bitType() const`
`419`	`424`	`{`
`420`	`425`	`return getGenxPlatform() == GENX_ICLLP \|\| isGen12LP();`
`@@ -548,11 +553,6 @@`
`548`	`553`	`return false;`
`549`	`554`	`}`
`550`	`555`
`551`		`- bool canEncodeFullExtDesc() const`
`552`		`- {`
`553`		`- return false;`
`554`		`- }`
`555`		`-`
`556`	`556`	`bool useAccForDF() const`
`557`	`557`	`{`
`558`	`558`	`return false;`