[Autobackout][FuncReg]Revert of change: a0caa5f

 Using ptr as address payload's type

By design, address payload updating builtins does not create a new
address payload.  If the payload's type is int, not pointer, the
updating builtin would be like the following:
    (1) int addrP0 = createAddrPayload(...)
    (2) v = block2d_read (addrP0, ....)
    (3) int addrP1 = setBlockX(addrP0, ...)
In llvm IR, those addrP0 and addrP1 are different llvm values. And
it is legal for llvm to reorder instructions into { (1), (3), (2) },
which is incorrect as (2) should use the original addrP0, not the
updated one (addrP1).

For this reason, address payload should be of pointer type. With ptr
type, the above would be:
    (1) int* addrP0 = createAddrPayload(...)
    (2) v = block2d_read (addrP0, ....)
    (3) etBlockX(addrP0, ...)

The llvm cannot reorder them as there are dependences b/w (2) and (3).

This PR makes address payload's type to be pointer type (int*).

Author: jgu222

IGC/BiFModule/Implementation/IGCBiF_Intrinsics_Lsc.cl

@@ -3390,6 +3390,7 @@ CVariable* CShader::GetSymbol(llvm::Value* value, bool fromConstantPool,
         switch (GII->getIntrinsicID()) {
         case GenISAIntrinsic::GenISA_LSC2DBlockCreateAddrPayload:
         case GenISAIntrinsic::GenISA_LSC2DBlockCopyAddrPayload:
+        case GenISAIntrinsic::GenISA_LSC2DBlockSetAddrPayloadField:
         {
             // Address Payload is opaque, no alias to it. It takes 8DW.
             auto thisAlign = (m_Platform->getGRFSize() == 64 ? EALIGN_32WORD : EALIGN_HWORD);

IGC/Compiler/CISACodeGen/CShader.cpp

@@ -397,6 +397,9 @@ bool DeSSA::runOnFunction(Function& MF)
     CoalesceAliasInst();
     CoalesceInsertElements();
 
+    // Special coalescing
+    CoalesceOthers();
+
     // checkPHILoopInput
     //  PreHeader:
     //      x = ...
@@ -468,7 +471,7 @@ bool DeSSA::runOnFunction(Function& MF)
         for (BasicBlock::iterator BBI = I->begin(), BBE = I->end();
             BBI != BBE; ++BBI) {
             PHINode* PHI = dyn_cast<PHINode>(BBI);
-            if (!PHI) {
+            if (!PHI || isProcessed(PHI)) {
                 break;
             }
 
@@ -1296,6 +1299,79 @@ DeSSA::CoalesceInsertElements()
     }
 }
 
+// This is to coalesce special instructions
+void DeSSA::CoalesceOthers()
+{
+    // Coalesce address payload
+    //   1. created by GenISA_LSC2DBlockCreateAddrPayload
+    //      or GenISA_LSC2DBlockCopyAddrPayload;
+    //   2. may be updated by GenISA_LSC2DBlockSetAddrPayloadField
+    // By design, address payload created originally and later
+    // updated should be coalesced and no need to check interference.
+    auto push_back_if_absent = [](std::list<Value*>& L, Value* V) {
+        if (std::find(L.begin(), L.end(), V) == L.end()) {
+            L.push_back(V);
+        }
+    };
+
+    auto isAddrPayloadUpdater = [](Value* V) {
+        GenIntrinsicInst* G = dyn_cast<GenIntrinsicInst>(V);
+        if (!G ||
+            G->getIntrinsicID() != GenISAIntrinsic::GenISA_LSC2DBlockSetAddrPayloadField) {
+            return false;
+        }
+        return true;
+    };
+
+
+    for (auto II = inst_begin(m_F), E = inst_end(m_F); II != E; ++II) {
+        Instruction* I = &*II;
+        GenIntrinsicInst* GII = dyn_cast<GenIntrinsicInst>(I);
+        if (!GII) {
+            continue;
+        }
+        auto GID = GII->getIntrinsicID();
+        if (GID != GenISAIntrinsic::GenISA_LSC2DBlockCreateAddrPayload &&
+            GID != GenISAIntrinsic::GenISA_LSC2DBlockCopyAddrPayload) {
+            continue;
+        }
+        // Coalesce all uses of CreateAddrPayload/CopyAddrPayload, including
+        // all uses of its address payload updating intrinsics.
+        //
+        // The algorithm collect all uses (address payload) by doing
+        // breadth-first traversal, making sure each value is visited no
+        // more than once to avoid cyclic use relation due to PHI node.
+        //
+        std::list<Value*> allUses{ GII };
+        for (auto it = allUses.begin(); it != allUses.end(); ++it) {
+            Value* V = *it;
+            for (auto user : V->users()) {
+                Value* tV = user;
+                // Only PHI/addrPayload updating intrinsic can be coalesced
+                if (isa<PHINode>(tV) || isAddrPayloadUpdater(tV)) {
+                    push_back_if_absent(allUses, tV);
+                }
+            }
+        }
+
+        // allUses have all address payload values. Coalesce them together.
+        // They are opaque and have no aliases.
+        auto iter = allUses.begin();
+        IGC_ASSERT(GII == getNodeValue(GII));
+        addReg(GII, EALIGN_GRF);
+        m_processedValues[GII] = 1;
+        ++iter;
+        for (auto iterEnd = allUses.end(); iter != iterEnd; ++iter) {
+            Value* V = *iter;
+            IGC_ASSERT(V == getNodeValue(V));
+            addReg(V, EALIGN_GRF);
+            unionRegs(GII, V);
+
+            m_processedValues[V] = 1;
+        }
+    }
+}
+
 Value* DeSSA::getRootValue(Value* Val, e_alignment* pAlign) const
 {
     Value* mapVal = nullptr;

IGC/Compiler/CISACodeGen/DeSSA.cpp

@@ -318,6 +318,14 @@ namespace IGC {
             }
             return llvm::isa<llvm::Argument>(V);
         }
+
+        // Special coalescing prior the main algorithm kicks in.
+        void CoalesceOthers();
+        // Main algo shall skip if a value is in the map.
+        llvm::DenseMap<llvm::Value*, int> m_processedValues;
+        bool isProcessed(llvm::Value* V) const {
+            return m_processedValues.count(V) > 0;
+        }
     };
 
     struct MIIndexCompare {

IGC/Compiler/CISACodeGen/DeSSA.hpp

@@ -22848,6 +22848,7 @@ void EmitPass::emitLSC2DBlockAddrPayload(GenIntrinsicInst* GII)
 void EmitPass::emitLSC2DBlockSetAddrPayloadField(GenIntrinsicInst* GII)
 {
     CVariable* AP = GetSymbol(GII->getOperand(0));
+    IGC_ASSERT(AP == m_destination);
     int tval = (int)cast<ConstantInt>(GII->getOperand(1))->getZExtValue();
     LSC2DBlockField Field = (LSC2DBlockField)tval;
     CVariable* cV = GetSymbol(GII->getOperand(2));
@@ -22856,7 +22857,7 @@ void EmitPass::emitLSC2DBlockSetAddrPayloadField(GenIntrinsicInst* GII)
     switch (Field) {
     case LSC2DBlockField::BASE:
     {
-        CVariable* baseQW = m_currShader->GetNewAlias(AP, ISA_TYPE_Q, 0, 1, true);
+        CVariable* baseQW = m_currShader->GetNewAlias(m_destination, ISA_TYPE_Q, 0, 1, true);
         m_encoder->SetUniformSIMDSize(SIMDMode::SIMD1);
         m_encoder->SetDstSubReg(0);
         m_encoder->Copy(baseQW, cV);
@@ -22871,10 +22872,10 @@ void EmitPass::emitLSC2DBlockSetAddrPayloadField(GenIntrinsicInst* GII)
         m_encoder->SetDstSubReg(OprdNum);
         if (IsAddend > 0) {
             m_encoder->SetSrcSubReg(0, OprdNum);
-            m_encoder->Add(AP, AP, cV);
+            m_encoder->Add(m_destination, m_destination, cV);
         }
         else {
-            m_encoder->Copy(AP, cV);
+            m_encoder->Copy(m_destination, cV);
         }
         m_encoder->Push();
         break;
@@ -22887,7 +22888,7 @@ void EmitPass::emitLSC2DBlockSetAddrPayloadField(GenIntrinsicInst* GII)
             : (Field == LSC2DBlockField::HEIGHT ? 3 : 4));
         m_encoder->SetUniformSIMDSize(SIMDMode::SIMD1);
         m_encoder->SetDstSubReg(OprdNum);
-        m_encoder->Copy(AP, cV);
+        m_encoder->Copy(m_destination, cV);
         m_encoder->Push();
         break;
     }

IGC/Compiler/CISACodeGen/EmitVISAPass.cpp

@@ -1481,7 +1481,8 @@ WIAnalysis::WIDependancy WIAnalysisRunner::calculate_dep(const CallInst* inst)
         GII_id == GenISAIntrinsic::GenISA_bitcastfromstruct ||
         GII_id == GenISAIntrinsic::GenISA_bitcasttostruct ||
         GII_id == GenISAIntrinsic::GenISA_LSC2DBlockCreateAddrPayload ||
-        GII_id == GenISAIntrinsic::GenISA_LSC2DBlockCopyAddrPayload)
+        GII_id == GenISAIntrinsic::GenISA_LSC2DBlockCopyAddrPayload ||
+        GII_id == GenISAIntrinsic::GenISA_LSC2DBlockSetAddrPayloadField)
     {
         switch (GII_id)
         {
@@ -1508,6 +1509,7 @@ WIAnalysis::WIDependancy WIAnalysisRunner::calculate_dep(const CallInst* inst)
         case GenISAIntrinsic::GenISA_ReadFromReservedArgSpace:
         case GenISAIntrinsic::GenISA_LSC2DBlockCreateAddrPayload:
         case GenISAIntrinsic::GenISA_LSC2DBlockCopyAddrPayload:
+        case GenISAIntrinsic::GenISA_LSC2DBlockSetAddrPayloadField:
             return WIAnalysis::UNIFORM_THREAD;
         case GenISAIntrinsic::GenISA_getR0:
         case GenISAIntrinsic::GenISA_getPayloadHeader: