Skip to content

Commit 791736b

Browse files
PawelJurekigcbot
authored andcommitted
Minor refactoring and formatting changes
Minor refactoring and formatting changes in EmitVISAPass
1 parent 55b2547 commit 791736b

File tree

2 files changed

+110
-102
lines changed

2 files changed

+110
-102
lines changed

IGC/Compiler/CISACodeGen/EmitVISAPass.cpp

Lines changed: 92 additions & 93 deletions
Original file line numberDiff line numberDiff line change
@@ -11347,7 +11347,8 @@ void EmitPass::emitStoreRawIndexed(
1134711347
cacheOpts,
1134811348
inst->getAlignment(),
1134911349
false,
11350-
addrSpace);
11350+
addrSpace
11351+
);
1135111352
return;
1135211353
}
1135311354
IGC_ASSERT(immOffset == nullptr);
@@ -11527,7 +11528,8 @@ void EmitPass::emitStore(
1152711528
cacheOpts,
1152811529
IGCLLVM::getAlignmentValue(inst),
1152911530
inst->getMetadata("enable.vmask"),
11530-
addrSpace);
11531+
addrSpace
11532+
);
1153111533
return;
1153211534
}
1153311535
IGC_ASSERT_MESSAGE(immScale ? immScale->getSExtValue() == 1 : true,
@@ -17833,7 +17835,9 @@ void EmitPass::emitLSCVectorLoad_subDW(LSC_CACHE_OPTS CacheOpts, bool UseA32,
1783317835
CVariable *Offset, int ImmOffset,
1783417836
int ImmScale, uint32_t NumElts,
1783517837
uint32_t EltBytes,
17836-
LSC_DOC_ADDR_SPACE AddrSpace) {
17838+
LSC_DOC_ADDR_SPACE AddrSpace,
17839+
LSC_ADDR_SIZE AddrSize
17840+
) {
1783717841
// NumElts must be 1 !
1783817842
IGC_ASSERT(NumElts == 1 && (EltBytes == 1 || EltBytes == 2));
1783917843

@@ -17869,14 +17873,6 @@ void EmitPass::emitLSCVectorLoad_subDW(LSC_CACHE_OPTS CacheOpts, bool UseA32,
1786917873
eOffset = BroadcastIfUniform(eOffset);
1787017874
}
1787117875

17872-
LSC_ADDR_SIZE addressSize = LSC_ADDR_SIZE_INVALID;
17873-
if (UseA32) {
17874-
addressSize = LSC_ADDR_SIZE_32b;
17875-
}
17876-
else {
17877-
addressSize = LSC_ADDR_SIZE_64b;
17878-
}
17879-
1788017876
// Need a temp as Dest is smaller than DW.
1788117877
e_alignment dataAlign = ((4 * alloc_nbelts) <= (uint32_t)getGRFSize()) ? EALIGN_GRF : EALIGN_2GRF;
1788217878
CVariable* gatherDst =
@@ -17894,7 +17890,7 @@ void EmitPass::emitLSCVectorLoad_subDW(LSC_CACHE_OPTS CacheOpts, bool UseA32,
1789417890
m_encoder->SetPredicate(flag);
1789517891

1789617892
emitLSCLoad(CacheOpts, gatherDst,
17897-
eOffset, EltBytes * 8, 1, 0, &Resource, addressSize,
17893+
eOffset, EltBytes * 8, 1, 0, &Resource, AddrSize,
1789817894
LSC_DATA_ORDER_NONTRANSPOSE, ImmOffset, ImmScale, AddrSpace);
1789917895
m_encoder->Push();
1790017896
});
@@ -17916,11 +17912,12 @@ void EmitPass::emitLSCVectorLoad_subDW(LSC_CACHE_OPTS CacheOpts, bool UseA32,
1791617912
// 2. sub-DW-aligned load, vectorSize is 1|2|3|4|8
1791717913
// (max size = UQ x 8 = 64 bytes)
1791817914
void EmitPass::emitLSCVectorLoad_uniform(
17919-
LSC_CACHE_OPTS cacheOpts, bool UseA32, ResourceDescriptor &Resource,
17915+
LSC_CACHE_OPTS CacheOpts, bool UseA32, ResourceDescriptor &Resource,
1792017916
CVariable *Dest,
17921-
CVariable *Offset, int ImmOffset,
17922-
int ImmScale, uint32_t NumElts, uint32_t EltBytes, uint64_t Align,
17923-
uint32_t Addrspace, LSC_DOC_ADDR_SPACE userAddrSpace) {
17917+
CVariable *Offset, int ImmOffset, int ImmScale, uint32_t NumElts,
17918+
uint32_t EltBytes, uint64_t Align, uint32_t Addrspace,
17919+
LSC_DOC_ADDR_SPACE UserAddrSpace, LSC_ADDR_SIZE AddrSize) {
17920+
1792417921
IGC_ASSERT(Offset->IsUniform() && (EltBytes == 4 || EltBytes == 8));
1792517922
CVariable *eOffset = Offset;
1792617923
CVariable* ldDest = Dest;
@@ -17942,16 +17939,6 @@ void EmitPass::emitLSCVectorLoad_uniform(
1794217939
bool destUniform = Dest->IsUniform();
1794317940
IGC_ASSERT((vSize <= 64 && (vSize <= 8 || isPowerOf2_32(vSize))));
1794417941

17945-
LSC_ADDR_SIZE addressSize = LSC_ADDR_SIZE_INVALID;
17946-
if (UseA32)
17947-
{
17948-
addressSize = LSC_ADDR_SIZE_32b;
17949-
}
17950-
else
17951-
{
17952-
addressSize = LSC_ADDR_SIZE_64b;
17953-
}
17954-
1795517942
// 1. Do a SIMT1 transposed load
1795617943
if ((isPowerOf2_32(vSize) || vSize == 3) && vSize <= 64 &&
1795717944
((Align >= 8 && dSize == 8) || (Align >= 4 && dSize == 4)))
@@ -17968,11 +17955,10 @@ void EmitPass::emitLSCVectorLoad_uniform(
1796817955
}
1796917956

1797017957
m_encoder->SetNoMask();
17971-
emitLSCLoad(cacheOpts, tDest,
17972-
eOffset, dSize * 8, vSize, 0, &Resource,
17973-
addressSize,
17958+
emitLSCLoad(CacheOpts, tDest,
17959+
eOffset, dSize * 8, vSize, 0, &Resource, AddrSize,
1797417960
LSC_DATA_ORDER_TRANSPOSE, ImmOffset, ImmScale,
17975-
userAddrSpace);
17961+
UserAddrSpace);
1797617962
m_encoder->Push();
1797717963

1797817964
if (needTemp)
@@ -18009,11 +17995,11 @@ void EmitPass::emitLSCVectorLoad_uniform(
1800917995
}
1801017996

1801117997
m_encoder->SetNoMask();
18012-
emitLSCLoad(cacheOpts, tDest,
17998+
emitLSCLoad(CacheOpts, tDest,
1801317999
nEOff, dSize * 8, 1, 0, &Resource,
18014-
addressSize,
18000+
AddrSize,
1801518001
LSC_DATA_ORDER_NONTRANSPOSE, ImmOffset, ImmScale,
18016-
userAddrSpace);
18002+
UserAddrSpace);
1801718003
m_encoder->Push();
1801818004

1801918005
if (needTemp)
@@ -18031,6 +18017,7 @@ void EmitPass::emitLSCVectorLoad(Instruction* inst,
1803118017
LSC_CACHE_OPTS cacheOpts,
1803218018
LSC_DOC_ADDR_SPACE addrSpace
1803318019
) {
18020+
1803418021
Type *Ty = inst->getType();
1803518022
uint64_t align = 0;
1803618023
if (auto LI = dyn_cast<LoadInst>(inst))
@@ -18066,22 +18053,30 @@ void EmitPass::emitLSCVectorLoad(Instruction* inst,
1806618053
const int immScaleInt =
1806718054
immScale ? static_cast<int>(immScale->getSExtValue()) : 1;
1806818055

18056+
LSC_ADDR_SIZE addrSize = LSC_ADDR_SIZE_INVALID;
18057+
if (useA32) {
18058+
addrSize = LSC_ADDR_SIZE_32b;
18059+
}
18060+
else {
18061+
addrSize = LSC_ADDR_SIZE_64b;
18062+
}
18063+
1806918064
// 1. handle cases eltBytes < 4
1807018065
if (eltBytes < 4)
1807118066
{
1807218067
IGC_ASSERT(elts == 1);
1807318068
emitLSCVectorLoad_subDW(cacheOpts, useA32, resource, destCVar,
18074-
eOffset, immOffsetInt,
18075-
immScaleInt, 1, eltBytes, addrSpace);
18069+
eOffset, immOffsetInt, immScaleInt, 1, eltBytes,
18070+
addrSpace, addrSize);
1807618071
return;
1807718072
}
1807818073

1807918074
// 2. Handle uniform load
1808018075
if (srcUniform && resource.m_resource->IsUniform()) {
18081-
emitLSCVectorLoad_uniform(cacheOpts, useA32, resource, destCVar,
18082-
eOffset, immOffsetInt,
18083-
immScaleInt, elts, eltBytes, align,
18084-
ptrType->getPointerAddressSpace(), addrSpace);
18076+
emitLSCVectorLoad_uniform(
18077+
cacheOpts, useA32, resource, destCVar,
18078+
eOffset, immOffsetInt, immScaleInt, elts, eltBytes, align,
18079+
ptrType->getPointerAddressSpace(), addrSpace, addrSize);
1808518080
return;
1808618081
}
1808718082

@@ -18138,25 +18133,18 @@ void EmitPass::emitLSCVectorLoad(Instruction* inst,
1813818133
gatherDst = m_currShader->GetNewAlias(destCVar,
1813918134
dVisaTy, (uint16_t)eltOffBytes, (uint16_t)nbelts);
1814018135
}
18141-
VectorMessage::MESSAGE_KIND messageType = VecMessInfo.insts[i].kind;
18136+
1814218137
m_encoder->SetPredicate(flag);
18143-
LSC_ADDR_SIZE addressSize = LSC_ADDR_SIZE_INVALID;
1814418138

18145-
switch (messageType) {
18146-
case VectorMessage::MESSAGE_A32_LSC_RW:
18147-
addressSize = LSC_ADDR_SIZE_32b;
18148-
break;
18149-
case VectorMessage::MESSAGE_A64_LSC_RW:
18150-
addressSize = LSC_ADDR_SIZE_64b;
18151-
break;
18152-
default:
18153-
IGC_ASSERT_MESSAGE(
18154-
0, "Internal Error: unexpected message kind for load!");
18155-
}
18139+
VectorMessage::MESSAGE_KIND messageType = VecMessInfo.insts[i].kind;
18140+
IGC_ASSERT_MESSAGE(
18141+
messageType == VectorMessage::MESSAGE_A32_LSC_RW ||
18142+
messageType == VectorMessage::MESSAGE_A64_LSC_RW,
18143+
"Internal Error: unexpected message kind for load!");
1815618144

1815718145
emitLSCLoad(cacheOpts, gatherDst,
1815818146
rawAddrVar, blkBits, numBlks, 0, &resource,
18159-
addressSize, LSC_DATA_ORDER_NONTRANSPOSE,
18147+
addrSize, LSC_DATA_ORDER_NONTRANSPOSE,
1816018148
immOffsetInt, immScaleInt, addrSpace);
1816118149
m_encoder->Push();
1816218150

@@ -18169,13 +18157,15 @@ void EmitPass::emitLSCVectorLoad(Instruction* inst,
1816918157
}
1817018158

1817118159
// Sub-function of emitLSCVectorStore()
18172-
void EmitPass::emitLSCVectorStore_subDW(LSC_CACHE_OPTS cacheOpts, bool UseA32,
18160+
void EmitPass::emitLSCVectorStore_subDW(LSC_CACHE_OPTS CacheOpts, bool UseA32,
1817318161
ResourceDescriptor &Resource,
1817418162
CVariable *StoreVar, CVariable *Offset,
1817518163
int ImmOffset, int ImmScale,
1817618164
uint32_t NumElts, uint32_t EltBytes,
1817718165
alignment_t Alignment,
18178-
LSC_DOC_ADDR_SPACE addrSpace) {
18166+
LSC_DOC_ADDR_SPACE AddrSpace,
18167+
LSC_ADDR_SIZE AddrSize
18168+
) {
1817918169
// NumElts must be 1!
1818018170
IGC_ASSERT_MESSAGE(NumElts == 1 && (EltBytes == 1 || EltBytes == 2),
1818118171
"Number of elements must be 1 for an 8bit or 16bit data type in a non-transposed LSC store.");
@@ -18232,12 +18222,11 @@ void EmitPass::emitLSCVectorStore_subDW(LSC_CACHE_OPTS cacheOpts, bool UseA32,
1823218222
{
1823318223
m_encoder->SetNoMask();
1823418224
}
18235-
// NumElts = 1
18236-
emitLSCStore(cacheOpts,
18237-
stVar, eOffset, EltBytes * 8, 1, 0, &Resource,
18238-
UseA32 ? LSC_ADDR_SIZE_32b : LSC_ADDR_SIZE_64b,
18239-
LSC_DATA_ORDER_NONTRANSPOSE, ImmOffset, ImmScale, addrSpace);
18240-
m_encoder->Push();
18225+
// NumElts = 1
18226+
emitLSCStore(CacheOpts,
18227+
stVar, eOffset, EltBytes * 8, 1, 0, &Resource, AddrSize,
18228+
LSC_DATA_ORDER_NONTRANSPOSE, ImmOffset, ImmScale, AddrSpace);
18229+
m_encoder->Push();
1824118230
});
1824218231

1824318232
return;
@@ -18250,13 +18239,15 @@ void EmitPass::emitLSCVectorStore_subDW(LSC_CACHE_OPTS cacheOpts, bool UseA32,
1825018239
// (max size = UQ x 64 = 512 bytes)
1825118240
// 2. sub-DW-aligned store, vectorSize is 1|2|3|4|8
1825218241
// (max size = UQ x 8 = 64 bytes)
18253-
void EmitPass::emitLSCVectorStore_uniform(LSC_CACHE_OPTS cacheOpts, bool UseA32,
18242+
void EmitPass::emitLSCVectorStore_uniform(LSC_CACHE_OPTS CacheOpts, bool UseA32,
1825418243
ResourceDescriptor &Resource,
1825518244
CVariable *StoreVar,
1825618245
CVariable *Offset, int ImmOffset,
1825718246
int ImmScale, uint32_t NumElts,
1825818247
uint32_t EltBytes, alignment_t Align,
18259-
LSC_DOC_ADDR_SPACE addrSpace) {
18248+
LSC_DOC_ADDR_SPACE AddrSpace,
18249+
LSC_ADDR_SIZE AddrSize
18250+
) {
1826018251
// If needed, can handle non-uniform StoreVar.
1826118252
IGC_ASSERT(StoreVar->IsUniform() && Offset->IsUniform() && (EltBytes == 4 || EltBytes == 8));
1826218253

@@ -18277,6 +18268,7 @@ void EmitPass::emitLSCVectorStore_uniform(LSC_CACHE_OPTS cacheOpts, bool UseA32,
1827718268
stVar = m_currShader->GetNewAlias(stVar, ISA_TYPE_UD, 0, 0);
1827818269
}
1827918270

18271+
1828018272
IGC_ASSERT(vSize <= 64 && (vSize < 8 || isPowerOf2_32(vSize)));
1828118273
if (Align < 4 || (dSize == 8 && Align < 8) || !(isPowerOf2_32(vSize) || vSize == 3))
1828218274
{
@@ -18301,11 +18293,11 @@ void EmitPass::emitLSCVectorStore_uniform(LSC_CACHE_OPTS cacheOpts, bool UseA32,
1830118293

1830218294
ResourceLoop(Resource, [&](CVariable* /*flag*/) {
1830318295
m_encoder->SetNoMask();
18304-
emitLSCStore(
18305-
cacheOpts, new_stVar, new_eoff, dSize * 8, 1, 0, &Resource,
18306-
UseA32 ? LSC_ADDR_SIZE_32b : LSC_ADDR_SIZE_64b,
18307-
LSC_DATA_ORDER_NONTRANSPOSE, ImmOffset, ImmScale, addrSpace);
18308-
m_encoder->Push();
18296+
emitLSCStore(CacheOpts,
18297+
new_stVar, new_eoff, dSize * 8, 1, 0, &Resource,
18298+
AddrSize, LSC_DATA_ORDER_NONTRANSPOSE, ImmOffset,
18299+
ImmScale, AddrSpace);
18300+
m_encoder->Push();
1830918301
});
1831018302
return;
1831118303
}
@@ -18323,10 +18315,9 @@ void EmitPass::emitLSCVectorStore_uniform(LSC_CACHE_OPTS cacheOpts, bool UseA32,
1832318315
ResourceLoop(Resource, [&](CVariable* /*flag*/) {
1832418316
m_encoder->SetUniformSIMDSize(SIMDMode::SIMD1);
1832518317
m_encoder->SetNoMask();
18326-
emitLSCStore(cacheOpts, stVar, eOffset, dSize * 8, vSize, 0, &Resource,
18327-
UseA32 ? LSC_ADDR_SIZE_32b : LSC_ADDR_SIZE_64b,
18328-
LSC_DATA_ORDER_TRANSPOSE,
18329-
ImmOffset, ImmScale, addrSpace);
18318+
emitLSCStore(CacheOpts,
18319+
stVar, eOffset, dSize * 8, vSize, 0, &Resource, AddrSize,
18320+
LSC_DATA_ORDER_TRANSPOSE, ImmOffset, ImmScale, AddrSpace);
1833018321
m_encoder->Push();
1833118322
});
1833218323
return;
@@ -18337,7 +18328,10 @@ void EmitPass::emitLSCVectorStore(Value *Ptr,
1833718328
ConstantInt *immScale, Value *storedVal,
1833818329
BasicBlock *BB, LSC_CACHE_OPTS cacheOpts,
1833918330
alignment_t align, bool dontForceDmask,
18340-
LSC_DOC_ADDR_SPACE addrSpace) {
18331+
LSC_DOC_ADDR_SPACE addrSpace
18332+
18333+
) {
18334+
1834118335
PointerType* ptrType = cast<PointerType>(Ptr->getType());
1834218336
Type* Ty = storedVal->getType();
1834318337
IGCLLVM::FixedVectorType* VTy = dyn_cast<IGCLLVM::FixedVectorType>(Ty);
@@ -18390,6 +18384,14 @@ void EmitPass::emitLSCVectorStore(Value *Ptr,
1839018384
const int immScaleVal =
1839118385
immScale ? static_cast<int>(immScale->getSExtValue()) : 1;
1839218386

18387+
LSC_ADDR_SIZE addrSize = LSC_ADDR_SIZE_INVALID;
18388+
if (useA32) {
18389+
addrSize = LSC_ADDR_SIZE_32b;
18390+
}
18391+
else {
18392+
addrSize = LSC_ADDR_SIZE_64b;
18393+
}
18394+
1839318395
// 1. handle cases eltBytes < 4
1839418396
if (eltBytes < 4)
1839518397
{
@@ -18398,7 +18400,7 @@ void EmitPass::emitLSCVectorStore(Value *Ptr,
1839818400
IGC_ASSERT(elts == 1);
1839918401
emitLSCVectorStore_subDW(cacheOpts, useA32, resource,
1840018402
storedVar, eOffset, immOffsetVal, immScaleVal,
18401-
1, eltBytes, align, addrSpace);
18403+
1, eltBytes, align, addrSpace, addrSize);
1840218404
return;
1840318405
}
1840418406

@@ -18407,9 +18409,10 @@ void EmitPass::emitLSCVectorStore(Value *Ptr,
1840718409
// 2. Handle uniform Store
1840818410
if (dstUniform && srcUniform)
1840918411
{
18410-
emitLSCVectorStore_uniform(cacheOpts, useA32, resource, storedVar,
18411-
eOffset, immOffsetVal, immScaleVal, elts,
18412-
eltBytes, align, addrSpace);
18412+
emitLSCVectorStore_uniform(cacheOpts, useA32, resource,
18413+
storedVar, eOffset, immOffsetVal,
18414+
immScaleVal, elts, eltBytes, align,
18415+
addrSpace, addrSize);
1841318416
return;
1841418417
}
1841518418

@@ -18466,22 +18469,18 @@ void EmitPass::emitLSCVectorStore(Value *Ptr,
1846618469
IGC_ASSERT_MESSAGE(nbelts < (UINT16_MAX), "nbelts > higher than 64k");
1846718470
CVariable* subStoredVar = m_currShader->GetNewAlias(
1846818471
storedVar, storedType, (uint16_t)eltOffBytes, (uint16_t)nbelts);
18469-
switch (VecMessInfo.insts[i].kind) {
18470-
case VectorMessage::MESSAGE_A32_LSC_RW:
18471-
emitLSCStore(
18472-
cacheOpts, subStoredVar, rawAddrVar, blkBits, numBlks, 0, &resource,
18473-
LSC_ADDR_SIZE_32b, LSC_DATA_ORDER_NONTRANSPOSE, immOffsetVal, immScaleVal, addrSpace);
18474-
break;
18475-
case VectorMessage::MESSAGE_A64_LSC_RW:
18476-
emitLSCStore(cacheOpts,
18477-
subStoredVar, rawAddrVar, blkBits, numBlks, 0,
18478-
&resource, LSC_ADDR_SIZE_64b,
18479-
LSC_DATA_ORDER_NONTRANSPOSE, immOffsetVal,
18480-
immScaleVal, addrSpace);
18481-
break;
18482-
default:
18483-
IGC_ASSERT_MESSAGE(0, "Internal Error: unexpected Message kind for store");
18484-
}
18472+
18473+
VectorMessage::MESSAGE_KIND messageType = VecMessInfo.insts[i].kind;
18474+
IGC_ASSERT_MESSAGE(
18475+
messageType == VectorMessage::MESSAGE_A32_LSC_RW ||
18476+
messageType == VectorMessage::MESSAGE_A64_LSC_RW,
18477+
"Internal Error: unexpected message kind for load!");
18478+
18479+
emitLSCStore(cacheOpts,
18480+
subStoredVar, rawAddrVar, blkBits, numBlks, 0,
18481+
&resource, addrSize, LSC_DATA_ORDER_NONTRANSPOSE,
18482+
immOffsetVal, immScaleVal, addrSpace);
18483+
1848518484
m_encoder->Push();
1848618485
}
1848718486
});

0 commit comments

Comments
 (0)