Add iga::OpSpec::hasImplicitFlagModifier to check if instructions

have implicit flag modifier. In the case the instructions have,
we should set the flag registers. Also refactor BinaryEncodingIGA.

Change-Id: I23cef5a3ad4f5497a4de2306d91a09cfea3d292e

Author: DianaChen

visa/BinaryEncodingIGA.cpp

@@ -592,6 +592,35 @@ void BinaryEncodingIGA::SetSWSB(G4_INST *inst, iga::SWSB &sw)
     return;
 }
 
+void BinaryEncodingIGA::getIGAFlagInfo(
+    G4_INST* inst, const OpSpec* opSpec, Predication& pred, FlagModifier& condMod, RegRef& flagReg)
+{
+    G4_Predicate* predG4 = inst->getPredicate();
+    G4_CondMod* condModG4 = inst->getCondMod();
+    iga::RegRef predFlag;
+    bool hasPredFlag = false;
+
+    if (opSpec->supportsPredication() && predG4 != nullptr)
+    {
+        pred = getIGAPredication(predG4);
+        predFlag = getIGAFlagReg(predG4->getBase());
+        flagReg = predFlag;
+        hasPredFlag = true;
+    }
+
+    if ((opSpec->supportsFlagModifier() || opSpec->hasImplicitFlagModifier()) &&
+        condModG4 != nullptr)
+    {
+        condMod = getIGAFlagModifier(condModG4);
+        // in case for min/max sel instruction, it could have CondMod but has no flag registers
+        if (condModG4->getBase() != nullptr) {
+            flagReg = getIGAFlagReg(condModG4->getBase());
+            // pred and condMod Flags must be the same
+            assert(!hasPredFlag || predFlag == flagReg);
+        }
+    }
+}
+
 void BinaryEncodingIGA::DoAll()
 {
     FixInst();
@@ -675,17 +704,7 @@ void BinaryEncodingIGA::DoAll()
             MaskCtrl maskCtrl = getIGAMaskCtrl(inst->opcode() == G4_jmpi ? true : inst->isWriteEnableInst());
             FlagModifier condModifier = FlagModifier::NONE;
 
-            if (opSpec->supportsPredication())
-            {
-                flagReg = getIGAFlagReg(inst);
-                pred = getIGAPredication(inst->getPredicate());
-            }
-            if (opSpec->supportsFlagModifier() ||
-                (inst->getCondMod() != nullptr && inst->getCondMod()->getMod() != G4_CondModifier::Mod_cond_undef))
-            {
-                flagReg = getIGAFlagReg(inst);
-                condModifier = getIGAFlagModifier(inst);
-            }
+            getIGAFlagInfo(inst, opSpec, pred, condModifier, flagReg);
 
             if (opSpec->isBranching())
             {

visa/BinaryEncodingIGA.h

@@ -392,35 +392,22 @@ class BinaryEncodingIGA
         return b;
     }
 
-    iga::RegRef getIGAFlagReg(G4_INST *inst)
+    void getIGAFlagInfo(
+        G4_INST* inst, const iga::OpSpec* opSpec, iga::Predication& pred,
+        iga::FlagModifier& condMod, iga::RegRef& flagReg);
+
+    iga::RegRef getIGAFlagReg(G4_VarBase* g4Base)
     {
         iga::RegRef reg = iga::REGREF_INVALID;
-        G4_Predicate* predG4 = inst->getPredicate();
         bool flagRegNumValid = true;
-        if (predG4)
-        {
-            reg.regNum =
-                (uint8_t)predG4->getBase()->ExRegNum(flagRegNumValid);
-            reg.subRegNum = (uint8_t)predG4->getBase()->asRegVar()->getPhyRegOff();
-        }
-
-        G4_CondMod* condModG4 = inst->getCondMod();
-        if (condModG4)
-        {
-            G4_VarBase* flagReg = condModG4->getBase();
-            if (flagReg != NULL)
-            {
-                reg.regNum = (uint8_t)flagReg->ExRegNum(flagRegNumValid);
-                reg.subRegNum = (uint8_t)flagReg->asRegVar()->getPhyRegOff();
-            }
-        }
+        reg.regNum = (uint8_t)g4Base->ExRegNum(flagRegNumValid);
         ASSERT_USER(flagRegNumValid, "Unable to retrieve flag Reg Num for predicate or conditional modifier.");
+        reg.subRegNum = (uint8_t)g4Base->asRegVar()->getPhyRegOff();
         return reg;
     }
 
-    iga::FlagModifier getIGAFlagModifier(G4_INST *inst) const
+    iga::FlagModifier getIGAFlagModifier(G4_CondMod* cMod) const
     {
-        auto cMod = inst->getCondMod();
         if (cMod == nullptr)
         {
             return iga::FlagModifier::NONE;

visa/iga/IGALibrary/Backend/GED/Decoder.cpp

@@ -1453,8 +1453,10 @@ FlagRegInfo DecoderBase::decodeFlagRegInfo(bool imm64Src0Overlaps) {
         // GEN12 SWSB overlaps CondModifier and Imm64 values
         GED_DECODE_RAW(GED_COND_MODIFIER, condMod, CondModifier);
         fri.modifier = GEDToIGATranslation::translate(condMod);
-    } else if (m_opSpec->isMathSubFunc() && m_opSpec->isMacro()) {
+    } else if (m_opSpec->hasImplicitFlagModifier()) {
         // math.inv and math.rsqrtm both implicitly support EO
+        // currently math is the only case, and its flagModifier must be EO
+        assert(m_opSpec->isMathSubFunc());
         fri.modifier = FlagModifier::EO;
     }
 

visa/iga/IGALibrary/Models/OpSpec.hpp

@@ -597,6 +597,11 @@ namespace iga
         bool supportsFlagModifier() const {
             return hasAttrs(Attr::SUPPORTS_FLAGMODIFIER);
         }
+        bool hasImplicitFlagModifier() const {
+            // math.invm and math.sqtrm has implicit flag modifier, which
+            // that flag register must be exisited
+            return isMathSubFunc() && isMacro();
+        }
         bool supportsSaturation() const {
             return hasAttrs(Attr::SUPPORTS_SATURATION);
         }