Enable auto reg selelction

bcheng0127 · igcbot · commit 81ac26aa6fdd · 2021-06-12T21:13:09.000+02:00
diff --git a/visa/LocalScheduler/G4_Sched.cpp b/visa/LocalScheduler/G4_Sched.cpp
@@ -712,7 +712,7 @@ bool preRA_RegSharing::run()
     }
 
     if (!kernel.getOptions()->getuInt32Option(vISA_ForceHWThreadNumberPerEU) &&
-        (maxPressure > getRPThresholdHigh(kernel.getNumRegTotal(), kernel.getSimdSize())))
+        (maxPressure > getRPThresholdHigh(kernel.getNumRegTotal() - kernel.getOptions()->getuInt32Option(vISA_ReservedGRFNum), kernel.getSimdSize())))
     {
         // Update number of threads, GRF, Acc and SWSB
         kernel.updateKernelByNumThreads(GrfMode.getMinNumThreads());

Original file line number	Diff line number	Diff line change
`@@ -712,7 +712,7 @@ bool preRA_RegSharing::run()`
`712`	`712`	`}`
`713`	`713`
`714`	`714`	`if (!kernel.getOptions()->getuInt32Option(vISA_ForceHWThreadNumberPerEU) &&`
`715`		`- (maxPressure > getRPThresholdHigh(kernel.getNumRegTotal(), kernel.getSimdSize())))`
	`715`	`+ (maxPressure > getRPThresholdHigh(kernel.getNumRegTotal() - kernel.getOptions()->getuInt32Option(vISA_ReservedGRFNum), kernel.getSimdSize())))`
`716`	`716`	`{`
`717`	`717`	`// Update number of threads, GRF, Acc and SWSB`
`718`	`718`	`kernel.updateKernelByNumThreads(GrfMode.getMinNumThreads());`