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Fix and extend external srnd builtins
Fix types and naming mismatch between internal and external builtins.
1 parent 64dd310 commit 8870832

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5 files changed

+59
-58
lines changed

5 files changed

+59
-58
lines changed

‎IGC/BiFModule/Implementation/IGCBiF_Intrinsics_Dpas.cl

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -436,20 +436,20 @@ float16 __builtin_IB_ftotf32_16(float16 a) __attribute__((const));
436436
// a: hf | f
437437
// r: random number, has the same type as a's
438438
// HF -> BF8
439-
char __builtin_IB_srnd_hftobf8_1_char (half a, char r) __attribute__((const));
440-
char2 __builtin_IB_srnd_hftobf8_2_char (half2 a, char2 r) __attribute__((const));
441-
char3 __builtin_IB_srnd_hftobf8_3_char (half3 a, char3 r) __attribute__((const));
442-
char4 __builtin_IB_srnd_hftobf8_4_char (half4 a, char4 r) __attribute__((const));
443-
char8 __builtin_IB_srnd_hftobf8_8_char (half8 a, char8 r) __attribute__((const));
444-
char16 __builtin_IB_srnd_hftobf8_16_char(half16 a, char16 r) __attribute__((const));
439+
char __builtin_IB_srnd_hftobf8_1 (half a, char r) __attribute__((const));
440+
char2 __builtin_IB_srnd_hftobf8_2 (half2 a, char2 r) __attribute__((const));
441+
char3 __builtin_IB_srnd_hftobf8_3 (half3 a, char3 r) __attribute__((const));
442+
char4 __builtin_IB_srnd_hftobf8_4 (half4 a, char4 r) __attribute__((const));
443+
char8 __builtin_IB_srnd_hftobf8_8 (half8 a, char8 r) __attribute__((const));
444+
char16 __builtin_IB_srnd_hftobf8_16(half16 a, char16 r) __attribute__((const));
445445

446446

447447
// F -> HF
448-
half __builtin_IB_srnd_ftohf_1_short (float a, short r) __attribute__((const));
449-
half2 __builtin_IB_srnd_ftohf_2_short (float2 a, short2 r) __attribute__((const));
450-
half3 __builtin_IB_srnd_ftohf_3_short (float3 a, short3 r) __attribute__((const));
451-
half4 __builtin_IB_srnd_ftohf_4_short (float4 a, short4 r) __attribute__((const));
452-
half8 __builtin_IB_srnd_ftohf_8_short (float8 a, short8 r) __attribute__((const));
453-
half16 __builtin_IB_srnd_ftohf_16_short(float16 a, short16 r) __attribute__((const));
448+
half __builtin_IB_srnd_ftohf_1 (float a, short r) __attribute__((const));
449+
half2 __builtin_IB_srnd_ftohf_2 (float2 a, short2 r) __attribute__((const));
450+
half3 __builtin_IB_srnd_ftohf_3 (float3 a, short3 r) __attribute__((const));
451+
half4 __builtin_IB_srnd_ftohf_4 (float4 a, short4 r) __attribute__((const));
452+
half8 __builtin_IB_srnd_ftohf_8 (float8 a, short8 r) __attribute__((const));
453+
half16 __builtin_IB_srnd_ftohf_16(float16 a, short16 r) __attribute__((const));
454454

455455
#endif // IGCBIF_INTRINSICS_DPAS_CL

‎IGC/BiFModule/Languages/OpenCL/IBiF_dpas.cl

Lines changed: 14 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -524,26 +524,26 @@ DEFN_INTEL_CVT( bf8_to_f16, half16, char16, bf8tohf_16 )
524524

525525
#ifdef cl_intel_stochastic_rounding
526526
// stochastic rounding
527-
DEFN_INTEL_CVT2( f16_to_bf8_srnd, char, half, char, srnd_hftobf8_1_char )
528-
DEFN_INTEL_CVT2( f16_to_bf8_srnd, char2, half2, char2, srnd_hftobf8_2_char )
529-
DEFN_INTEL_CVT2( f16_to_bf8_srnd, char3, half3, char3, srnd_hftobf8_3_char )
530-
DEFN_INTEL_CVT2( f16_to_bf8_srnd, char4, half4, char4, srnd_hftobf8_4_char )
531-
DEFN_INTEL_CVT2( f16_to_bf8_srnd, char8, half8, char8, srnd_hftobf8_8_char )
532-
DEFN_INTEL_CVT2( f16_to_bf8_srnd, char16, half16, char16, srnd_hftobf8_16_char )
533-
534-
DEFN_INTEL_CVT2( f32_to_f16_srnd, half, float, short, srnd_ftohf_1_short )
535-
DEFN_INTEL_CVT2( f32_to_f16_srnd, half2, float2, short2, srnd_ftohf_2_short )
536-
DEFN_INTEL_CVT2( f32_to_f16_srnd, half3, float3, short3, srnd_ftohf_3_short )
537-
DEFN_INTEL_CVT2( f32_to_f16_srnd, half4, float4, short4, srnd_ftohf_4_short )
538-
DEFN_INTEL_CVT2( f32_to_f16_srnd, half8, float8, short8, srnd_ftohf_8_short )
539-
DEFN_INTEL_CVT2( f32_to_f16_srnd, half16, float16, short16, srnd_ftohf_16_short )
527+
DEFN_INTEL_CVT2( f16_to_bf8_srnd, char, half, char, srnd_hftobf8_1 )
528+
DEFN_INTEL_CVT2( f16_to_bf8_srnd, char2, half2, char2, srnd_hftobf8_2 )
529+
DEFN_INTEL_CVT2( f16_to_bf8_srnd, char3, half3, char3, srnd_hftobf8_3 )
530+
DEFN_INTEL_CVT2( f16_to_bf8_srnd, char4, half4, char4, srnd_hftobf8_4 )
531+
DEFN_INTEL_CVT2( f16_to_bf8_srnd, char8, half8, char8, srnd_hftobf8_8 )
532+
DEFN_INTEL_CVT2( f16_to_bf8_srnd, char16, half16, char16, srnd_hftobf8_16 )
533+
534+
DEFN_INTEL_CVT2( f32_to_f16_srnd, half, float, short, srnd_ftohf_1 )
535+
DEFN_INTEL_CVT2( f32_to_f16_srnd, half2, float2, short2, srnd_ftohf_2 )
536+
DEFN_INTEL_CVT2( f32_to_f16_srnd, half3, float3, short3, srnd_ftohf_3 )
537+
DEFN_INTEL_CVT2( f32_to_f16_srnd, half4, float4, short4, srnd_ftohf_4 )
538+
DEFN_INTEL_CVT2( f32_to_f16_srnd, half8, float8, short8, srnd_ftohf_8 )
539+
DEFN_INTEL_CVT2( f32_to_f16_srnd, half16, float16, short16, srnd_ftohf_16 )
540540
#endif // cl_intel_stochastic_rounding
541541

542542
#endif // cl_khr_fp16
543543

544544
#endif // cl_intel_subgroup_matrix_multiply_accumulate_bf8
545545

546-
#endif
546+
#endif // cl_intel_subgroup_matrix_multiply_accumulate
547547

548548

549549
#ifdef cl_intel_subgroup_split_matrix_multiply_accumulate

‎IGC/BiFModule/Languages/OpenCL/PreRelease/opencl_cth_pre_release.h

Lines changed: 13 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -2483,20 +2483,19 @@ half16 __attribute__((overloadable)) intel_convert_bf8_to_f16(char16 source);
24832483
#ifdef cl_intel_stochastic_rounding
24842484

24852485
// stochastic rounding
2486-
char __attribute__((overloadable)) intel_convert_f16_to_bf8_srnd(half source, half random);
2487-
char2 __attribute__((overloadable)) intel_convert_f16_to_bf8_srnd(half2 source, half2 random);
2488-
char3 __attribute__((overloadable)) intel_convert_f16_to_bf8_srnd(half3 source, half3 random);
2489-
char4 __attribute__((overloadable)) intel_convert_f16_to_bf8_srnd(half4 source, half4 random);
2490-
char8 __attribute__((overloadable)) intel_convert_f16_to_bf8_srnd(half8 source, half8 random);
2491-
char16 __attribute__((overloadable)) intel_convert_f16_to_bf8_srnd(half16 source, half16 random);
2492-
2493-
half __attribute__((overloadable)) intel_convert_f32_to_f16_srnd(float source, float random);
2494-
half2 __attribute__((overloadable)) intel_convert_f32_to_f16_srnd(float2 source, float2 random);
2495-
half3 __attribute__((overloadable)) intel_convert_f32_to_f16_srnd(float3 source, float3 random);
2496-
half4 __attribute__((overloadable)) intel_convert_f32_to_f16_srnd(float4 source, float4 random);
2497-
half8 __attribute__((overloadable)) intel_convert_f32_to_f16_srnd(float8 source, float8 random);
2498-
half16 __attribute__((overloadable)) intel_convert_f32_to_f16_srnd(float16 source, float16 random);
2499-
2486+
char __attribute__((overloadable)) intel_convert_f16_to_bf8_srnd(half source, char random);
2487+
char2 __attribute__((overloadable)) intel_convert_f16_to_bf8_srnd(half2 source, char2 random);
2488+
char3 __attribute__((overloadable)) intel_convert_f16_to_bf8_srnd(half3 source, char3 random);
2489+
char4 __attribute__((overloadable)) intel_convert_f16_to_bf8_srnd(half4 source, char4 random);
2490+
char8 __attribute__((overloadable)) intel_convert_f16_to_bf8_srnd(half8 source, char8 random);
2491+
char16 __attribute__((overloadable)) intel_convert_f16_to_bf8_srnd(half16 source, char16 random);
2492+
2493+
half __attribute__((overloadable)) intel_convert_f32_to_f16_srnd(float source, short random);
2494+
half2 __attribute__((overloadable)) intel_convert_f32_to_f16_srnd(float2 source, short2 random);
2495+
half3 __attribute__((overloadable)) intel_convert_f32_to_f16_srnd(float3 source, short3 random);
2496+
half4 __attribute__((overloadable)) intel_convert_f32_to_f16_srnd(float4 source, short4 random);
2497+
half8 __attribute__((overloadable)) intel_convert_f32_to_f16_srnd(float8 source, short8 random);
2498+
half16 __attribute__((overloadable)) intel_convert_f32_to_f16_srnd(float16 source, short16 random);
25002499
#endif // cl_intel_stochastic_rounding
25012500

25022501
#endif // cl_khr_fp16

‎IGC/Compiler/Optimizer/OpenCLPasses/DpasFuncs/DpasFuncsResolution.cpp

Lines changed: 12 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -678,18 +678,19 @@ bool DpasFuncsResolution::processSrnd(CallInst& CI)
678678
return false;
679679

680680
StringRef funcName = func->getName();
681+
681682
int VecLen;
682683
bool isSat = false;
683684
GenISAIntrinsic::ID iid;
684-
if (funcName.startswith("__builtin_IB_srnd_ftohf_"))
685+
if (funcName.consume_front("__builtin_IB_srnd_ftohf_"))
685686
{
686-
if (!demangleFCvtSuffix(funcName, (int)sizeof("__builtin_IB_srnd_ftohf_") - 1, nullptr, &VecLen, nullptr))
687+
if (!demangleFCvtSuffix(funcName, 0, nullptr, &VecLen, nullptr))
687688
return false;
688689
iid = GenISAIntrinsic::GenISA_srnd_ftohf;
689690
}
690-
else if (funcName.startswith("__builtin_IB_srnd_hftobf8_"))
691+
else if (funcName.consume_front("__builtin_IB_srnd_hftobf8_"))
691692
{
692-
if (!demangleFCvtSuffix(funcName, (int)sizeof("__builtin_IB_srnd_hftobf8_") - 1, nullptr, &VecLen, &isSat))
693+
if (!demangleFCvtSuffix(funcName, 0, nullptr, &VecLen, &isSat))
693694
return false;
694695
iid = GenISAIntrinsic::GenISA_srnd_hftobf8;
695696
}
@@ -702,7 +703,7 @@ bool DpasFuncsResolution::processSrnd(CallInst& CI)
702703
Value* args[3] = { CI.getArgOperand(0), CI.getArgOperand(1), ConstantInt::get(boolTy, isSat) };
703704
ArrayRef<Value*> ii_args(args, 3);
704705

705-
Type* ITys[3] = { func->getReturnType(), args[0]->getType(), boolTy };
706+
Type* ITys[4] = { func->getReturnType(), args[0]->getType(), args[1]->getType(), boolTy };
706707
Function* srndFunc = GenISAIntrinsic::getDeclaration(func->getParent(), iid, ITys);
707708
Instruction* srndCall = CallInst::Create(srndFunc, ii_args, VALUE_NAME("srnd"), &CI);
708709

@@ -720,11 +721,12 @@ bool DpasFuncsResolution::processSrnd(CallInst& CI)
720721
uint32_t n = VTy ? (uint32_t)VTy->getNumElements() : 1;
721722
uint32_t n0 = VOpnd0Ty ? (uint32_t)VOpnd0Ty->getNumElements() : 1;
722723

723-
if (n != n0 || n != VecLen ||
724-
!(((ETy->isHalfTy() && EOpnd0Ty->isFloatTy()) &&
725-
EOpnd1Ty->isIntegerTy(16)) ||
726-
((ETy->isIntegerTy(8) && EOpnd0Ty->isHalfTy() &&
727-
!EOpnd1Ty->isIntegerTy(8)))))
724+
bool supported = false;
725+
supported |= (ETy->isHalfTy() && EOpnd0Ty->isFloatTy() && EOpnd1Ty->isIntegerTy(16));
726+
supported |= (ETy->isIntegerTy(8) && EOpnd0Ty->isHalfTy() && EOpnd1Ty->isIntegerTy(8));
727+
supported |= (ETy->isIntegerTy(8) && EOpnd0Ty->isIntegerTy(16) && EOpnd1Ty->isIntegerTy(8));
728+
729+
if (n != n0 || n != VecLen || !supported)
728730
{
729731
m_ErrorMsg = "Wrong argument types in srnd builtin!";
730732
IGC_ASSERT_MESSAGE(0, "Wrong argument types in srnd builtin!");

‎IGC/GenISAIntrinsics/Intrinsic_definitions.py

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -3005,17 +3005,17 @@
30053005
"NoMem"]],
30063006
####################################################################################################
30073007
"GenISA_srnd_hftobf8": ["stochastic rounding: srnd dst src0 src1",
3008-
[("anyint", "dst: bf8 (as ub)"),
3009-
[("anyfloat", "src0: HF"),
3010-
(1, "src1: random number. HF(the same as src0's)"),
3011-
("bool", "saturation (true: sat; false: no)")],
3008+
[("anychar", "dst: bf8. UB"),
3009+
[("anyhalf", "src0: HF"),
3010+
("anychar", "src1: random number. UB"),
3011+
("bool", "saturation (true: sat; false: no)")],
30123012
"NoMem"]],
30133013
####################################################################################################
30143014
"GenISA_srnd_ftohf": ["stochastic rounding: srnd dst src0 src1",
3015-
[("anyfloat", "dst: hf"),
3016-
[("anyfloat", "src0: F"),
3017-
(1, "src1: random number. F(the same as src0's)"),
3018-
("bool", "saturation (true: sat; false: no)")],
3015+
[("anyhalf", "dst: HF"),
3016+
[("anyfloat", "src0: F"),
3017+
("anyshort", "src1: random number. UW"),
3018+
("bool", "saturation (true: sat; false: no)")],
30193019
"NoMem"]],
30203020
####################################################################################################
30213021
"GenISA_OutputMeshPrimitiveData": ["",

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