Fix register pressure estimator pass in presence of stack

calls

Register pressure estimator pass was accumulating register pressure from stack call related pseudo nodes in its computation. Given these are pseudo nodes, they don't contribute to actual program register pressure.

Author: pratikashar

visa/RPE.cpp

@@ -15,7 +15,7 @@ SPDX-License-Identifier: MIT
 namespace vISA
 {
     RPE::RPE(const GlobalRA& g, const LivenessAnalysis* l, DECLARE_LIST* spills) : m(1024), gra(g), liveAnalysis(l), live(l->getNumSelectedVar()),
-        vars(l->vars)
+        vars(l->vars), fg(g.kernel.fg)
     {
         options = g.kernel.getOptions();
         if (spills)
@@ -146,6 +146,8 @@ namespace vISA
                 G4_Declare* rootDcl = range->getDeclare()->getRootDeclare();
                 if (isSpilled(rootDcl))
                     continue;
+                if (isStackPseudoVar(rootDcl))
+                    continue;
                 if (rootDcl->getNumElems() > 1)
                 {
                     regPressure += rootDcl->getNumRows();
@@ -176,6 +178,8 @@ namespace vISA
             auto dcl = vars[id]->getDeclare();
             if (isSpilled(dcl))
                 return;
+            if (isStackPseudoVar(dcl))
+                return;
             // For <1 GRF variable we have to take alignment into consideration as well when computing register pressure.
             // For now we double each <1GRF variable's size if its alignment also exceeds its size.
             // Alternative is to simply take the alignment as the size, but it might cause performance regressions

visa/RPE.h

@@ -49,6 +49,7 @@ namespace vISA
     private:
         Mem_Manager m;
         const GlobalRA& gra;
+        const FlowGraph& fg;
         const LivenessAnalysis* const liveAnalysis;
         std::unordered_map<G4_INST*, unsigned int> rp;
         double regPressure = 0;
@@ -66,14 +67,34 @@ namespace vISA
         void updateRegisterPressure(unsigned int, unsigned int, unsigned int);
         void updateLiveness(SparseBitSet&, uint32_t, bool);
 
-
         bool isSpilled(const G4_Declare* dcl) const
         {
             auto it = spilledVars.find(dcl);
             if (it == spilledVars.end())
                 return false;
             return true;
         }
+
+        bool isStackPseudoVar(G4_Declare* dcl) const
+        {
+            bool stackCall = fg.getIsStackCallFunc() || fg.getHasStackCalls();
+            if (stackCall)
+            {
+                if (fg.isPseudoDcl(dcl))
+                    return true;
+
+                auto phyReg = dcl->getRegVar()->getPhyReg();
+                if (phyReg && phyReg->isGreg())
+                {
+                    auto regNum = phyReg->asGreg()->getRegNum();
+                    // Pre-assigned variables like FP, SP from
+                    // reserved GRFs don't contribute to reg pressure.
+                    if (regNum >= fg.builder->kernel.getStackCallStartReg())
+                        return true;
+                }
+            }
+            return false;
+        }
     };
 }
 #endif