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scottp101
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cleanup
cleanup
1 parent af52bc6 commit 9b6dc25

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7 files changed

+8
-176
lines changed

7 files changed

+8
-176
lines changed

‎IGC/AdaptorCommon/RayTracing/RTBuilder.cpp

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1853,6 +1853,13 @@ CallInst* RTBuilder::ctlz(Value* V)
18531853
return CreateCall2(Ctlz, V, getFalse(), VALUE_NAME("lzd"));
18541854
}
18551855

1856+
CallInst* RTBuilder::cttz(Value* V)
1857+
{
1858+
auto* Cttz = Intrinsic::getDeclaration(
1859+
GetInsertBlock()->getModule(), Intrinsic::cttz, V->getType());
1860+
return CreateCall2(Cttz, V, getFalse(), VALUE_NAME("cttz"));
1861+
}
1862+
18561863
void RTBuilder::createPotentialHit2CommittedHit(StackPointerVal* StackPtr)
18571864
{
18581865
switch (getMemoryStyle())

‎IGC/AdaptorCommon/RayTracing/RTBuilder.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -463,6 +463,7 @@ class RTBuilder : public IGCIRBuilder<>
463463
GenIntrinsicInst* createDummyInstID(Value* pSrcVal);
464464

465465
CallInst* ctlz(Value* V);
466+
CallInst* cttz(Value* V);
466467

467468
void createPotentialHit2CommittedHit(StackPointerVal* StackPtr);
468469

‎IGC/Compiler/CISACodeGen/EmitVISAPass.cpp

Lines changed: 0 additions & 120 deletions
Original file line numberDiff line numberDiff line change
@@ -8929,12 +8929,6 @@ void EmitPass::EmitGenIntrinsicMessage(llvm::GenIntrinsicInst* inst)
89298929
case GenISAIntrinsic::GenISA_InlinedData:
89308930
emitInlinedDataValue(inst);
89318931
break;
8932-
case GenISAIntrinsic::GenISA_TileXOffset:
8933-
emitTileXOffset(cast<TileXIntrinsic>(inst));
8934-
break;
8935-
case GenISAIntrinsic::GenISA_TileYOffset:
8936-
emitTileYOffset(cast<TileYIntrinsic>(inst));
8937-
break;
89388932
case GenISAIntrinsic::GenISA_LSCStore:
89398933
case GenISAIntrinsic::GenISA_LSCStoreBlock:
89408934
case GenISAIntrinsic::GenISA_LSCLoad:
@@ -23201,120 +23195,6 @@ void EmitPass::emitInlinedDataValue(llvm::GenIntrinsicInst* I)
2320123195
IGC_ASSERT(m_currShader->GetShaderType() == ShaderType::RAYTRACING_SHADER);
2320223196
}
2320323197

23204-
void EmitPass::emitTileXOffset(TileXIntrinsic* I)
23205-
{
23206-
const uint32_t XDim = I->getTileXDim();
23207-
IGC_ASSERT(iSTD::IsPowerOfTwo(XDim));
23208-
23209-
const uint32_t lanes = numLanes(m_currShader->m_SIMDSize);
23210-
23211-
CVariable* TID = GetSymbol(I->getTID());
23212-
if (!TID->IsUniform())
23213-
TID = UniformCopy(TID);
23214-
23215-
if (XDim >= lanes)
23216-
{
23217-
uint32_t Ratio = XDim / lanes;
23218-
CVariable* Mask = m_currShader->ImmToVariable(Ratio - 1, ISA_TYPE_UW);
23219-
CVariable* XCnt = m_currShader->GetNewVariable(TID);
23220-
23221-
// xcnt = tid & (ratio - 1)
23222-
m_encoder->And(XCnt, TID, Mask);
23223-
m_encoder->Push();
23224-
23225-
CVariable* XVals = m_currShader->GetNewVariable(
23226-
numLanes(m_currShader->m_SIMDSize), ISA_TYPE_UW, EALIGN_GRF, "XVals");
23227-
23228-
m_currShader->GetSimdOffsetBase(XVals);
23229-
23230-
// xidx = xvals + simdsize * xcnt
23231-
CVariable* Tmp = m_currShader->GetNewVariable(XCnt);
23232-
CVariable* ShiftAmt = m_currShader->ImmToVariable(
23233-
llvm::countTrailingZeros(lanes), ISA_TYPE_UW);
23234-
m_encoder->Shl(Tmp, XCnt, ShiftAmt);
23235-
m_encoder->Add(m_destination, XVals, Tmp);
23236-
m_encoder->Push();
23237-
}
23238-
else
23239-
{
23240-
uint32_t Cnt = lanes / 8;
23241-
IGC_ASSERT_MESSAGE(Cnt <= 2, "unhandled simd size!");
23242-
uint32_t Vector = 0;
23243-
23244-
// xidx = range(XDim) repeated over simdsize
23245-
// for example (4x4 in simd8):
23246-
// xidx = mov 0x32103210:v
23247-
for (uint32_t j = 0; j < 8; j++)
23248-
Vector |= (j & (XDim - 1)) << (j * 4);
23249-
23250-
for (uint32_t i = 0; i < Cnt; i++)
23251-
{
23252-
m_encoder->SetSimdSize(SIMDMode::SIMD8);
23253-
m_encoder->SetDstSubReg(i * 8);
23254-
m_encoder->SetMask((i == 0) ? EMASK_Q1 : EMASK_Q2);
23255-
m_encoder->Cast(m_destination, m_currShader->ImmToVariable(Vector, ISA_TYPE_V));
23256-
m_encoder->Push();
23257-
}
23258-
}
23259-
}
23260-
23261-
void EmitPass::emitTileYOffset(TileYIntrinsic* I)
23262-
{
23263-
const uint32_t XDim = I->getTileXDim();
23264-
IGC_ASSERT(iSTD::IsPowerOfTwo(XDim));
23265-
23266-
const uint32_t lanes = numLanes(m_currShader->m_SIMDSize);
23267-
23268-
CVariable* TID = GetSymbol(I->getTID());
23269-
if (!TID->IsUniform())
23270-
TID = UniformCopy(TID);
23271-
23272-
if (XDim >= lanes)
23273-
{
23274-
// yidx = tid / ratio
23275-
uint32_t Ratio = XDim / lanes;
23276-
CVariable* ShiftAmt = m_currShader->ImmToVariable(
23277-
llvm::countTrailingZeros(Ratio), ISA_TYPE_UW);
23278-
m_encoder->Shr(m_destination, TID, ShiftAmt);
23279-
m_encoder->Push();
23280-
}
23281-
else
23282-
{
23283-
uint32_t Cnt = lanes / 8;
23284-
IGC_ASSERT_MESSAGE(Cnt <= 2, "unhandled simd size!");
23285-
23286-
CVariable* YVals = m_currShader->GetNewVariable(
23287-
numLanes(m_currShader->m_SIMDSize), ISA_TYPE_UW, EALIGN_GRF, "YVals");
23288-
23289-
for (uint32_t i = 0; i < Cnt; i++)
23290-
{
23291-
uint32_t Vector = 0;
23292-
// for example (4x4 in simd8):
23293-
// yvals = mov 0x11110000
23294-
// for example (4x4 in simd16):
23295-
// yvals_lo = mov 0x11110000
23296-
// yvals_hi = mov 0x33332222
23297-
for (uint32_t j = 0; j < 8; j++)
23298-
Vector |= ((j + i*8) / XDim) << (j * 4);
23299-
23300-
m_encoder->SetSimdSize(SIMDMode::SIMD8);
23301-
m_encoder->SetDstSubReg(i * 8);
23302-
m_encoder->SetMask((i == 0) ? EMASK_Q1 : EMASK_Q2);
23303-
m_encoder->Cast(YVals, m_currShader->ImmToVariable(Vector, ISA_TYPE_V));
23304-
m_encoder->Push();
23305-
}
23306-
23307-
uint32_t Ratio = lanes / XDim;
23308-
// yidx = yvals + tid * ratio
23309-
CVariable* Tmp = m_currShader->GetNewVariable(TID);
23310-
CVariable* ShiftAmt = m_currShader->ImmToVariable(
23311-
llvm::countTrailingZeros(Ratio), ISA_TYPE_UW);
23312-
m_encoder->Shl(Tmp, TID, ShiftAmt);
23313-
m_encoder->Add(m_destination, YVals, Tmp);
23314-
m_encoder->Push();
23315-
}
23316-
}
23317-
2331823198
void EmitPass::emitTraceRay(TraceRayIntrinsic* I, bool RayQueryEnable)
2331923199
{
2332023200

‎IGC/Compiler/CISACodeGen/EmitVISAPass.hpp

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -529,8 +529,6 @@ class EmitPass : public llvm::FunctionPass
529529
void emitGlobalBufferPtr(llvm::GenIntrinsicInst *I);
530530
void emitLocalBufferPtr(llvm::GenIntrinsicInst *I);
531531
void emitInlinedDataValue(llvm::GenIntrinsicInst *I);
532-
void emitTileXOffset(llvm::TileXIntrinsic *I);
533-
void emitTileYOffset(llvm::TileYIntrinsic *I);
534532
void emitDpas(llvm::GenIntrinsicInst *GII,
535533
const SSource* source,
536534
const DstModifier& modifier);

‎IGC/Compiler/CISACodeGen/WIAnalysis.cpp

Lines changed: 0 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1567,7 +1567,6 @@ WIAnalysis::WIDependancy WIAnalysisRunner::calculate_dep(const CallInst* inst)
15671567
GII_id == GenISAIntrinsic::GenISA_GlobalBufferPointer ||
15681568
GII_id == GenISAIntrinsic::GenISA_LocalBufferPointer ||
15691569
GII_id == GenISAIntrinsic::GenISA_InlinedData ||
1570-
GII_id == GenISAIntrinsic::GenISA_TileYOffset ||
15711570
GII_id == GenISAIntrinsic::GenISA_GetShaderRecordPtr ||
15721571
GII_id == GenISAIntrinsic::GenISA_URBWrite ||
15731572
GII_id == GenISAIntrinsic::GenISA_URBRead ||
@@ -1675,12 +1674,6 @@ WIAnalysis::WIDependancy WIAnalysisRunner::calculate_dep(const CallInst* inst)
16751674
}
16761675
}
16771676

1678-
if (GII_id == GenISAIntrinsic::GenISA_TileYOffset)
1679-
{
1680-
{
1681-
return WIAnalysis::RANDOM;
1682-
}
1683-
}
16841677

16851678
if (intrinsic_name == llvm_sgv)
16861679
{

‎IGC/GenISAIntrinsics/GenIntrinsicInst.h

Lines changed: 0 additions & 35 deletions
Original file line numberDiff line numberDiff line change
@@ -1528,41 +1528,6 @@ class InlineDataIntrinsic : public GenIntrinsicInst {
15281528
}
15291529
};
15301530

1531-
// Common methods for X and Y components
1532-
class TileIntrinsic : public GenIntrinsicInst {
1533-
public:
1534-
Value* getTID() const { return getOperand(0); }
1535-
uint32_t getTileXDim() const {
1536-
return (uint32_t)cast<ConstantInt>(getOperand(1))->getZExtValue();
1537-
}
1538-
};
1539-
1540-
class TileXIntrinsic : public TileIntrinsic {
1541-
public:
1542-
// Methods for support type inquiry through isa, cast, and dyn_cast:
1543-
static inline bool classof(const GenIntrinsicInst* I) {
1544-
GenISAIntrinsic::ID ID = I->getIntrinsicID();
1545-
return ID == GenISAIntrinsic::GenISA_TileXOffset;
1546-
}
1547-
1548-
static inline bool classof(const Value* V) {
1549-
return isa<GenIntrinsicInst>(V) && classof(cast<GenIntrinsicInst>(V));
1550-
}
1551-
};
1552-
1553-
class TileYIntrinsic : public TileIntrinsic {
1554-
public:
1555-
// Methods for support type inquiry through isa, cast, and dyn_cast:
1556-
static inline bool classof(const GenIntrinsicInst* I) {
1557-
GenISAIntrinsic::ID ID = I->getIntrinsicID();
1558-
return ID == GenISAIntrinsic::GenISA_TileYOffset;
1559-
}
1560-
1561-
static inline bool classof(const Value* V) {
1562-
return isa<GenIntrinsicInst>(V) && classof(cast<GenIntrinsicInst>(V));
1563-
}
1564-
};
1565-
15661531
class SWStackPtrIntrinsic : public GenIntrinsicInst {
15671532
public:
15681533
// Methods for support type inquiry through isa, cast, and dyn_cast:

‎IGC/GenISAIntrinsics/Intrinsic_definitions.py

Lines changed: 0 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -3245,18 +3245,6 @@
32453245
("anyptr", "User defined intersection attributes struct")],
32463246
"None"]],
32473247
####################################################################################################
3248-
"GenISA_TileXOffset": ["Raytracing: returns the X-offset within a raytracing tile",
3249-
[("short", "The offset"),
3250-
[("short", "TID (r0.4:uw & 0xff)"),
3251-
("short", "X Dimension Size (Tile)")],
3252-
"NoMem"]],
3253-
####################################################################################################
3254-
"GenISA_TileYOffset": ["Raytracing: returns the Y-offset within a raytracing tile",
3255-
[("short", "The offset"),
3256-
[("short", "TID (r0.4:uw & 0xff)"),
3257-
("short", "X Dimension Size (Tile)")],
3258-
"NoMem"]],
3259-
####################################################################################################
32603248
"GenISA_SpillValue": ["Raytracing: Spill a value onto the stack",
32613249
[("void", ""),
32623250
[("anyint", ""),

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