@@ -63,6 +63,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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#include " Version.hpp"
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#include " Compiler/CISACodeGen/messageEncoding.hpp"
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+ #include " Compiler/CISACodeGen/EmitVISAPass.hpp"
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#include " Compiler/DebugInfo/ScalarVISAModule.h"
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#include " Probe/Assertion.h"
@@ -2505,25 +2506,29 @@ IGC::DIEBlock* CompileUnit::buildGeneral(DbgVariable& var, std::vector<VISAVaria
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auto storageMD = var.getDbgInst ()->getMetadata (" StorageOffset" );
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auto VISAMod = const_cast <VISAModule*>(loc->GetVISAModule ());
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VISAVariableLocation V (VISAMod);
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- if (storageMD && (EmitSettings.EmitOffsetInDbgLoc || EmitSettings.UseOffsetInLocation ))
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+ ScalarVisaModule* scVISAMod = (ScalarVisaModule*)VISAMod;
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+ IGC_ASSERT_MESSAGE (scVISAMod, " ScalarVisaModule error" );
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+
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+ Instruction* perThreadOffsetInst = scVISAMod->getPerThreadOffset ();
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+
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+ if (storageMD && (EmitSettings.EmitOffsetInDbgLoc || EmitSettings.UseOffsetInLocation ) && perThreadOffsetInst)
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{
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- // This is executed only when llvm.dbg.declare still exists.
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+ // This is executed only when llvm.dbg.declare still exists and no stack call is supported .
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// With mem2reg run, data is stored in GRFs and this wont be
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// executed.
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- Instruction* perThreadOffsetInst = VISAMod->getPerThreadOffset ();
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- ScalarVisaModule* scVMod = (ScalarVisaModule*)VISAMod;
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- IGC_ASSERT_MESSAGE (scVMod, " ScalarVisaModule error" );
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+
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+ IGC_ASSERT_MESSAGE (perThreadOffsetInst, " perThreadOffsetInst not passed" );
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Value* pValPTO = dyn_cast_or_null<Value>(perThreadOffsetInst);
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IGC_ASSERT_MESSAGE (pValPTO, " pValPTO error" );
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// At this point we expect only a register
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- CVariable* pVarPTO = scVMod ->GetSymbol (perThreadOffsetInst, pValPTO);
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+ CVariable* pVarPTO = scVISAMod ->GetSymbol (perThreadOffsetInst, pValPTO);
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IGC_ASSERT_MESSAGE (pVarPTO, " Per Thread Offset variable does not exist" );
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IGC_ASSERT_MESSAGE (pVarPTO->GetVarType () == EVARTYPE_GENERAL, " Unexpected VISA register type!" );
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- int regPTO = scVMod ->getDeclarationID (pVarPTO, false );
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+ int regPTO = scVISAMod ->getDeclarationID (pVarPTO, false );
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auto privateBaseRegNum = loc->GetVISAModule ()->getPrivateBaseReg ();
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if (privateBaseRegNum) // FIX ME if 0 is allowed
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{
@@ -2583,11 +2588,11 @@ IGC::DIEBlock* CompileUnit::buildGeneral(DbgVariable& var, std::vector<VISAVaria
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DbgDecoder::VarInfo varInfoPerThOff;
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// Rely on getVarInfo result here.
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- auto regNumPerThOff = regPTO; // loc->GetRegister();
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+ auto regNumPerThOff = regPTO;
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VISAMod->getVarInfo (" V" , regNumPerThOff, varInfoPerThOff);
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IGC_ASSERT_MESSAGE (varInfoPerThOff.lrs .front ().isGRF () || varInfoPerThOff.lrs .front ().isSpill (),
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- " Unexpected location of variable" );
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+ " Unexpected location of variable" );
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if (varInfoPerThOff.lrs .front ().isGRF ())
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{
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uint16_t grfRegNumPTO = varInfoPerThOff.lrs .front ().getGRF ().regNum ;
@@ -2636,6 +2641,66 @@ IGC::DIEBlock* CompileUnit::buildGeneral(DbgVariable& var, std::vector<VISAVaria
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}
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}
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+ auto sizeMD = var.getDbgInst ()->getMetadata (" StorageSize" );
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+ if (storageMD && (EmitSettings.EmitOffsetInDbgLoc || EmitSettings.UseOffsetInLocation ) && sizeMD)
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+ {
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+ emitLocation = true ;
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+ auto simdSize = VISAMod->GetSIMDSize ();
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+ uint64_t storageOffset = simdSize * dyn_cast<ConstantAsMetadata>(storageMD->getOperand (0 ))->getValue ()->getUniqueInteger ().getSExtValue ();
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+ uint64_t storageSize = dyn_cast<ConstantAsMetadata>(sizeMD->getOperand (0 ))->getValue ()->getUniqueInteger ().getSExtValue ();
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+ // There is a private value in the current stack frame
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+ // 1 DW_OP_constu <Frame Pointer reg encoded>
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+ // 2 DW_OP_INTEL_regs , i.e. Frame Pointer
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+ // 3 DW_OP_const1u <bit-offset to Frame Pointer reg>
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+ // 4 DW_OP_const1u 64 , i.e. size in bits
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+ // 5 DW_OP_INTEL_push_bit_piece_stack
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+ // 6 DW_OP_const1u SIZE_OWORD // i.e. 0x10 taken from getFPOffset(); same as emitted in EmitPass::emitStackAlloca()
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+ // 7 DW_OP_plus
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+ // 8 DW_OP_push_simd_lane
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+ // 9 DW_OP_const1u/2u/4u/8u storageSize // MD: StorageSize; the size of the variable
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+ // 10 DW_OP_mul
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+ // 11 DW_OP_plus
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+ // 12 DW_OP_const1u/2u/4u/8u storageOffset // MD: StorageOffset; the offset where each variable is stored in the current stack frame
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+ // 13 DW_OP_plus
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+
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+ CVariable *framePtr = VISAMod->getFramePtr ();
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+ ScalarVisaModule* scVISAMod = (ScalarVisaModule*)VISAMod;
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+ int regFP = scVISAMod->getDeclarationID (framePtr, false );
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+ DbgDecoder::VarInfo varInfoFP;
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+ // Rely on getVarInfo result here.
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+ auto regNumFP = regFP;
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+ VISAMod->getVarInfo (" V" , regNumFP, varInfoFP);
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+ uint16_t grfRegNumFP = varInfoFP.lrs .front ().getGRF ().regNum ;
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+ uint16_t grfSubRegNumFP = varInfoFP.lrs .front ().getGRF ().subRegNum ;
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+ auto bitOffsetToFPReg = grfSubRegNumFP * 8 ; // Bit-offset to GRF with Frame Pointer
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+ auto DWRegFPEncoded = GetEncodedRegNum<RegisterNumbering::GRFBase>(
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+ grfRegNumFP, EmitSettings.UseNewRegisterEncoding );
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+
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+ addUInt (Block, dwarf::DW_FORM_data1, dwarf::DW_OP_constu); // 1 DW_OP_constu <Frame Pointer reg encoded>
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+ addUInt (Block, dwarf::DW_FORM_udata, DWRegFPEncoded); // Register ID is shifted by offset
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+ addUInt (Block, dwarf::DW_FORM_data1, DW_OP_INTEL_regs); // 2 DW_OP_INTEL_regs , i.e. Frame Pointer
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+ addUInt (Block, dwarf::DW_FORM_data1, dwarf::DW_OP_const1u); // 3 DW_OP_const1u <bit-offset to Frame Pointer reg>
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+ addUInt (Block, dwarf::DW_FORM_data1, bitOffsetToFPReg);
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+ addUInt (Block, dwarf::DW_FORM_data1, dwarf::DW_OP_const1u); // 4 DW_OP_const1u 64 , i.e. size in bits
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+ addUInt (Block, dwarf::DW_FORM_data1, 64 );
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+ addUInt (Block, dwarf::DW_FORM_data1, DW_OP_INTEL_push_bit_piece_stack); // 5 DW_OP_INTEL_push_bit_piece_stack
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+
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+ addUInt (Block, dwarf::DW_FORM_data1, dwarf::DW_OP_const1u); // 6 DW_OP_const1u SIZE_OWORD (taken from getFPOffset())
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+ addUInt (Block, dwarf::DW_FORM_data1, EmitPass::getFPOffset ());
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+ addUInt (Block, dwarf::DW_FORM_data1, dwarf::DW_OP_plus); // 7 DW_OP_plus
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+ addUInt (Block, dwarf::DW_FORM_data1, DW_OP_INTEL_push_simd_lane); // 8 DW_OP_INTEL_push_simd_lane
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+ addConstantUValue (Block, storageSize); // 9 DW_OP_const1u/2u/4u/8u storageSize
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+ addUInt (Block, dwarf::DW_FORM_data1, dwarf::DW_OP_mul); // 10 DW_OP_mul
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+ addUInt (Block, dwarf::DW_FORM_data1, dwarf::DW_OP_plus); // 11 DW_OP_plus
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+ addConstantUValue (Block, storageOffset); // 12 DW_OP_const1u/2u/4u/8u storageOffset
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+ addUInt (Block, dwarf::DW_FORM_data1, dwarf::DW_OP_plus); // 13 DW_OP_plus
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+
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+ // As long as for debugging there is no slicing of variables handled above,
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+ // 2nd run of this loop is not needed in SIMD32, because opcodes above describe
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+ // location for all 32 lanes.
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+ break ;
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+ }
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+
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if (EmitSettings.EnableSIMDLaneDebugging && isSliced)
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{
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// DW_OP_push_simd_lane
@@ -2668,6 +2733,7 @@ IGC::DIEBlock* CompileUnit::buildGeneral(DbgVariable& var, std::vector<VISAVaria
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cast<DIEInteger>(secondHalfOff)->setValue (offsetTaken - offsetNotTaken);
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}
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}
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+
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DbgDecoder::VarInfo varInfo;
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if (!vars)
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{
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