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Commit b1856f9

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dlei6gsys_zuul
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Remove Instruction Combining after Memory Opt. MemOpt may combine load/store instructions, while running InstCombine without IR lowering will change the alignment based on the new load/store value types.
Change-Id: Ica8c5ec58bf2c6f47c2b53513d12e1f1e4c21254
1 parent ba06835 commit b1856f9

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IGC/Compiler/CISACodeGen/ShaderCodeGen.cpp

Lines changed: 3 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -474,12 +474,11 @@ namespace IGC
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mpm.add(CreatePrivateMemoryResolution());
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// Run MemOpt
477-
if (!isOptDisabled &&
478-
ctx.m_instrTypes.hasLoadStore && IGC_IS_FLAG_DISABLED(DisableMemOpt)) {
477+
bool doMemOpt = ctx.m_instrTypes.hasLoadStore && IGC_IS_FLAG_DISABLED(DisableMemOpt);
478+
if (!isOptDisabled && doMemOpt) {
479479
if (IGC_IS_FLAG_ENABLED(EnableAdvMemOpt))
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mpm.add(createAdvMemOptPass());
481481
mpm.add(createMemOptPass());
482-
mpm.add(createIGCInstructionCombiningPass());
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}
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485484
if (ctx.type == ShaderType::OPENCL_SHADER &&
@@ -530,7 +529,7 @@ namespace IGC
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if (!isOptDisabled)
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{
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// Optimize lower-level IR
533-
if (!fastCompile)
532+
if (!fastCompile || doMemOpt)
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{
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mpm.add(createIGCInstructionCombiningPass());
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}

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