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fangliu2020igcbot
fangliu2020
authored and
igcbot
committed
Rename Xe_HP/XeHP to XeHP_SDV
Rename Xe_HP/XeHP to XeHP_SDV
1 parent 4fd8311 commit b78f29a

22 files changed

+81
-81
lines changed

‎IGC/Compiler/CISACodeGen/CISABuilder.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3001,7 +3001,7 @@ namespace IGC
30013001
}
30023002
else if (platform->getPlatformInfo().eProductFamily == IGFX_XE_HP_SDV)
30033003
{
3004-
return XE_HP;
3004+
return XeHP_SDV;
30053005
}
30063006
// fall-through
30073007
default:
@@ -4288,7 +4288,7 @@ namespace IGC
42884288
SaveOption(vISA_EnableGroupScheduleForBC, true);
42894289
}
42904290

4291-
if (VISAPlatform == XE_HP && IGC_IS_FLAG_ENABLED(DPASTokenReduction))
4291+
if (VISAPlatform == XeHP_SDV && IGC_IS_FLAG_ENABLED(DPASTokenReduction))
42924292
{
42934293
SaveOption(vISA_EnableDPASTokenReduction, true);
42944294
}

‎IGC/VectorCompiler/lib/GenXCodeGen/GenXSubtarget.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -318,7 +318,7 @@ class GenXSubtarget final : public GenXGenSubtargetInfo {
318318
case GENX_DG1:
319319
return TARGET_PLATFORM::GENX_TGLLP;
320320
case XE_HP_SDV:
321-
return TARGET_PLATFORM::XE_HP;
321+
return TARGET_PLATFORM::XeHP_SDV;
322322
case GENX_KBL:
323323
return TARGET_PLATFORM::GENX_SKL;
324324
case GENX_GLK:

‎visa/AccSubstitution.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -864,7 +864,7 @@ void AccSubPass::multiAccSub(G4_BB* bb)
864864

865865
std::map<G4_INST*, unsigned int> BCInfo;
866866

867-
if (builder.getPlatform() == XE_HP)
867+
if (builder.getPlatform() == XeHP_SDV)
868868
{
869869
int suppressRegs[4];
870870
for (int i = 0; i < 3; i++)

‎visa/BinaryEncodingIGA.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -339,7 +339,7 @@ Platform BinaryEncodingIGA::getIGAInternalPlatform(TARGET_PLATFORM genxPlatform)
339339
case GENX_TGLLP:
340340
platform = Platform::XE;
341341
break;
342-
case XE_HP:
342+
case XeHP_SDV:
343343
platform = Platform::XE_HP;
344344
break;
345345
default:

‎visa/BuildCISAIRImpl.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -206,7 +206,7 @@ static const WA_TABLE *CreateVisaWaTable(TARGET_PLATFORM platform, Stepping step
206206
case GENX_TGLLP:
207207
VISA_WA_ENABLE(pWaTable, Wa_1406950495);
208208
break;
209-
case XE_HP:
209+
case XeHP_SDV:
210210
VISA_WA_ENABLE(pWaTable, Wa_1406950495);
211211
break;
212212
default:

‎visa/FC_linker/PatchInfoLinker.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -280,7 +280,7 @@ unsigned PatchInfoLinker::writeNOP(unsigned N) {
280280
uint64_t compact_nop = 0;
281281
switch (Platform) {
282282
case cm::patch::PP_TGL:
283-
case cm::patch::PP_XE_HP:
283+
case cm::patch::PP_XeHP_SDV:
284284
regular_nop = 0x00000060U;
285285
compact_nop = 0x20000060U;
286286
break;
@@ -313,7 +313,7 @@ unsigned PatchInfoLinker::writeEOT() {
313313
uint64_t r127_sync1 = 0;
314314
switch (Platform) {
315315
case cm::patch::PP_TGL:
316-
case cm::patch::PP_XE_HP:
316+
case cm::patch::PP_XeHP_SDV:
317317
{
318318
if (hasR127Token)
319319
{

‎visa/G4Instruction.h

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -57,7 +57,7 @@ HANDLE_INST(bfi2, 3, 1, InstTypeLogic, GENX_BDW, ATTR_NONE)
5757
HANDLE_INST(fbh, 1, 1, InstTypeLogic, GENX_BDW, ATTR_NONE)
5858
HANDLE_INST(fbl, 1, 1, InstTypeLogic, GENX_BDW, ATTR_NONE)
5959
HANDLE_INST(cbit, 1, 1, InstTypeLogic, GENX_BDW, ATTR_NONE)
60-
HANDLE_INST(bfn, 3, 1, InstTypeLogic, XE_HP, ATTR_NONE)
60+
HANDLE_INST(bfn, 3, 1, InstTypeLogic, XeHP_SDV, ATTR_NONE)
6161

6262
//
6363
// InstTypeArith
@@ -85,9 +85,9 @@ HANDLE_INST(addc, 2, 1, InstTypeArith, GENX_BDW, ATTR_NONE)
8585
HANDLE_INST(subb, 2, 1, InstTypeArith, GENX_BDW, ATTR_NONE)
8686

8787
HANDLE_INST(dp4a, 3, 1, InstTypeArith, GENX_TGLLP, ATTR_NONE)
88-
HANDLE_INST(dpas, 3, 1, InstTypeArith, XE_HP, ATTR_NONE)
89-
HANDLE_INST(dpasw, 3, 1, InstTypeArith, XE_HP, ATTR_NONE)
90-
HANDLE_INST(add3, 3, 1, InstTypeArith, XE_HP, ATTR_NONE)
88+
HANDLE_INST(dpas, 3, 1, InstTypeArith, XeHP_SDV, ATTR_NONE)
89+
HANDLE_INST(dpasw, 3, 1, InstTypeArith, XeHP_SDV, ATTR_NONE)
90+
HANDLE_INST(add3, 3, 1, InstTypeArith, XeHP_SDV, ATTR_NONE)
9191

9292

9393
HANDLE_INST(madm, 3, 1, InstTypeArith, GENX_BDW, ATTR_NONE)

‎visa/G4_IR.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -7848,7 +7848,7 @@ bool G4_INST::canSrcBeAcc(Gen4_Operand_Number opndNum) const
78487848
// dst must be GRF-aligned
78497849
if ((getDst()->getLinearizedStart() % numEltPerGRF<Type_UB>()) != 0)
78507850
{
7851-
if (!(isMixedMode() && builder.getPlatform() == XE_HP))
7851+
if (!(isMixedMode() && builder.getPlatform() == XeHP_SDV))
78527852
return false;
78537853
}
78547854

‎visa/G4_Kernel.cpp

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -668,7 +668,7 @@ static iga_gen_t getIGAPlatform()
668668
case GENX_BXT: platform = IGA_GEN9lp; break;
669669
case GENX_ICLLP: platform = IGA_GEN11; break;
670670
case GENX_TGLLP:platform = IGA_GEN12p1; break;
671-
case XE_HP: platform = IGA_XE_HP; break;
671+
case XeHP_SDV: platform = IGA_XE_HP; break;
672672
default:
673673
break;
674674
}
@@ -853,7 +853,7 @@ void G4_Kernel::setKernelParameters()
853853
{
854854
switch (platform)
855855
{
856-
case XE_HP:
856+
case XeHP_SDV:
857857
switch (overrideNumThreads)
858858
{
859859
case 4:
@@ -907,7 +907,7 @@ void G4_Kernel::setKernelParameters()
907907
{
908908
switch (platform)
909909
{
910-
case XE_HP:
910+
case XeHP_SDV:
911911
switch (overrideNumThreads)
912912
{
913913
case 4:
@@ -926,7 +926,7 @@ void G4_Kernel::setKernelParameters()
926926
// Default value based on platform
927927
switch (platform)
928928
{
929-
case XE_HP:
929+
case XeHP_SDV:
930930
numAcc = 4;
931931
if (numRegTotal == 256)
932932
{
@@ -949,7 +949,7 @@ void G4_Kernel::setKernelParameters()
949949
{
950950
switch (platform)
951951
{
952-
case XE_HP:
952+
case XeHP_SDV:
953953
switch (numRegTotal)
954954
{
955955
case 256:

‎visa/HWCaps.inc

Lines changed: 31 additions & 31 deletions
Original file line numberDiff line numberDiff line change
@@ -441,7 +441,7 @@ SPDX-License-Identifier: MIT
441441

442442
bool needIPWA() const
443443
{
444-
return getPlatform() == XE_HP;
444+
return getPlatform() == XeHP_SDV;
445445
}
446446

447447
bool canEncodeFullExtDesc() const
@@ -501,7 +501,7 @@ SPDX-License-Identifier: MIT
501501

502502
bool oneGRFBankDivision() const
503503
{
504-
return getPlatform() != XE_HP;
504+
return getPlatform() != XeHP_SDV;
505505
}
506506

507507
bool hasMadm() const
@@ -511,7 +511,7 @@ SPDX-License-Identifier: MIT
511511

512512
bool hasSIMD16TypedRW() const
513513
{
514-
return getPlatform() >= XE_HP;
514+
return getPlatform() >= XeHP_SDV;
515515
}
516516

517517
bool hasRegDistDepIssue() const
@@ -521,7 +521,7 @@ SPDX-License-Identifier: MIT
521521

522522
bool doNotRewriteContiguousRegion() const
523523
{
524-
return getPlatform() >= XE_HP;
524+
return getPlatform() >= XeHP_SDV;
525525
}
526526

527527
// acc restrictions that are relaxed for Xe HP
@@ -530,7 +530,7 @@ SPDX-License-Identifier: MIT
530530
// -- acc can be packed HF dst of a mix mode inst
531531
bool relaxedACCRestrictions() const
532532
{
533-
return getPlatform() >= XE_HP;
533+
return getPlatform() >= XeHP_SDV;
534534
}
535535

536536
bool relaxedACCRestrictions_1() const
@@ -540,22 +540,22 @@ SPDX-License-Identifier: MIT
540540

541541
bool loadThreadPayload() const
542542
{
543-
return getPlatform() >= XE_HP;
543+
return getPlatform() >= XeHP_SDV;
544544
}
545545

546546
bool needFenceBeforeEOT() const
547547
{
548-
return getPlatform() == XE_HP;
548+
return getPlatform() == XeHP_SDV;
549549
}
550550

551551
bool hasSrc0ReadSuppression() const
552552
{
553-
return getPlatform() >= XE_HP && hasRSForSpecificPlatform();
553+
return getPlatform() >= XeHP_SDV && hasRSForSpecificPlatform();
554554
}
555555

556556
bool needToClearScratchWrites() const
557557
{
558-
return getPlatform() < XE_HP;
558+
return getPlatform() < XeHP_SDV;
559559
}
560560

561561
bool needsToLoadLocalID() const
@@ -565,43 +565,43 @@ SPDX-License-Identifier: MIT
565565

566566
bool noDwDstForDwordMul() const
567567
{
568-
return noInt64() || getPlatform() >= XE_HP;
568+
return noInt64() || getPlatform() >= XeHP_SDV;
569569
}
570570

571571
bool useNewExtDescFormat() const
572572
{
573-
return getPlatform() >= XE_HP;
573+
return getPlatform() >= XeHP_SDV;
574574
}
575575

576576
bool has16OWordSLMBlockRW() const
577577
{
578-
return getPlatform() >= XE_HP;
578+
return getPlatform() >= XeHP_SDV;
579579
}
580580

581581
bool hasVxHFloat64b() const
582582
{
583-
return getPlatform() < XE_HP;
583+
return getPlatform() < XeHP_SDV;
584584
}
585585

586586
bool supportFloatOr64bRegioning() const
587587
{
588-
return getPlatform() < XE_HP && !getOption(vISA_forceNoFP64bRegioning);
588+
return getPlatform() < XeHP_SDV && !getOption(vISA_forceNoFP64bRegioning);
589589
}
590590

591591
int getFP64MadmExecSize() const
592592
{
593593
auto plat = getPlatform();
594-
return (plat == XE_HP) ? 8 : 4;
594+
return (plat == XeHP_SDV) ? 8 : 4;
595595
}
596596

597597
bool balanceIntFloatMoves() const
598598
{
599-
return getPlatform() >= XE_HP;
599+
return getPlatform() >= XeHP_SDV;
600600
}
601601

602602
G4_Type getMixModeType() const
603603
{
604-
return getPlatform() >= XE_HP ? Type_BF : Type_HF;
604+
return getPlatform() >= XeHP_SDV ? Type_BF : Type_HF;
605605
}
606606

607607
// each flag register is 16-bit
@@ -628,17 +628,17 @@ SPDX-License-Identifier: MIT
628628

629629
bool noScalarByteToFloat() const
630630
{
631-
return getPlatform() >= XE_HP;
631+
return getPlatform() >= XeHP_SDV;
632632
}
633633

634634
bool useAccForDF() const
635635
{
636-
return getPlatform() >= XE_HP;
636+
return getPlatform() >= XeHP_SDV;
637637
}
638638

639639
bool useAccForMadm() const
640640
{
641-
return getPlatform() >= XE_HP;
641+
return getPlatform() >= XeHP_SDV;
642642
}
643643

644644
bool hasUnifiedBarrier() const
@@ -719,7 +719,7 @@ SPDX-License-Identifier: MIT
719719

720720
int get3SrcDstAlign() const
721721
{
722-
return getPlatform() >= XE_HP ? 2 : 8;
722+
return getPlatform() >= XeHP_SDV ? 2 : 8;
723723
}
724724

725725
bool supportCallaRegSrc() const
@@ -730,17 +730,17 @@ SPDX-License-Identifier: MIT
730730

731731
bool hasTwoGRFBank16Bundles() const
732732
{
733-
return getPlatform() == XE_HP;
733+
return getPlatform() == XeHP_SDV;
734734
}
735735

736736
bool hasOneGRFBank16Bundles() const
737737
{
738-
return getPlatform() != XE_HP;
738+
return getPlatform() != XeHP_SDV;
739739
}
740740

741741
bool hasDPASSrc0Src1BankConflict() const
742742
{
743-
return getPlatform() >= XE_HP;
743+
return getPlatform() >= XeHP_SDV;
744744
}
745745

746746
bool needsToLoadCrossThreadConstantData() const
@@ -750,12 +750,12 @@ SPDX-License-Identifier: MIT
750750

751751
bool hasDPAS() const
752752
{
753-
return getPlatform() >= XE_HP;
753+
return getPlatform() >= XeHP_SDV;
754754
}
755755

756756
bool hasAMFSFastClear() const
757757
{
758-
return getPlatform() >= XE_HP;
758+
return getPlatform() >= XeHP_SDV;
759759
}
760760

761761
// only valid type combinations during format mov conversion if acc is used:
@@ -765,18 +765,18 @@ SPDX-License-Identifier: MIT
765765
// Src Type DF - Dst Type DF
766766
bool hasFormatConversionACCRestrictions() const
767767
{
768-
return getPlatform() >= XE_HP;
768+
return getPlatform() >= XeHP_SDV;
769769
}
770770

771771
bool hasScratchSurface() const
772772
{
773-
return getPlatform() >= XE_HP;
773+
return getPlatform() >= XeHP_SDV;
774774
}
775775

776776
// Note that this function is intentionally omitted from HWCapsOpen.inc to avoid IP leak
777777
bool hasThreeALUPipes() const
778778
{
779-
return (getPlatform() == XE_HP);
779+
return (getPlatform() == XeHP_SDV);
780780
}
781781

782782
bool hasFusedEUWA() const
@@ -787,7 +787,7 @@ SPDX-License-Identifier: MIT
787787

788788
bool hasFusedEU() const
789789
{
790-
return (getPlatform() == GENX_TGLLP || getPlatform() == XE_HP);
790+
return (getPlatform() == GENX_TGLLP || getPlatform() == XeHP_SDV);
791791
}
792792

793793
bool hasFourALUPipes() const
@@ -835,7 +835,7 @@ SPDX-License-Identifier: MIT
835835
}
836836
bool hasA0WARHWissue()
837837
{
838-
return (getPlatform() == XE_HP);
838+
return (getPlatform() == XeHP_SDV);
839839
}
840840

841841
bool hasFtoPackedHFMove() const

‎visa/HWConformity.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -5585,7 +5585,7 @@ void HWConformity::conformBB(G4_BB* bb)
55855585
// pre-compute nextIter as the call may destroy iter
55865586
auto nextIter = std::next(iter);
55875587
// since insertMovBefore/After and similar helper instructions do not
5588-
// understand Xe_HP regioning restrictions, they may produce illegal moves
5588+
// understand XeHP_SDV regioning restrictions, they may produce illegal moves
55895589
// We do a catch call pass here to catch them
55905590
fixUnalignedRegions(iter, bb);
55915591
iter = nextIter;
@@ -7542,7 +7542,7 @@ void HWConformity::change64bStride2CopyToUD(INST_LIST_ITER it, G4_BB* bb)
75427542
bb->insertBefore(it, movInst);
75437543
}
75447544

7545-
// on Xe_HP we have to make sure each source element is alignd to each dst element
7545+
// on XeHP_SDV we have to make sure each source element is alignd to each dst element
75467546
// for all float/64b inst (packed HF is ok in mixed mode inst)
75477547
// For all violating instructions, we align each operand to the execution type
75487548
// for float copy moves we could directly convert their type to int

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