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jgu222igcbot
jgu222
authored and
igcbot
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Rename bf16 to bf and others
Rename bf16 to bf. Also, fix some other minor issues.
1 parent 7ff29b6 commit b98b6b6

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9 files changed

+66
-35
lines changed

9 files changed

+66
-35
lines changed

‎visa/CISA.l

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -762,7 +762,7 @@ AVS_(4|8|16)x(4|8) {
762762

763763

764764

765-
type[ ]*=[ ]*(ud|d|uw|w|ub|b|df|f|bool|uq|q|UD|D|UW|W|UB|B|DF|F|Bool|BOOL|UQ|Q|hf|HF) {
765+
type[ ]*=[ ]*(ud|d|uw|w|ub|b|df|f|bool|uq|q|UD|D|UW|W|UB|B|DF|F|Bool|BOOL|UQ|Q|hf|HF|bf|BF) {
766766
TRACE("** TYPE");
767767
CISAlval.type = str2type(yytext, yyleng);
768768
return DECL_DATA_TYPE;

‎visa/Common_ISA.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -375,7 +375,7 @@ CISATypeInfo CISATypeTable[ISA_TYPE_NUM] =
375375
{ ISA_TYPE_UV, "uv", 4 },
376376
{ ISA_TYPE_Q, "q", 8 },
377377
{ ISA_TYPE_HF, "hf", 2 },
378-
{ ISA_TYPE_BF16, "bf16", 2 }
378+
{ ISA_TYPE_BF, "bf", 2 }
379379
};
380380

381381
int processCommonISAHeader(

‎visa/Common_ISA_util.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -340,7 +340,7 @@ G4_Type GetGenTypeFromVISAType(VISA_Type type)
340340
return Type_UQ;
341341
case ISA_TYPE_HF:
342342
return Type_HF;
343-
case ISA_TYPE_BF16:
343+
case ISA_TYPE_BF:
344344
return Type_BF;
345345
default:
346346
return Type_UNDEF;
@@ -382,7 +382,7 @@ VISA_Type Get_Common_ISA_Type_From_G4_Type(G4_Type type)
382382
case Type_HF:
383383
return ISA_TYPE_HF;
384384
case Type_BF:
385-
return ISA_TYPE_BF16;
385+
return ISA_TYPE_BF;
386386
default:
387387
return ISA_TYPE_NUM;
388388
}

‎visa/G4_IR.cpp

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -440,7 +440,11 @@ G4_Type G4_INST::getExecType2() const
440440
continue;
441441
}
442442
G4_Type srcType = srcs[i]->getType();
443-
if (isLowPrecisionFloatTy(srcType) &&
443+
if (builder.hasBFMixMode() && srcType == Type_BF)
444+
{
445+
execType = Type_F;
446+
}
447+
else if (isLowPrecisionFloatTy(srcType) &&
444448
TypeSize(srcType) >= TypeSize(execType))
445449
{
446450
execType = srcType;

‎visa/G4_Verifier.cpp

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1295,6 +1295,7 @@ void G4Verifier::verifyBFMixedMode(G4_INST* inst)
12951295
break;
12961296
}
12971297
case G4_mad:
1298+
case G4_pseudo_mad:
12981299
{
12991300
// case 3
13001301
G4_Operand* src2 = inst->getSrc(2);

‎visa/HWConformity.cpp

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1682,6 +1682,13 @@ bool HWConformity::fixDstAlignment(INST_LIST_ITER i, G4_BB* bb, G4_Type extype,
16821682
return true;
16831683
}
16841684

1685+
if (builder.hasBFMixMode() && extype == Type_F && inst->getDst()->getType() == Type_BF && !inst->isDpas())
1686+
{
1687+
// For now, BF mixed mode should not need this check.
1688+
// If visa may allow any region as input under bf mixed mode, we need to change this.
1689+
return false;
1690+
}
1691+
16851692
bool dstHFMixModeInst = inst->getDst()->getType() == builder.getMixModeType() && extype == Type_F;
16861693
bool dstNotAlignedToExecType = exec_size > 1 && (dst_elsize * h_stride) < extypesize &&
16871694
!(builder.hasMixMode() && dstHFMixModeInst);

‎visa/IsaDescription.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@ SPDX-License-Identifier: MIT
1616
#define TYPE_INTEGER ISA_TYPE_UW|ISA_TYPE_W|ISA_TYPE_UB|ISA_TYPE_B|ISA_TYPE_D|ISA_TYPE_UD|ISA_TYPE_Q|ISA_TYPE_UQ
1717
#define TYPE_FLOAT ISA_TYPE_DF|ISA_TYPE_F
1818
#define TYPE_FLOAT_HF ISA_TYPE_DF|ISA_TYPE_F|ISA_TYPE_HF
19-
#define TYPE_FLOAT_ALL ISA_TYPE_DF|ISA_TYPE_F|ISA_TYPE_HF|ISA_TYPE_BF16
19+
#define TYPE_FLOAT_ALL ISA_TYPE_DF|ISA_TYPE_F|ISA_TYPE_HF|ISA_TYPE_BF
2020
#define TYPE_ANY TYPE_INTEGER | TYPE_FLOAT
2121

2222
#define SIZEOF_CISA_OPCODE sizeof(unsigned char)

‎visa/IsaVerification.cpp

Lines changed: 47 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -257,15 +257,22 @@ VISA_Type vISAVerifier::getOperandVISAType(const CISA_INST* I, unsigned Ix) cons
257257
bool vISAVerifier::useGivenVISAType(const CISA_INST* I, VISA_Type GivenType) const
258258
{
259259
ISA_Opcode opc = (ISA_Opcode)I->opcode;
260-
for (int j = 0; j < ISA_Inst_Table[opc].n_dsts; j++)
260+
int ndst = (int)ISA_Inst_Table[opc].n_dsts;
261+
if (opc == ISA_CMP)
262+
{
263+
// cmp's 1st opnd is cmp relop, which returns ISA_TYPE_NUM as its type.
264+
// Thus, it is ignored as expected.
265+
++ndst;
266+
}
267+
for (int j = 0; j < ndst; j++)
261268
{
262269
VISA_Type dstType = getOperandVISAType(I, j);
263270
if (dstType == GivenType)
264271
return true;
265272
}
266273
for (int j = 0; j < ISA_Inst_Table[opc].n_srcs; j++)
267274
{
268-
VISA_Type srcType = getOperandVISAType(I, j + ISA_Inst_Table[opc].n_dsts);
275+
VISA_Type srcType = getOperandVISAType(I, j + ndst);
269276
if (srcType == GivenType)
270277
return true;
271278
}
@@ -1492,7 +1499,7 @@ void vISAVerifier::verifyInstructionArith(
14921499
{
14931500
ISA_Opcode opcode = (ISA_Opcode)inst->opcode;
14941501

1495-
if (useGivenVISAType(inst, ISA_TYPE_BF16))
1502+
if (useGivenVISAType(inst, ISA_TYPE_BF))
14961503
{
14971504
// Let bfmode verifier to verify it.
14981505
return;
@@ -3019,7 +3026,7 @@ void vISAVerifier::verifyInstructionDataport(
30193026
//
30203027
void vISAVerifier::verifyBFMixedMode(const CISA_INST* inst)
30213028
{
3022-
if (!useGivenVISAType(inst, ISA_TYPE_BF16))
3029+
if (!useGivenVISAType(inst, ISA_TYPE_BF))
30233030
return;
30243031
if (!irBuilder->hasBFMixMode())
30253032
{
@@ -3034,28 +3041,29 @@ void vISAVerifier::verifyBFMixedMode(const CISA_INST* inst)
30343041
}
30353042

30363043
ISA_Opcode opcode = (ISA_Opcode)inst->opcode;
3044+
uint32_t ndst = ISA_Inst_Table[opcode].n_dsts;
30373045
switch (opcode)
30383046
{
30393047
case ISA_MUL:
30403048
{ // case 2
3041-
const unsigned src1ix = 1 + ISA_Inst_Table[opcode].n_dsts;
3049+
const unsigned src1ix = 1 + ndst;
30423050
VISA_Type src2Ty = getOperandVISAType(inst, src1ix);
30433051
REPORT_INSTRUCTION(options, src2Ty == ISA_TYPE_F, "Mul's src1 must be F in BF mixed mode");
30443052
break;
30453053
}
30463054
case ISA_MAD:
30473055
{ // case 3
3048-
const unsigned src2ix = 2 + ISA_Inst_Table[opcode].n_dsts;
3056+
const unsigned src2ix = 2 + ndst;
30493057
VISA_Type src2Ty = getOperandVISAType(inst, src2ix);
30503058
REPORT_INSTRUCTION(options, src2Ty == ISA_TYPE_F, "Mad's src2 must be F in BF mixed mode");
30513059
break;
30523060
}
30533061
case ISA_MOV:
30543062
{
30553063
// bf->f isn't a hardware inst, just left shift. Thus bf restriction does not apply.
3056-
const vector_opnd& src = getVectorOperand(inst, ISA_Inst_Table[opcode].n_dsts);
3064+
const vector_opnd& src = getVectorOperand(inst, ndst);
30573065
VISA_Type srcType = getVectorOperandType(header, src);
3058-
if (srcType == ISA_TYPE_BF16)
3066+
if (srcType == ISA_TYPE_BF)
30593067
{
30603068
return;
30613069
}
@@ -3064,8 +3072,13 @@ void vISAVerifier::verifyBFMixedMode(const CISA_INST* inst)
30643072
}
30653073
case ISA_ADD:
30663074
case ISA_SEL:
3075+
{
3076+
// case 1
3077+
break;
3078+
}
30673079
case ISA_CMP:
30683080
{ // case 1
3081+
++ndst; // cmp's first opnd is relop
30693082
break;
30703083
}
30713084
default:
@@ -3080,55 +3093,61 @@ void vISAVerifier::verifyBFMixedMode(const CISA_INST* inst)
30803093
REPORT_INSTRUCTION(options, execSize <= nativeES,
30813094
"Exection Size > %d is not allowed for BF mixed-mode instruction", nativeES);
30823095

3083-
// Check dst
3084-
const vector_opnd& dst = getVectorOperand(inst, 0);
3085-
VISA_Type dstType = getVectorOperandType(header, dst);
30863096
uint16_t row_off, col_off, v_stride, width, h_stride;
3087-
if (getRegion(dst, row_off, col_off, v_stride, width, h_stride))
3097+
// Check dst
3098+
if (opcode != ISA_CMP)
30883099
{
3089-
// case 5 & 6
3090-
bool legitUnpackedBF = (dstType == ISA_TYPE_BF16 && h_stride == 2 && (col_off == 0 || col_off == 1));
3091-
bool legitPackedBF = (dstType == ISA_TYPE_BF16 && h_stride == 1 && (col_off == 0 || col_off == nativeES));
3092-
bool legitF = (dstType == ISA_TYPE_F && h_stride == 1 && col_off == 0);
3093-
bool legitScalar = (execSize == 1 && h_stride == 1);
3094-
REPORT_INSTRUCTION(options, (legitUnpackedBF || legitPackedBF || legitF || legitScalar),
3095-
"Dst region is incorrect in BF mixed mode");
3100+
const vector_opnd& dst = getVectorOperand(inst, 0);
3101+
VISA_Type dstType = getVectorOperandType(header, dst);
3102+
if (getRegion(dst, row_off, col_off, v_stride, width, h_stride))
3103+
{
3104+
// case 5 & 6
3105+
bool legitUnpackedBF = (dstType == ISA_TYPE_BF && h_stride == 2 && (col_off == 0 || col_off == 1));
3106+
bool legitPackedBF = (dstType == ISA_TYPE_BF && h_stride == 1 && (col_off == 0 || col_off == nativeES));
3107+
bool legitF = (dstType == ISA_TYPE_F && h_stride == 1 && col_off == 0);
3108+
bool legitScalar = (execSize == 1 && h_stride == 1);
3109+
REPORT_INSTRUCTION(options, (legitUnpackedBF || legitPackedBF || legitF || legitScalar),
3110+
"Dst region is incorrect in BF mixed mode");
3111+
}
30963112
}
30973113

30983114
for (uint32_t i = 0; i < ISA_Inst_Table[opcode].n_srcs; i++)
30993115
{
3100-
const vector_opnd& src = getVectorOperand(inst, i + ISA_Inst_Table[opcode].n_dsts);
3116+
const vector_opnd& src = getVectorOperand(inst, i + ndst);
31013117
VISA_Type srcType = getVectorOperandType(header, src);
31023118
Common_ISA_Operand_Class operand_class = src.getOperandClass();
31033119
if (getRegion(src, row_off, col_off, v_stride, width, h_stride))
31043120
{
3105-
if (srcType == ISA_TYPE_BF16
3106-
&& (operand_class == OPERAND_IMMEDIATE ||
3107-
(execSize > 1 && (h_stride == 0 && v_stride == 0 && width == 1))))
3121+
if (srcType == ISA_TYPE_BF
3122+
&& execSize > 1 && h_stride == 0 && v_stride == 0 && width == 1)
31083123
{
31093124
REPORT_INSTRUCTION(options, false,
3110-
"Src%d : BF imm or BF broadcast scalar not supported! in BF mixed mode", i);
3125+
"Src%d : BF broadcast scalar not supported! in BF mixed mode", i);
31113126
continue;
31123127
}
31133128

31143129
bool isContinuous = ((h_stride == 0 && v_stride == 1 && width == 1) // (1;1,0)
31153130
|| (h_stride == 1 && v_stride == width)); // (4;4,1)
3116-
bool isLegitPackedBF = (srcType == ISA_TYPE_BF16
3131+
bool isLegitPackedBF = (srcType == ISA_TYPE_BF
31173132
&& execSize != 1
31183133
&& isContinuous && (col_off == 0 || col_off == nativeES));
31193134
bool isLegitF = (srcType == ISA_TYPE_F && execSize != 1 && isContinuous && col_off == 0);
3120-
bool isLegitScalar = (execSize == 1 && (h_stride == 0 && v_stride == 0 && width == 1));
3135+
bool isLegitScalar = (h_stride == 0 && v_stride == 0 && width == 1);
31213136
if (!(isLegitPackedBF || isLegitF || isLegitScalar))
31223137
{
31233138
// case 5 & 6
31243139
REPORT_INSTRUCTION(options, false, "Src%d : invalid region in BF mixed mode", i);
31253140
}
31263141
}
3127-
else
3142+
else if (operand_class == OPERAND_IMMEDIATE)
31283143
{
3129-
REPORT_INSTRUCTION(options, false, "Invalid region");
3144+
REPORT_INSTRUCTION(options, srcType == ISA_TYPE_F, "Src%d : BF immediate not supported", i);
31303145
return;
31313146
}
3147+
else
3148+
{
3149+
REPORT_INSTRUCTION(options, false, "Src%d : unrecognized region in BF mixed mode", i);
3150+
}
31323151
}
31333152
return;
31343153
}

‎visa/include/visa_igc_common_header.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -94,7 +94,7 @@ typedef enum {
9494
ISA_TYPE_UV = 0xC,
9595
ISA_TYPE_Q = 0xD,
9696
ISA_TYPE_HF = 0xE,
97-
ISA_TYPE_BF16 = 0xF,
97+
ISA_TYPE_BF = 0xF,
9898
ISA_TYPE_NUM
9999
} VISA_Type ;
100100

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