Skip to content

Commit c77111d

Browse files
bcheng0127sys_zuul
bcheng0127
authored and
sys_zuul
committed
Using byte alignment to replace the GRF alignment
Change-Id: I646d9aa827dfc12cbea90828502f0309eeb8b088
1 parent 02aae5d commit c77111d

File tree

11 files changed

+92
-84
lines changed

11 files changed

+92
-84
lines changed

‎IGC/AdaptorCommon/ImplicitArgs.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -173,8 +173,8 @@ IGC::e_alignment ImplicitArg::getAlignType(const DataLayout& DL) const
173173
return IGC::EALIGN_DWORD;
174174
case ALIGN_QWORD:
175175
return IGC::EALIGN_QWORD;
176-
case ALIGN_GRF:
177-
return IGC::EALIGN_GRF;
176+
case ALIGN_GRF: //According to old implementation, EALIGN_GRF = EALIGN_HWORD, the correpsonding alignmentSize is 32, so EALIGN_HWORD will not change the old define.
177+
return IGC::EALIGN_HWORD; //FIXME: But, the ALIGN_GRF is really GRF aligned? If so, there is bug here.
178178
case ALIGN_PTR:
179179
return getPointerSize(DL) == 4 ? IGC::EALIGN_DWORD : IGC::EALIGN_QWORD;
180180
default:

‎IGC/Compiler/CISACodeGen/CISABuilder.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -4532,11 +4532,11 @@ namespace IGC
45324532
break;
45334533
case EALIGN_OWORD: align = ALIGN_OWORD;
45344534
break;
4535-
case EALIGN_GRF:
4536-
align = ALIGN_HWORD;
4535+
case EALIGN_HWORD: align = ALIGN_HWORD;
45374536
break;
4538-
case EALIGN_2GRF:
4539-
align = ALIGN_32WORD;
4537+
case EALIGN_32WORD: align = ALIGN_32WORD;
4538+
break;
4539+
case EALIGN_64WORD: align = ALIGN_64WORD;
45404540
break;
45414541
default:
45424542
align = ALIGN_UNDEF;

‎IGC/Compiler/CISACodeGen/CISACodeGen.h

Lines changed: 7 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -70,21 +70,24 @@ namespace IGC
7070
EALIGN_QWORD,
7171
EALIGN_OWORD,
7272
EALIGN_HWORD,
73-
EALIGN_GRF = EALIGN_HWORD,
7473
EALIGN_32WORD,
75-
EALIGN_2GRF = EALIGN_32WORD,
74+
EALIGN_64WORD,
7675
EALIGN_AUTO
7776
};
7877

79-
static const std::array<unsigned int, 7> alignmentSize =
78+
#define EALIGN_GRF EALIGN_HWORD
79+
#define EALIGN_2GRF EALIGN_32WORD
80+
81+
static const std::array<unsigned int, 8> alignmentSize =
8082
{
8183
1,
8284
2,
8385
4,
8486
8,
8587
16,
8688
32,
87-
64
89+
64,
90+
128
8891
};
8992

9093
class calignmentSize

‎IGC/Compiler/CISACodeGen/CShader.cpp

Lines changed: 13 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -167,7 +167,7 @@ void CShader::EOTURBWrite()
167167
CVariable* pEOTPayload =
168168
GetNewVariable(
169169
messageLength * numLanes(SIMDMode::SIMD8),
170-
ISA_TYPE_D, IGC::EALIGN_GRF, false, 1, "EOTPayload");
170+
ISA_TYPE_D, EALIGN_GRF, false, 1, "EOTPayload");
171171

172172
CVariable* zero = ImmToVariable(0x0, ISA_TYPE_D);
173173
// write at handle 0
@@ -1845,16 +1845,16 @@ static e_alignment GetPreferredAlignmentOnUse(llvm::Value* V, WIAnalysis* WIA,
18451845
Value* Ptr = ST->getPointerOperand();
18461846
if (aWIA->whichDepend(Ptr) == WIAnalysis::UNIFORM) {
18471847
if (IGC::isA64Ptr(cast<PointerType>(Ptr->getType()), pCtx))
1848-
return EALIGN_2GRF;
1849-
return EALIGN_GRF;
1848+
return (pCtx->platform.getGRFSize() == 64) ? EALIGN_64WORD : EALIGN_32WORD;
1849+
return (pCtx->platform.getGRFSize() == 64) ? EALIGN_32WORD : EALIGN_HWORD;
18501850
}
18511851
}
18521852
if (StoreInst* ST = dyn_cast<StoreInst>(*UI)) {
18531853
Value* Ptr = ST->getPointerOperand();
18541854
if (aWIA->whichDepend(Ptr) == WIAnalysis::UNIFORM) {
18551855
if (IGC::isA64Ptr(cast<PointerType>(Ptr->getType()), pCtx))
1856-
return EALIGN_2GRF;
1857-
return EALIGN_GRF;
1856+
return (pCtx->platform.getGRFSize() == 64) ? EALIGN_64WORD : EALIGN_32WORD;
1857+
return (pCtx->platform.getGRFSize() == 64) ? EALIGN_32WORD : EALIGN_HWORD;
18581858
}
18591859
}
18601860

@@ -1869,9 +1869,9 @@ static e_alignment GetPreferredAlignmentOnUse(llvm::Value* V, WIAnalysis* WIA,
18691869
if (aWIA->whichDepend(Ptr) == WIAnalysis::UNIFORM) {
18701870
if (PointerType* PtrTy = dyn_cast<PointerType>(Ptr->getType())) {
18711871
if (IGC::isA64Ptr(PtrTy, pCtx))
1872-
return EALIGN_2GRF;
1872+
return (pCtx->platform.getGRFSize() == 64) ? EALIGN_64WORD : EALIGN_32WORD;
18731873
}
1874-
return EALIGN_GRF;
1874+
return (pCtx->platform.getGRFSize() == 64) ? EALIGN_32WORD : EALIGN_HWORD;
18751875
}
18761876
}
18771877
}
@@ -1935,10 +1935,10 @@ e_alignment IGC::GetPreferredAlignment(llvm::Value* V, WIAnalysis* WIA,
19351935
if (LoadInst * LD = dyn_cast<LoadInst>(V)) {
19361936
Value* Ptr = LD->getPointerOperand();
19371937
// For 64-bit load, we have to check how the loaded value being used.
1938-
e_alignment Align = EALIGN_GRF;
1938+
e_alignment Align = (pContext->platform.getGRFSize() == 64) ? EALIGN_32WORD : EALIGN_HWORD;
19391939
if (IGC::isA64Ptr(cast<PointerType>(Ptr->getType()), pContext))
19401940
Align = GetPreferredAlignmentOnUse(V, WIA, pContext);
1941-
return (Align == EALIGN_AUTO) ? EALIGN_GRF : Align;
1941+
return (Align == EALIGN_AUTO) ? (pContext->platform.getGRFSize() == 64) ? EALIGN_32WORD : EALIGN_HWORD : Align;
19421942
}
19431943

19441944
// If uniform variables are results from uniform atomic ops, they need
@@ -1948,12 +1948,12 @@ e_alignment IGC::GetPreferredAlignment(llvm::Value* V, WIAnalysis* WIA,
19481948
Value* Ptr = GII->getArgOperand(1);
19491949
// For 64-bit atomic ops, we have to check how the return value being
19501950
// used.
1951-
e_alignment Align = EALIGN_GRF;
1951+
e_alignment Align = (pContext->platform.getGRFSize() == 64) ? EALIGN_32WORD : EALIGN_HWORD;
19521952
if (PointerType * PtrTy = dyn_cast<PointerType>(Ptr->getType())) {
19531953
if (IGC::isA64Ptr(PtrTy, pContext))
19541954
Align = GetPreferredAlignmentOnUse(V, WIA, pContext);
19551955
}
1956-
return (Align == EALIGN_AUTO) ? EALIGN_GRF : Align;
1956+
return (Align == EALIGN_AUTO) ? (pContext->platform.getGRFSize() == 64) ? EALIGN_32WORD : EALIGN_HWORD : Align;
19571957
}
19581958

19591959
// Check how that value is used.
@@ -1990,7 +1990,7 @@ CVariable* CShader::LazyCreateCCTupleBackingVariable(
19901990
var = GetNewVariable(
19911991
(uint16_t)numElts,
19921992
ISA_TYPE_F,
1993-
EALIGN_GRF,
1993+
(GetContext()->platform.getGRFSize() == 64) ? EALIGN_32WORD : EALIGN_HWORD,
19941994
false,
19951995
m_numberInstance,
19961996
"CCTuple");
@@ -2471,7 +2471,7 @@ CVariable* CShader::GetSymbol(llvm::Value* value, bool fromConstantPool)
24712471
{
24722472
// Map the entire vector value to the CVar
24732473
unsigned numElements = value->getType()->getVectorNumElements();
2474-
var = GetNewVariable(numElements, ISA_TYPE_UQ, EALIGN_GRF, true, 1, valName);
2474+
var = GetNewVariable(numElements, ISA_TYPE_UQ, (GetContext()->platform.getGRFSize() == 64) ? EALIGN_32WORD : EALIGN_HWORD, true, 1, valName);
24752475
symbolMapping.insert(std::pair<llvm::Value*, CVariable*>(value, var));
24762476

24772477
// Copy over each element

‎IGC/Compiler/CISACodeGen/CVariable.cpp

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -90,8 +90,10 @@ getAlignment(e_alignment align)
9090
case EALIGN_DWORD: return 4;
9191
case EALIGN_QWORD: return 8;
9292
case EALIGN_OWORD: return 16;
93-
case EALIGN_GRF: return 32;
94-
case EALIGN_2GRF: return 64;
93+
case EALIGN_HWORD: return 32;
94+
case EALIGN_32WORD: return 64;
95+
case EALIGN_64WORD: return 128;
96+
9597
default:
9698
break;
9799
}

‎IGC/Compiler/CISACodeGen/CVariable.hpp

Lines changed: 1 addition & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -198,23 +198,6 @@ namespace IGC {
198198
bool IsVectorUniform() const { return m_uniformVector; }
199199
uint8_t GetNumberInstance() const { return m_numberOfInstance; }
200200
bool IsUndef() const { return m_undef; }
201-
bool IsGRFAligned(e_alignment requiredAlign = EALIGN_GRF) const
202-
{
203-
e_alignment align = GetAlign();
204-
if (requiredAlign == EALIGN_BYTE)
205-
{
206-
// trivial
207-
return true;
208-
}
209-
if (requiredAlign == EALIGN_AUTO || align == EALIGN_AUTO)
210-
{
211-
// Can only assume that AUTO only matches AUTO (?)
212-
// (keep the previous behavior unchanged.)
213-
return align == requiredAlign;
214-
}
215-
return align >= requiredAlign;
216-
}
217-
218201
void setisUnpacked() { m_isUnpacked = true; }
219202
bool isUnpacked() { return m_isUnpacked; }
220203
uint8_t getOffsetMultiplier() const { return m_isUnpacked ? 2 : 1; }
@@ -239,6 +222,7 @@ namespace IGC {
239222
case 16: return EALIGN_OWORD;
240223
case 32: return EALIGN_HWORD;
241224
case 64: return EALIGN_32WORD;
225+
case 128: return EALIGN_64WORD;
242226
default:
243227
break;
244228
}

‎IGC/Compiler/CISACodeGen/CoalescingEngine.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1210,7 +1210,7 @@ namespace IGC
12101210
else
12111211
{
12121212
payload = outProgram->GetNewVariable(
1213-
numOperands * numLanes(simdMode), ISA_TYPE_F, EALIGN_GRF, CName::NONE);
1213+
numOperands * numLanes(simdMode), ISA_TYPE_F, outProgram->GetContext()->platform.getGRFSize() == 64 ? EALIGN_32WORD : EALIGN_HWORD, CName::NONE);
12141214

12151215
for (uint i = 0; i < numOperands; i++)
12161216
{

‎IGC/Compiler/CISACodeGen/DeSSA.hpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -266,6 +266,8 @@ namespace IGC {
266266
/// If there is no node for Val, create a new one.
267267
void addReg(llvm::Value* Val, e_alignment Align);
268268

269+
int getGRFSize() const { return CTX->platform.getGRFSize(); }
270+
269271
/// union-by-rank:
270272
/// Join the congruence classes of two registers by attaching
271273
/// a shorter tree to a taller tree. If they have the same height,

0 commit comments

Comments
 (0)