|
| 1 | +;=========================== begin_copyright_notice ============================ |
| 2 | +; |
| 3 | +; Copyright (C) 2024 Intel Corporation |
| 4 | +; |
| 5 | +; SPDX-License-Identifier: MIT |
| 6 | +; |
| 7 | +;============================ end_copyright_notice ============================= |
| 8 | + |
| 9 | +; RUN: llc %s -march=genx64 -mcpu=XeHPG -vc-skip-ocl-runtime-info -finalizer-opts='-dumpcommonisa -isaasmToConsole' -o /dev/null | FileCheck %s |
| 10 | + |
| 11 | +; Function Attrs: nounwind |
| 12 | +declare !spirv.ParameterDecorations !17 spir_func void @AlphaSrcBlendG(<12 x i16>, <7 x i8>, i8 zeroext, i16 zeroext, i16 zeroext, i32, i32, <2 x i32>, <4 x i8>, i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext, <8 x float>, <8 x float>, <8 x float>, <8 x float>, <16 x i16>, <16 x i16>, <16 x i16>, <1536 x i16>, <16 x i16>, <12 x i16>, i16 zeroext, i16 zeroext, i8 zeroext, i8 zeroext, i8 zeroext, i8 zeroext) local_unnamed_addr #0 |
| 13 | + |
| 14 | +; Function Attrs: nounwind |
| 15 | +declare void @llvm.genx.output.1.v12i16(<12 x i16>) #1 |
| 16 | + |
| 17 | +; Function Attrs: nounwind |
| 18 | +declare void @llvm.genx.output.1.v7i8(<7 x i8>) #1 |
| 19 | + |
| 20 | +; Function Attrs: nounwind |
| 21 | +declare void @llvm.genx.output.1.i8(i8) #1 |
| 22 | + |
| 23 | +; Function Attrs: nounwind |
| 24 | +declare void @llvm.genx.output.1.i16(i16) #1 |
| 25 | + |
| 26 | +; Function Attrs: nounwind |
| 27 | +declare void @llvm.genx.output.1.i32(i32) #1 |
| 28 | + |
| 29 | +; Function Attrs: nounwind |
| 30 | +declare void @llvm.genx.output.1.v2i32(<2 x i32>) #1 |
| 31 | + |
| 32 | +; Function Attrs: nounwind |
| 33 | +declare void @llvm.genx.output.1.v4i8(<4 x i8>) #1 |
| 34 | + |
| 35 | +; Function Attrs: nounwind |
| 36 | +declare void @llvm.genx.output.1.v8f32(<8 x float>) #1 |
| 37 | + |
| 38 | +; Function Attrs: nounwind |
| 39 | +declare void @llvm.genx.output.1.v16i16(<16 x i16>) #1 |
| 40 | + |
| 41 | +; Function Attrs: nounwind |
| 42 | +declare void @llvm.genx.output.1.v1536i16(<1536 x i16>) #1 |
| 43 | + |
| 44 | +; Function Attrs: noinline nounwind |
| 45 | +; CHECK: Call_AlphaSrcBlendG |
| 46 | +define dllexport spir_kernel void @Call_AlphaSrcBlendG(<12 x i16> %PrimaryCscCoeff, <7 x i8> %ConstantBlendingAlpha, i8 zeroext %PointerToInlineParameters, i16 zeroext %Dst_Width, i16 zeroext %Dst_Height, i32 %WAFlag, i32 %RotationChromaSitingFlag, <2 x i32> %Reserved1, <4 x i8> %ColorFill, i8 zeroext %LumakeyLowThreshold, i8 zeroext %LumakeyHighThreshold, i8 zeroext %Reserved2, i8 zeroext %Reserved3, i8 zeroext %DestinationPackedYOffset, i8 zeroext %DestinationPackedUOffset, i8 zeroext %DestinationPackedVOffset, i8 zeroext %DestinationRGBFormat, <8 x float> %Delta_X, <8 x float> %Delta_Y, <8 x float> %Start_Y, <8 x float> %Start_X, <16 x i16> %Top_Left, <16 x i16> %Bottom_Right, <16 x i16> %TempMask0, <1536 x i16> %DataBuffer, <16 x i16> %TempMask, <12 x i16> %CscCoeff, i16 zeroext %DstX, i16 zeroext %DstY, i8 zeroext %Buffer_Index, i8 zeroext %Layer_Index, i8 zeroext %CalculationMask, i8 zeroext %ConstAlphaTemp, i64 %impl.arg.private.base) local_unnamed_addr #2 { |
| 47 | +entry: |
| 48 | + %cmp.not = icmp eq i8 %Buffer_Index, 0 |
| 49 | + br i1 %cmp.not, label %if.end, label %if.then |
| 50 | + |
| 51 | +; CHECK: fccall {{.*}} AlphaSrcBlendG |
| 52 | +if.then: ; preds = %entry |
| 53 | + tail call spir_func void @AlphaSrcBlendG(<12 x i16> %PrimaryCscCoeff, <7 x i8> %ConstantBlendingAlpha, i8 zeroext %PointerToInlineParameters, i16 zeroext %Dst_Width, i16 zeroext %Dst_Height, i32 %WAFlag, i32 %RotationChromaSitingFlag, <2 x i32> %Reserved1, <4 x i8> %ColorFill, i8 zeroext %LumakeyLowThreshold, i8 zeroext %LumakeyHighThreshold, i8 zeroext %Reserved2, i8 zeroext %Reserved3, i8 zeroext %DestinationPackedYOffset, i8 zeroext %DestinationPackedUOffset, i8 zeroext %DestinationPackedVOffset, i8 zeroext %DestinationRGBFormat, <8 x float> %Delta_X, <8 x float> %Delta_Y, <8 x float> %Start_Y, <8 x float> %Start_X, <16 x i16> %Top_Left, <16 x i16> %Bottom_Right, <16 x i16> %TempMask0, <1536 x i16> %DataBuffer, <16 x i16> %TempMask, <12 x i16> %CscCoeff, i16 zeroext %DstX, i16 zeroext %DstY, i8 zeroext %Buffer_Index, i8 zeroext %Layer_Index, i8 zeroext %CalculationMask, i8 zeroext %ConstAlphaTemp) #1 |
| 54 | + br label %if.end |
| 55 | + |
| 56 | +if.end: ; preds = %if.then, %entry |
| 57 | + tail call void @llvm.genx.output.1.v12i16(<12 x i16> %PrimaryCscCoeff) |
| 58 | + tail call void @llvm.genx.output.1.v7i8(<7 x i8> %ConstantBlendingAlpha) |
| 59 | + tail call void @llvm.genx.output.1.i8(i8 %PointerToInlineParameters) |
| 60 | + tail call void @llvm.genx.output.1.i16(i16 %Dst_Width) |
| 61 | + tail call void @llvm.genx.output.1.i16(i16 %Dst_Height) |
| 62 | + tail call void @llvm.genx.output.1.i32(i32 %WAFlag) |
| 63 | + tail call void @llvm.genx.output.1.i32(i32 %RotationChromaSitingFlag) |
| 64 | + tail call void @llvm.genx.output.1.v2i32(<2 x i32> %Reserved1) |
| 65 | + tail call void @llvm.genx.output.1.v4i8(<4 x i8> %ColorFill) |
| 66 | + tail call void @llvm.genx.output.1.i8(i8 %LumakeyLowThreshold) |
| 67 | + tail call void @llvm.genx.output.1.i8(i8 %LumakeyHighThreshold) |
| 68 | + tail call void @llvm.genx.output.1.i8(i8 %Reserved2) |
| 69 | + tail call void @llvm.genx.output.1.i8(i8 %Reserved3) |
| 70 | + tail call void @llvm.genx.output.1.i8(i8 %DestinationPackedYOffset) |
| 71 | + tail call void @llvm.genx.output.1.i8(i8 %DestinationPackedUOffset) |
| 72 | + tail call void @llvm.genx.output.1.i8(i8 %DestinationPackedVOffset) |
| 73 | + tail call void @llvm.genx.output.1.i8(i8 %DestinationRGBFormat) |
| 74 | + tail call void @llvm.genx.output.1.v8f32(<8 x float> %Delta_X) |
| 75 | + tail call void @llvm.genx.output.1.v8f32(<8 x float> %Delta_Y) |
| 76 | + tail call void @llvm.genx.output.1.v8f32(<8 x float> %Start_Y) |
| 77 | + tail call void @llvm.genx.output.1.v8f32(<8 x float> %Start_X) |
| 78 | + tail call void @llvm.genx.output.1.v16i16(<16 x i16> %Top_Left) |
| 79 | + tail call void @llvm.genx.output.1.v16i16(<16 x i16> %Bottom_Right) |
| 80 | + tail call void @llvm.genx.output.1.v16i16(<16 x i16> %TempMask0) |
| 81 | + tail call void @llvm.genx.output.1.v1536i16(<1536 x i16> %DataBuffer) |
| 82 | + tail call void @llvm.genx.output.1.v16i16(<16 x i16> %TempMask) |
| 83 | + tail call void @llvm.genx.output.1.v12i16(<12 x i16> %CscCoeff) |
| 84 | + tail call void @llvm.genx.output.1.i16(i16 %DstX) |
| 85 | + tail call void @llvm.genx.output.1.i16(i16 %DstY) |
| 86 | + tail call void @llvm.genx.output.1.i8(i8 %Buffer_Index) |
| 87 | + tail call void @llvm.genx.output.1.i8(i8 %Layer_Index) |
| 88 | + tail call void @llvm.genx.output.1.i8(i8 %CalculationMask) |
| 89 | + tail call void @llvm.genx.output.1.i8(i8 %ConstAlphaTemp) |
| 90 | + ret void |
| 91 | +} |
| 92 | + |
| 93 | +attributes #0 = { nounwind "CMCallable" } |
| 94 | +attributes #1 = { nounwind } |
| 95 | +attributes #2 = { noinline nounwind "CMEntry" "CMGenxMain" "RequiresImplArgsBuffer" "oclrt"="1" } |
| 96 | + |
| 97 | +!spirv.MemoryModel = !{!0} |
| 98 | +!spirv.Source = !{!1} |
| 99 | +!opencl.spir.version = !{!2, !3, !3, !3} |
| 100 | +!opencl.ocl.version = !{!1, !3, !3, !3} |
| 101 | +!opencl.used.extensions = !{!4} |
| 102 | +!opencl.used.optional.core.features = !{!4} |
| 103 | +!spirv.Generator = !{!5} |
| 104 | +!genx.kernels = !{!6} |
| 105 | +!llvm.ident = !{!11, !11, !11} |
| 106 | +!llvm.module.flags = !{!12} |
| 107 | +!genx.kernel.internal = !{!13} |
| 108 | + |
| 109 | +!0 = !{i32 2, i32 2} |
| 110 | +!1 = !{i32 0, i32 0} |
| 111 | +!2 = !{i32 1, i32 2} |
| 112 | +!3 = !{i32 2, i32 0} |
| 113 | +!4 = !{} |
| 114 | +!5 = !{i16 6, i16 14} |
| 115 | +!6 = !{void (<12 x i16>, <7 x i8>, i8, i16, i16, i32, i32, <2 x i32>, <4 x i8>, i8, i8, i8, i8, i8, i8, i8, i8, <8 x float>, <8 x float>, <8 x float>, <8 x float>, <16 x i16>, <16 x i16>, <16 x i16>, <1536 x i16>, <16 x i16>, <12 x i16>, i16, i16, i8, i8, i8, i8, i64)* @Call_AlphaSrcBlendG, !"Call_AlphaSrcBlendG", !7, i32 0, !8, !9, !10, i32 0} |
| 116 | +!7 = !{i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 96} |
| 117 | +!8 = !{i32 136, i32 160, i32 167, i32 168, i32 170, i32 172, i32 176, i32 180, i32 188, i32 192, i32 193, i32 194, i32 195, i32 196, i32 197, i32 198, i32 199, i32 200, i32 256, i32 288, i32 320, i32 352, i32 384, i32 416, i32 448, i32 3520, i32 3552, i32 3576, i32 3578, i32 3580, i32 3581, i32 3582, i32 3583, i32 128} |
| 118 | +!9 = !{i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3} |
| 119 | +!10 = !{!"", !"", !"", !"", !"", !"", !"", !"", !"", !"", !"", !"", !"", !"", !"", !"", !"", !"", !"", !"", !"", !"", !"", !"", !"", !"", !"", !"", !"", !"", !"", !"", !""} |
| 120 | +!11 = !{!"Ubuntu clang version 14.0.6"} |
| 121 | +!12 = !{i32 1, !"wchar_size", i32 4} |
| 122 | +!13 = !{void (<12 x i16>, <7 x i8>, i8, i16, i16, i32, i32, <2 x i32>, <4 x i8>, i8, i8, i8, i8, i8, i8, i8, i8, <8 x float>, <8 x float>, <8 x float>, <8 x float>, <16 x i16>, <16 x i16>, <16 x i16>, <1536 x i16>, <16 x i16>, <12 x i16>, i16, i16, i8, i8, i8, i8, i64)* @Call_AlphaSrcBlendG, !14, !15, !4, !16} |
| 123 | +!14 = !{i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0} |
| 124 | +!15 = !{i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33} |
| 125 | +!16 = !{i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 255} |
| 126 | +!17 = !{!4, !4, !18, !18, !18, !4, !4, !4, !4, !18, !18, !18, !18, !18, !18, !18, !18, !4, !4, !4, !4, !4, !4, !4, !4, !4, !4, !18, !18, !18, !18, !18, !18} |
| 127 | +!18 = !{!19} |
| 128 | +!19 = !{i32 38, i32 0} |
| 129 | + |
| 130 | + |
0 commit comments