Changes in code.

Author: pratikashar

visa/G4_Kernel.hpp

@@ -897,16 +897,6 @@ class G4_Kernel {
     I->setMaskOption(MO);
   }
   // end of WA related
-
-  // Struct to store inst, opndNum that sets special LSC cache backing bit.
-  // We reset the bit if LSC backing must be disabled. Note this applies only
-  // when LSC backing bit is programmed in message header on Xe3.
-  struct SampleWithLSCBacking {
-    G4_INST *inst = nullptr;
-    unsigned int opndNum = 0xffffffff;
-    unsigned int bitPos = 0xffffffff;
-  };
-  std::list<struct SampleWithLSCBacking> samplerWithLSCBacking;
 };     // G4_Kernel
 
 } // namespace vISA

visa/HWCaps.inc

@@ -939,9 +939,4 @@ bool needTGMDoubleFenceWA() const {
 bool useDynamicAddrForExDesc() const {
   return getOption(vISA_dynamicAddrForExDescInLscSend);
 }
-
-bool samplerCachingInLSCHeader() const {
-    return (getPlatform() >= TARGET_PLATFORM::Xe3 &&
-                    getOption(vISA_enableSamplerLSCCaching));
-}
 // end HW capabilities

visa/Optimizer.cpp

@@ -683,8 +683,6 @@ void Optimizer::initOptimizations() {
   OPT_INITIALIZE_PASS(reassignBlockIDs, vISA_EnableAlways, TimerID::MISC_OPTS);
   OPT_INITIALIZE_PASS(evalAddrExp, vISA_EnableAlways, TimerID::MISC_OPTS);
   OPT_INITIALIZE_PASS(FoldAddrImmediate, vISA_FoldAddrImmed, TimerID::MISC_OPTS);
-  OPT_INITIALIZE_PASS(fixSamplerCacheBitInHeader, vISA_EnableAlways,
-                      TimerID::MISC_OPTS);
   OPT_INITIALIZE_PASS(localSchedule, vISA_LocalScheduling, TimerID::SCHEDULING);
   OPT_INITIALIZE_PASS(HWWorkaround, vISA_EnableAlways, TimerID::MISC_OPTS);
   OPT_INITIALIZE_PASS(fixEndIfWhileLabels, vISA_EnableAlways, TimerID::NUM_TIMERS);
@@ -968,9 +966,6 @@ int Optimizer::optimization() {
     return VISA_SPILL;
   }
 
-  runPass(PI_fixSamplerCacheBitInHeader);
-
-
   runPass(PI_removeLifetimeOps);
 
   // HW workaround after RA
@@ -1327,47 +1322,6 @@ void Optimizer::removePseudoMov() {
   }
 }
 
-void Optimizer::fixSamplerCacheBitInHeader() {
-  // If LSC caching is globally disabled then builder won't set
-  // caching bit in sampler message header. So return without doing anything.
-  //
-  // If current object is kernel:
-  // * Return without doing anything if spill size <= threshold
-  //   ie, LSC caching bit is set in sampler message header.
-  // * If spill size > threshold, reset cache bit in sampler
-  //   message header.
-  //
-  // If current object is a stack call function:
-  // * Since we cannot tell scratch space size of entire call
-  //   graph, do nothing and return. For stack call, default
-  //   behavior is that LSC caching bit is set. One can still
-  //   disable LSC caching globally.
-  if (!builder.getOption(vISA_enableSamplerLSCCaching))
-    return;
-
-  if (fg.getIsStackCallFunc())
-    return;
-
-  const auto spillSizeThreshold =
-      builder.getuint32Option(vISA_samplerLSCCachingThreshold);
-
-  const auto &jitInfo = builder.getJitInfo();
-  if (jitInfo->stats.spillMemUsed <= spillSizeThreshold)
-    return;
-
-  for (auto &entry : kernel.samplerWithLSCBacking) {
-    auto *inst = entry.inst;
-    auto opndNum = entry.opndNum;
-    auto LSCBackingBit = entry.bitPos;
-    // We need to reset bit# LSCBackingBit, create new G4_Imm and assign it to
-    // inst.
-    int64_t imm64 = inst->getSrc(opndNum)->asImm()->getInt();
-    // Reset bit in imm64
-    imm64 ^= (1ll << LSCBackingBit);
-    auto *newImm = builder.createImm(imm64, Type_UD);
-    inst->setSrc(newImm, opndNum);
-  }
-}
 void Optimizer::FoldAddrImmediate() {
   AddrSubReg_Node *addrRegInfo =
       new AddrSubReg_Node[builder.getNumAddrRegisters()];

visa/Optimizer.h

@@ -123,7 +123,6 @@ class Optimizer {
                          INST_LIST_ITER iend);
   void removePseudoMov();
   void FoldAddrImmediate();
-  void fixSamplerCacheBitInHeader();
   bool foldCmpSel(G4_BB *BB, G4_INST *selInst, INST_LIST_ITER &selInst_II);
   bool foldPseudoNot(G4_BB *bb, INST_LIST_ITER &iter);
   bool createSmov(G4_BB *bb, G4_INST *flagMove, G4_INST *nextInst);
@@ -368,7 +367,6 @@ class Optimizer {
     PI_reassignBlockIDs,      // always
     PI_evalAddrExp,           // always
     PI_FoldAddrImmediate,
-    PI_fixSamplerCacheBitInHeader,
     PI_localSchedule,
     PI_HWWorkaround,        // always
     PI_fixEndIfWhileLabels, // always

visa/VisaToG4/TranslateSend3D.cpp

@@ -1763,37 +1763,17 @@ static G4_Operand *createSampleHeader(IR_Builder *builder, G4_Declare *header,
   unsigned int secondDword = createSampleHeader0Dot2(
       actualop, pixelNullMask, aoffimmiVal, srcChannel, builder);
 
-  bool addToList = false;
-  const uint32_t LSCBacking = 29;
-  if (builder->samplerCachingInLSCHeader()) {
-    // Bit 29: Enables LSC as second level cache for Sampler
-    secondDword |= (1 << 29);
-    addToList = true;
-  }
-
   G4_Imm *immOpndSecondDword = builder->createImm(secondDword, Type_UD);
   G4_DstRegRegion *payloadDstRgn =
       builder->createDst(header->getRegVar(), 0, 2, 1, Type_UD);
-  G4_INST *headerInst = nullptr;
   if (aoffimmi->isImm()) {
     // mov (1) payload(0,2) immOpndSecondDword
-    headerInst =
-        builder->createMov(g4::SIMD1, payloadDstRgn, immOpndSecondDword,
-                           InstOpt_WriteEnable, true);
-    if (addToList)
-    {
-      builder->kernel.samplerWithLSCBacking.push_back(
-          {headerInst, 0, LSCBacking});
-    }
+    builder->createMov(g4::SIMD1, payloadDstRgn, immOpndSecondDword,
+                       InstOpt_WriteEnable, true);
   } else {
     // or (1) payload(0,2) aoffimmi<0;1,0>:uw immOpndSeconDword
-    headerInst =
-        builder->createBinOp(G4_or, g4::SIMD1, payloadDstRgn, aoffimmi,
-                             immOpndSecondDword, InstOpt_WriteEnable, true);
-    if (addToList) {
-      builder->kernel.samplerWithLSCBacking.push_back(
-          {headerInst, 1, LSCBacking});
-    }
+    builder->createBinOp(G4_or, g4::SIMD1, payloadDstRgn, aoffimmi,
+                         immOpndSecondDword, InstOpt_WriteEnable, true);
   }
 
   if (sampler != nullptr) {
@@ -2500,7 +2480,7 @@ int IR_Builder::translateVISALoad3DInst(
     G4_SrcRegRegion **opndArray) {
   TIME_SCOPE(VISA_BUILDER_IR_CONSTRUCTION);
 
-  bool useHeader = samplerCachingInLSCHeader();
+  bool useHeader = false;
 
   G4_ExecSize execSize = toExecSize(executionSize);
   G4_InstOpts instOpt = Get_Gen4_Emask(em, execSize);

visa/include/VISAOptionsDefs.h

@@ -186,12 +186,6 @@ DEF_VISA_OPTION(vISA_SkipRedundantFillInRMW, ET_BOOL, "-normwopt", UNUSED, true)
 DEF_VISA_OPTION(vISA_ALTMode, ET_BOOL, "-nonALTMode", UNUSED, false)
 DEF_VISA_OPTION(vISA_CoalesceScalarMoves, ET_BOOL, "-enableCoalesceScalarMoves",
                 UNUSED, false)
-DEF_VISA_OPTION(vISA_enableSamplerLSCCaching, ET_BOOL_TRUE,
-                "-samplerLSCCaching",
-                "global flag [0|1] to control LSC caching for sampler", true)
-DEF_VISA_OPTION(vISA_samplerLSCCachingThreshold, ET_INT32,
-                "-samplerLSCCachingThreshold",
-                "spill size threshold to disable LSC caching for sampler", 0)
 DEF_VISA_OPTION(vISA_SinkBarrierWait, ET_BOOL_TRUE, "-sinkBarrierWait",
                 "Barrier signal and wait are usually scheduled back to back. "
                 "The option is used to sink barrier wait away from signal as "