Clean up

.

Author: vsemenov368

IGC/VectorCompiler/lib/GenXCodeGen/GenXPromoteStatefulToBindless.cpp

@@ -36,6 +36,7 @@ SPDX-License-Identifier: MIT
 /// samplers can be easily added here.
 
 #include "GenX.h"
+#include "GenXSubtarget.h"
 #include "GenXTargetMachine.h"
 
 #include "vc/Support/BackendConfig.h"
@@ -46,16 +47,20 @@ SPDX-License-Identifier: MIT
 #include "llvm/GenXIntrinsics/GenXIntrinsics.h"
 #include "llvm/GenXIntrinsics/GenXMetadata.h"
 
+#include "visa_igc_common_header.h"
+
 #include "Probe/Assertion.h"
 
 #include <llvm/ADT/SmallVector.h>
 #include <llvm/ADT/StringRef.h>
 #include <llvm/ADT/Twine.h>
+#include <llvm/CodeGen/TargetPassConfig.h>
 #include <llvm/IR/Function.h>
 #include <llvm/IR/GlobalVariable.h>
 #include <llvm/IR/IRBuilder.h>
 #include <llvm/IR/InstIterator.h>
 #include <llvm/IR/Module.h>
+#include <llvm/InitializePasses.h>
 #include <llvm/Pass.h>
 #include <llvm/Support/ErrorHandling.h>
 
@@ -69,10 +74,12 @@ class PromoteToBindless {
   Module &M;
   const GenXBackendConfig &BC;
   GlobalVariable *BSS = nullptr;
+  const GenXSubtarget &ST;
 
 public:
-  PromoteToBindless(Module &InM, const GenXBackendConfig &InBC)
-      : M{InM}, BC{InBC} {}
+  PromoteToBindless(Module &InM, const GenXBackendConfig &InBC,
+                    const GenXSubtarget &InST)
+      : M{InM}, BC{InBC}, ST(InST) {}
 
   bool run();
 
@@ -97,6 +104,7 @@ class GenXPromoteStatefulToBindless final : public ModulePass {
   GenXPromoteStatefulToBindless() : ModulePass(ID) {}
 
   void getAnalysisUsage(AnalysisUsage &AU) const override {
+    AU.addRequired<TargetPassConfig>();
     AU.addRequired<GenXBackendConfig>();
   }
 
@@ -114,6 +122,7 @@ INITIALIZE_PASS_BEGIN(GenXPromoteStatefulToBindless,
                       "GenXPromoteStatefulToBindless",
                       "GenXPromoteStatefulToBindless", false, false);
 INITIALIZE_PASS_DEPENDENCY(GenXBackendConfig)
+INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
 INITIALIZE_PASS_END(GenXPromoteStatefulToBindless,
                     "GenXPromoteStatefulToBindless",
                     "GenXPromoteStatefulToBindless", false, false);
@@ -128,7 +137,11 @@ ModulePass *createGenXPromoteStatefulToBindlessPass() {
 bool GenXPromoteStatefulToBindless::runOnModule(Module &M) {
   auto &BC = getAnalysis<GenXBackendConfig>();
 
-  PromoteToBindless PTM{M, BC};
+  const GenXSubtarget &ST = getAnalysis<TargetPassConfig>()
+                                .getTM<GenXTargetMachine>()
+                                .getGenXSubtarget();
+
+  PromoteToBindless PTM{M, BC, ST};
 
   return PTM.run();
 }
@@ -441,7 +454,9 @@ PromoteToBindless::createBindlessSurfaceDataportIntrinsicChain(CallInst &CI) {
 
 // Get bindless version of given bti lsc intrinsic.
 static vc::InternalIntrinsic::ID
-getBindlessLscIntrinsicID(vc::InternalIntrinsic::ID IID) {
+getBindlessLscIntrinsicID(vc::InternalIntrinsic::ID IID,
+                          const GenXSubtarget &ST) {
+
 #define MAP(INTR)                                                              \
   case vc::InternalIntrinsic::INTR##_bti:                                      \
     return vc::InternalIntrinsic::INTR##_bss
@@ -468,15 +483,18 @@ getBindlessLscIntrinsicID(vc::InternalIntrinsic::ID IID) {
 // intrinsics. Lsc intrinsics have special addressing mode operand so
 // there is no need to use %bss variable and SSO goes directly to lsc
 // instruction.
-static CallInst *createBindlessLscIntrinsic(CallInst &CI) {
+static CallInst *createBindlessLscIntrinsic(CallInst &CI,
+                                            const GenXSubtarget &ST) {
   const auto ID = vc::InternalIntrinsic::getInternalIntrinsicID(&CI);
-  const auto NewId = getBindlessLscIntrinsicID(ID);
+  const auto NewId = getBindlessLscIntrinsicID(ID, ST);
 
-  auto *Decl = vc::getInternalDeclarationForIdFromArgs(CI.getType(), CI.args(),
+  SmallVector<Value *, 16> Args{CI.args()};
+  IRBuilder<> IRB{&CI};
+
+
+  auto *Decl = vc::getInternalDeclarationForIdFromArgs(CI.getType(), Args,
                                                        NewId, *CI.getModule());
 
-  IRBuilder<> IRB{&CI};
-  SmallVector<Value *, 16> Args{CI.args()};
   return IRB.CreateCall(Decl->getFunctionType(), Decl, Args, CI.getName());
 }
 
@@ -521,7 +539,7 @@ void PromoteToBindless::rewriteBufferIntrinsic(CallInst &CI) {
   case vc::InternalIntrinsic::lsc_prefetch_quad_bti:
   case vc::InternalIntrinsic::lsc_store_bti:
   case vc::InternalIntrinsic::lsc_store_quad_bti:
-    BindlessCI = createBindlessLscIntrinsic(CI);
+    BindlessCI = createBindlessLscIntrinsic(CI, ST);
     break;
   }
 

IGC/VectorCompiler/lib/GenXCodeGen/GenXTargetMachine.cpp

@@ -973,8 +973,8 @@ void GenXTargetMachine::adjustPassManager(PassManagerBuilder &PMBuilder) {
   PMBuilder.addExtension(PassManagerBuilder::EP_EnabledOnOptLevel0, AddCMABI);
 
   // BTI assignment.
-  auto AddBTIAssign = [](const PassManagerBuilder &Builder,
-                         PassManagerBase &PM) {
+  auto AddBTIAssign = [this](const PassManagerBuilder &Builder,
+                             PassManagerBase &PM) {
     PM.add(createGenXBTIAssignmentPass());
   };
   PMBuilder.addExtension(PassManagerBuilder::EP_ModuleOptimizerEarly,

IGC/VectorCompiler/lib/GenXOpts/CMTrans/GenXBTIAssignment.cpp

@@ -30,13 +30,13 @@ SPDX-License-Identifier: MIT
 
 #include "llvmWrapper/ADT/StringRef.h"
 
-#include <llvm/Support/CommandLine.h>
 #include <llvm/ADT/StringRef.h>
 #include <llvm/IR/Function.h>
 #include <llvm/IR/IRBuilder.h>
 #include <llvm/IR/Metadata.h>
 #include <llvm/IR/Module.h>
 #include <llvm/Pass.h>
+#include <llvm/Support/CommandLine.h>
 
 #include <tuple>
 #include <utility>
@@ -51,11 +51,14 @@ static cl::opt<bool> EnforceBTIZeroReservation(
 namespace {
 class BTIAssignment final {
   Module &M;
-  const GenXBackendConfig &BC;
+  const bool emitDebuggableKernels;
+  const bool useBindlessBuffers;
 
 public:
-  BTIAssignment(Module &InM, const GenXBackendConfig &InBC)
-      : M(InM), BC(InBC) {}
+  BTIAssignment(Module &InM, bool InEmitDebuggableKernels,
+                bool InUseBindlessBuffers)
+      : M(InM), emitDebuggableKernels(InEmitDebuggableKernels),
+        useBindlessBuffers(InUseBindlessBuffers) {}
 
   bool run();
 
@@ -79,6 +82,7 @@ class BTIAssignment final {
 };
 
 class GenXBTIAssignment final : public ModulePass {
+
 public:
   static char ID;
 
@@ -111,7 +115,11 @@ ModulePass *createGenXBTIAssignmentPass() {
 
 bool GenXBTIAssignment::runOnModule(Module &M) {
   auto &BC = getAnalysis<GenXBackendConfig>();
-  BTIAssignment BA(M, BC);
+  bool emitDebuggableKernels = BC.emitDebuggableKernelsForLegacyPath();
+  bool useBindlessBuffers = BC.useBindlessBuffers();
+
+
+  BTIAssignment BA(M, emitDebuggableKernels, useBindlessBuffers);
 
   return BA.run();
 }
@@ -212,7 +220,7 @@ std::vector<int> BTIAssignment::computeBTIndices(
   int SurfaceID = 0;
   int SamplerID = 0;
 
-  if (BC.emitDebuggableKernelsForLegacyPath() || EnforceBTIZeroReservation) {
+  if (emitDebuggableKernels || EnforceBTIZeroReservation) {
     // NOTE: at the current moment we don't use BTI=0, since it is reserved
     // for kernel debugging purposes (SIP uses BTI=0 in order to handle
     // breakpoints).
@@ -253,7 +261,7 @@ bool BTIAssignment::rewriteArguments(
       continue;
 
     // For bindless resource argument is ExBSO.
-    if (BC.useBindlessBuffers() && vc::isDescBufferType(Desc))
+    if (useBindlessBuffers && vc::isDescBufferType(Desc))
       continue;
 
     IGC_ASSERT_MESSAGE(BTI >= 0, "unassigned BTI");

IGC/VectorCompiler/test/PromoteToBindless/dataport_reserved_surfaces.ll

@@ -10,6 +10,8 @@
 
 ; RUN: %opt %use_old_pass_manager% -GenXPromoteStatefulToBindless -vc-use-bindless-buffers -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s
 
+target triple = "spir64-unknown-unknown"
+
 declare <8 x i32> @llvm.genx.oword.ld.v8i32(i32, i32, i32)
 
 declare void @sink.v8i32(<8 x i32>)