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IGC refactors and bugfixes part 1/2
Conform to rule of three. Pass arguments to functions as const references. Initialize class members. Iterate using const references. Add `[[fallthrough]]` and `break` to switch statements.
1 parent 78971bc commit d1cc0c7

23 files changed

+81
-41
lines changed

‎IGC/AdaptorCommon/RayTracing/RTBuilder.h

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/*========================== begin_copyright_notice ============================
22
3-
Copyright (C) 2019-2022 Intel Corporation
3+
Copyright (C) 2019-2023 Intel Corporation
44
55
SPDX-License-Identifier: MIT
66
@@ -215,6 +215,8 @@ class RTBuilder : public IGCIRBuilder<>
215215
}
216216

217217
~RTBuilder() {}
218+
RTBuilder(const RTBuilder&) = delete;
219+
RTBuilder& operator=(const RTBuilder&) = delete;
218220

219221

220222
inline Value* get32BitLaneID(void)

‎IGC/AdaptorOCL/SPIRV/SPIRVInternal.h

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/*========================== begin_copyright_notice ============================
22
3-
Copyright (C) 2017-2021 Intel Corporation
3+
Copyright (C) 2017-2023 Intel Corporation
44
55
SPDX-License-Identifier: MIT
66
@@ -920,14 +920,14 @@ Function *getOrCreateFunction(Module *M, Type *RetTy,
920920
std::vector<Value *> getArguments(CallInst* CI);
921921

922922
void decorateSPIRVBuiltin(std::string &S);
923-
void decorateSPIRVBuiltin(std::string &S, std::vector<Type*> ArgTypes);
924-
void decorateSPIRVExtInst(std::string &S, std::vector<Type*> ArgTypes);
923+
void decorateSPIRVBuiltin(std::string &S, const std::vector<Type*>& ArgTypes);
924+
void decorateSPIRVExtInst(std::string &S, const std::vector<Type*>& ArgTypes);
925925

926926
/// Check if a builtin function
927927
bool isFunctionBuiltin(llvm::Function* F);
928928

929929
/// Get a canonical function name for a SPIR-V op code.
930-
std::string getSPIRVBuiltinName(Op OC, SPIRVInstruction *BI, std::vector<Type*> ArgTypes, const std::string& suffix);
930+
std::string getSPIRVBuiltinName(Op OC, SPIRVInstruction *BI, const std::vector<Type*>& ArgTypes, const std::string& suffix);
931931

932932
/// Mutates function call instruction by changing the arguments.
933933
/// \param ArgMutate mutates the function arguments.

‎IGC/AdaptorOCL/SPIRV/SPIRVUtil.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/*========================== begin_copyright_notice ============================
22
3-
Copyright (C) 2017-2021 Intel Corporation
3+
Copyright (C) 2017-2023 Intel Corporation
44
55
SPDX-License-Identifier: MIT
66
@@ -259,12 +259,12 @@ decorateSPIRVBuiltin(std::string &S)
259259
}
260260

261261
void
262-
decorateSPIRVBuiltin(std::string &S, std::vector<Type*> ArgTypes) {
262+
decorateSPIRVBuiltin(std::string &S, const std::vector<Type*>& ArgTypes) {
263263
S.assign(std::string(kLLVMName::builtinPrefix) + Mangler(S,ArgTypes));
264264
}
265265

266266
void
267-
decorateSPIRVExtInst(std::string &S, std::vector<Type*> ArgTypes) {
267+
decorateSPIRVExtInst(std::string &S, const std::vector<Type*>& ArgTypes) {
268268
S.assign(std::string(kLLVMName::builtinExtInstPrefixOpenCL) + Mangler(S,ArgTypes));
269269
}
270270

@@ -274,7 +274,7 @@ isFunctionBuiltin(llvm::Function* F) {
274274
}
275275

276276
std::string
277-
getSPIRVBuiltinName(Op OC, SPIRVInstruction *BI, std::vector<Type*> ArgTypes, const std::string& suffix) {
277+
getSPIRVBuiltinName(Op OC, SPIRVInstruction *BI, const std::vector<Type*>& ArgTypes, const std::string& suffix) {
278278
std::string name = OCLSPIRVBuiltinMap::map(OC);
279279

280280
if (!name.empty()) {

‎IGC/AdaptorOCL/SPIRV/libSPIRV/SPIRVInstruction.h

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/*========================== begin_copyright_notice ============================
22
3-
Copyright (C) 2017-2021 Intel Corporation
3+
Copyright (C) 2017-2023 Intel Corporation
44
55
SPDX-License-Identifier: MIT
66
@@ -382,6 +382,8 @@ class SPIRVInstTemplate:public BT {
382382
init();
383383
}
384384
virtual ~SPIRVInstTemplate(){}
385+
SPIRVInstTemplate(const SPIRVInstTemplate&) = delete;
386+
SPIRVInstTemplate& operator=(const SPIRVInstTemplate&) = delete;
385387
virtual void init() {
386388
this->initImpl(OC, HasId, WC, HasVariableWC, Literal1, Literal2, Literal3);
387389
}
@@ -919,6 +921,7 @@ class SPIRVLoopMerge : public SPIRVInstruction {
919921

920922
SPIRVLoopMerge()
921923
: SPIRVInstruction(OC), MergeBlock(SPIRVID_MAX),
924+
ContinueTarget(SPIRVWORD_MAX),
922925
LoopControl(SPIRVWORD_MAX) {
923926
setHasNoId();
924927
setHasNoType();

‎IGC/AdaptorOCL/SPIRV/libSPIRV/SPIRVModule.cpp

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/*========================== begin_copyright_notice ============================
22
3-
Copyright (C) 2017-2021 Intel Corporation
3+
Copyright (C) 2017-2023 Intel Corporation
44
55
SPDX-License-Identifier: MIT
66
@@ -76,6 +76,8 @@ class SPIRVModuleImpl : public SPIRVModule {
7676
AddrModel = sizeof(size_t) == 32 ? AddressingModelPhysical32 : AddressingModelPhysical64;
7777
};
7878
virtual ~SPIRVModuleImpl();
79+
SPIRVModuleImpl(const SPIRVModuleImpl&) = delete;
80+
SPIRVModuleImpl& operator=(const SPIRVModuleImpl&) = delete;
7981

8082
// Object query functions
8183
bool exist(SPIRVId) const override;

‎IGC/AdaptorOCL/preprocess_spvir/PromoteBools.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/*========================== begin_copyright_notice ============================
22
3-
Copyright (C) 2022 Intel Corporation
3+
Copyright (C) 2022-2023 Intel Corporation
44
55
SPDX-License-Identifier: MIT
66
@@ -543,7 +543,7 @@ void PromoteBools::setPromotedAttributes(Function* newFunction, AttributeList& a
543543
}
544544

545545
attrBuilder.clear();
546-
for (auto attr : IGCLLVM::getParamAttrs(attributeList, i))
546+
for (const auto& attr : IGCLLVM::getParamAttrs(attributeList, i))
547547
{
548548
attrBuilder.addAttribute(getPromoted(attr));
549549
}

‎IGC/Compiler/CISACodeGen/CVariable.hpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/*========================== begin_copyright_notice ============================
22
3-
Copyright (C) 2017-2021 Intel Corporation
3+
Copyright (C) 2017-2023 Intel Corporation
44
55
SPDX-License-Identifier: MIT
66
@@ -205,6 +205,7 @@ namespace IGC {
205205
{
206206
}
207207

208+
~CVariable() = default;
208209
CVariable& operator=(const CVariable&) = delete;
209210

210211
e_alignment GetAlign() const

‎IGC/Compiler/CISACodeGen/CoalescingEngine.hpp

Lines changed: 1 addition & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/*========================== begin_copyright_notice ============================
22
3-
Copyright (C) 2017-2021 Intel Corporation
3+
Copyright (C) 2017-2023 Intel Corporation
44
55
SPDX-License-Identifier: MIT
66
@@ -147,10 +147,6 @@ namespace IGC {
147147
parent.setPointer(this);
148148
}
149149

150-
~ElementNode()
151-
{
152-
}
153-
154150
ElementNode* getLeader();
155151

156152
// Fields:

‎IGC/Compiler/CISACodeGen/EmitVISAPass.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -515,7 +515,7 @@ bool EmitPass::isSymbolTableRequired(llvm::Function* F)
515515
// Check has global symbols attached
516516
else if (!m_moduleMD->inlineProgramScopeOffsets.empty())
517517
{
518-
for (auto it : m_moduleMD->inlineProgramScopeOffsets)
518+
for (const auto& it : m_moduleMD->inlineProgramScopeOffsets)
519519
{
520520
GlobalVariable* pGlobal = it.first;
521521
// Export the symbol if global is external/common linkage
@@ -2774,7 +2774,7 @@ void EmitPass::EmitInsertValueToStruct(InsertValueInst* inst)
27742774
//
27752775
std::list<ArrayRef<unsigned>> toBeCopied;
27762776
getAllDefinedMembers(src0, toBeCopied);
2777-
for (auto II : toBeCopied)
2777+
for (const auto& II : toBeCopied)
27782778
{
27792779
// skip one that will be written by this inst
27802780
auto theIdx = inst->getIndices();
@@ -2941,7 +2941,7 @@ void EmitPass::EmitInsertValueToLayoutStruct(InsertValueInst* IVI)
29412941
// handling here to avoid copy undefined values.
29422942
std::list<ArrayRef<unsigned>> toBeCopied;
29432943
getAllDefinedMembers(src0, toBeCopied);
2944-
for (auto II : toBeCopied)
2944+
for (const auto& II : toBeCopied)
29452945
{
29462946
Type* ty0;
29472947
Type* ty1;

‎IGC/Compiler/CISACodeGen/EmitVISAPass.hpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -883,7 +883,7 @@ class EmitPass : public llvm::FunctionPass
883883
// computation.
884884
CVariable* getOrCreatePerLaneOffsetVariable(unsigned TypeSizeInBytes)
885885
{
886-
for (auto Item : PerLaneOffsetVars)
886+
for (const auto& Item : PerLaneOffsetVars)
887887
{
888888
if (Item.first == TypeSizeInBytes)
889889
{

‎IGC/Compiler/CISACodeGen/EstimateFunctionSize.h

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/*========================== begin_copyright_notice ============================
22
3-
Copyright (C) 2017-2021 Intel Corporation
3+
Copyright (C) 2017-2023 Intel Corporation
44
55
SPDX-License-Identifier: MIT
66
@@ -40,6 +40,8 @@ namespace IGC {
4040

4141
explicit EstimateFunctionSize(AnalysisLevel = AL_Module);
4242
~EstimateFunctionSize();
43+
EstimateFunctionSize(const EstimateFunctionSize&) = delete;
44+
EstimateFunctionSize& operator=(const EstimateFunctionSize&) = delete;
4345
virtual llvm::StringRef getPassName() const override { return "Estimate Function Sizes"; }
4446
void getAnalysisUsage(llvm::AnalysisUsage& AU) const override;
4547
bool runOnModule(llvm::Module& M) override;

‎IGC/Compiler/CISACodeGen/GenCodeGenModule.h

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/*========================== begin_copyright_notice ============================
22
3-
Copyright (C) 2017-2021 Intel Corporation
3+
Copyright (C) 2017-2023 Intel Corporation
44
55
SPDX-License-Identifier: MIT
66
@@ -127,6 +127,9 @@ namespace IGC {
127127
delete F;
128128
}
129129
}
130+
FunctionGroup() = default;
131+
FunctionGroup(const FunctionGroup&) = delete;
132+
FunctionGroup& operator=(const FunctionGroup&) = delete;
130133

131134
/// \brief The entry kernel function of group.
132135
llvm::Function* getHead() const {
@@ -225,6 +228,8 @@ namespace IGC {
225228
static char ID;
226229
explicit GenXFunctionGroupAnalysis();
227230
~GenXFunctionGroupAnalysis() { clear(); }
231+
GenXFunctionGroupAnalysis(const GenXFunctionGroupAnalysis&) = delete;
232+
GenXFunctionGroupAnalysis& operator=(const GenXFunctionGroupAnalysis&) = delete;
228233

229234
virtual llvm::StringRef getPassName() const override { return "FunctionGroup analysis"; }
230235

‎IGC/Compiler/CISACodeGen/LiveVars.hpp

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/*========================== begin_copyright_notice ============================
22
3-
Copyright (C) 2017-2021 Intel Corporation
3+
Copyright (C) 2017-2023 Intel Corporation
44
55
SPDX-License-Identifier: MIT
66
@@ -63,6 +63,8 @@ namespace IGC
6363

6464
LiveVars() {}
6565
~LiveVars();
66+
LiveVars(const LiveVars&) = delete;
67+
LiveVars& operator=(const LiveVars&) = delete;
6668

6769
/// LVInfo - This represents the regions where a virtual register is live in
6870
/// the program. We represent this with three different pieces of

‎IGC/Compiler/CISACodeGen/LivenessAnalysis.hpp

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/*========================== begin_copyright_notice ============================
22
3-
Copyright (C) 2017-2021 Intel Corporation
3+
Copyright (C) 2017-2023 Intel Corporation
44
55
SPDX-License-Identifier: MIT
66
@@ -53,6 +53,8 @@ namespace IGC
5353
}
5454

5555
~LivenessAnalysis();
56+
LivenessAnalysis(const LivenessAnalysis&) = delete;
57+
LivenessAnalysis& operator=(const LivenessAnalysis&) = delete;
5658

5759
// Liveness is computed on demand, by explicitly calling calculate().
5860
// runOnFunction does not calculate it!

‎IGC/Compiler/CISACodeGen/OpenCLKernelCodeGen.hpp

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/*========================== begin_copyright_notice ============================
22
3-
Copyright (C) 2017-2022 Intel Corporation
3+
Copyright (C) 2017-2023 Intel Corporation
44
55
SPDX-License-Identifier: MIT
66
@@ -145,6 +145,8 @@ namespace IGC
145145
friend class CShaderProgram;
146146
COpenCLKernel(OpenCLProgramContext* ctx, llvm::Function*, CShaderProgram* pProgram);
147147
~COpenCLKernel();
148+
COpenCLKernel(const COpenCLKernel&) = delete;
149+
COpenCLKernel& operator=(const COpenCLKernel&) = delete;
148150

149151
void PreCompile() override;
150152
void AllocatePayload() override;

‎IGC/Compiler/CISACodeGen/PayloadMapping.cpp

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/*========================== begin_copyright_notice ============================
22
3-
Copyright (C) 2017-2021 Intel Corporation
3+
Copyright (C) 2017-2023 Intel Corporation
44
55
SPDX-License-Identifier: MIT
66
@@ -413,16 +413,19 @@ void PayloadMapping::ValidateNumberofSources(EOPCODE opCode, bool isCube, uint&
413413
{
414414
case 2:
415415
numberofSrcs++;
416+
[[fallthrough]];
416417
case 3:
417418
numberofSrcs++;
418419
break;
419420
case 5:
420421
numberofSrcs++;
422+
[[fallthrough]];
421423
case 6:
422424
numberofSrcs++;
423425
break;
424426
case 8:
425427
numberofSrcs++;
428+
[[fallthrough]];
426429
case 9:
427430
numberofSrcs++;
428431
break;

‎IGC/Compiler/CISACodeGen/RegisterEstimator.hpp

Lines changed: 14 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/*========================== begin_copyright_notice ============================
22
3-
Copyright (C) 2017-2021 Intel Corporation
3+
Copyright (C) 2017-2023 Intel Corporation
44
55
SPDX-License-Identifier: MIT
66
@@ -114,15 +114,24 @@ namespace IGC
114114
RegUse allUses[REGISTER_CLASS_TOTAL];
115115

116116
RegUsage() { clear(); }
117+
~RegUsage() = default;
117118

118-
RegUsage& operator = (const RegUsage& rhs) {
119-
for (int i = 0; i < REGISTER_CLASS_TOTAL; ++i) {
120-
allUses[(RegClass)i] = rhs.allUses[(RegClass)i];
119+
RegUsage(const RegUsage& copy_value)
120+
{
121+
copy(copy_value);
122+
}
121123

122-
}
124+
RegUsage& operator=(const RegUsage& rhs)
125+
{
126+
copy(rhs);
123127
return *this;
124128
}
125129

130+
void copy(const RegUsage& copy_value)
131+
{
132+
std::copy(copy_value.allUses, copy_value.allUses + REGISTER_CLASS_TOTAL, allUses);
133+
}
134+
126135
void clear()
127136
{
128137
for (int i = 0; i < REGISTER_CLASS_TOTAL; ++i) {

‎IGC/Compiler/CISACodeGen/ShaderCodeGen.hpp

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/*========================== begin_copyright_notice ============================
22
3-
Copyright (C) 2017-2021 Intel Corporation
3+
Copyright (C) 2017-2023 Intel Corporation
44
55
SPDX-License-Identifier: MIT
66
@@ -96,6 +96,8 @@ class CShader
9696

9797
CShader(llvm::Function*, CShaderProgram* pProgram);
9898
virtual ~CShader();
99+
CShader(const CShader&) = delete;
100+
CShader& operator=(const CShader&) = delete;
99101
void Destroy();
100102
virtual void InitEncoder(SIMDMode simdMode, bool canAbortOnSpill, ShaderDispatchMode shaderMode = ShaderDispatchMode::NOT_APPLICABLE);
101103
virtual void PreCompile() {}

‎IGC/Compiler/CISACodeGen/TimeStatsCounter.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/*========================== begin_copyright_notice ============================
22
3-
Copyright (C) 2019-2021 Intel Corporation
3+
Copyright (C) 2019-2023 Intel Corporation
44
55
SPDX-License-Identifier: MIT
66
@@ -36,7 +36,7 @@ namespace {
3636
initializeTimeStatsCounterPass(*PassRegistry::getPassRegistry());
3737
}
3838

39-
TimeStatsCounter(CodeGenContext* _ctx, std::string _igcPass, TimeStatsCounterStartEndMode _mode)
39+
TimeStatsCounter(CodeGenContext* _ctx, const std::string& _igcPass, TimeStatsCounterStartEndMode _mode)
4040
: ModulePass(ID), ctx(_ctx), mode(_mode), igcPass(_igcPass), type(STATS_COUNTER_LLVM_PASS) {
4141
initializeTimeStatsCounterPass(*PassRegistry::getPassRegistry());
4242
}

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