Deprecate vISA_UseSends option

Wei-Chen-Intel · igcbot · commit dcc3a44237e3 · 2023-09-08T01:59:01.000+02:00
Split send is mandatory on Xe+ GPUs and should not be considered something that
could be disabled.
diff --git a/IGC/Compiler/CISACodeGen/CISABuilder.cpp b/IGC/Compiler/CISACodeGen/CISABuilder.cpp
@@ -4495,10 +4495,6 @@ namespace IGC
             SaveOption(vISA_ALTMode, true);
         }
 
-        if (IGC_IS_FLAG_ENABLED(DisableSendS))
-        {
-            SaveOption(vISA_UseSends, false);
-        }
         if (IGC_IS_FLAG_ENABLED(DisablePrefetchToL1Cache)) {
             SaveOption(vISA_DisablePrefetchToL1Cache, true);
         }
diff --git a/IGC/common/igc_regkeys.cpp b/IGC/common/igc_regkeys.cpp
@@ -774,7 +774,6 @@ static void setImpliedIGCKeys()
     IGC_SET_IMPLIED_REGKEY(DisableIGCOptimizations, 1, EnableDeSSA, false);
     //disable now until we figure out the issue
     //IGC_SET_IMPLIED_REGKEY(DisableIGCOptimizations, DisablePayloadCoalescing, true);
-    IGC_SET_IMPLIED_REGKEY(DisableIGCOptimizations, 1, DisableSendS, true);
     IGC_SET_IMPLIED_REGKEY(DisableIGCOptimizations, 1, EnableVISANoSchedule, true);
     IGC_SET_IMPLIED_REGKEY(DisableIGCOptimizations, 1, DisableUniformAnalysis, true);
     IGC_SET_IMPLIED_REGKEY(DisableIGCOptimizations, 1, DisablePushConstant, true);
diff --git a/visa/BuildIR.h b/visa/BuildIR.h
@@ -2280,7 +2280,7 @@ class IR_Builder {
   }
 
   bool useSends() const {
-    return getPlatform() >= GENX_SKL && m_options->getOption(vISA_UseSends) &&
+    return getPlatform() >= GENX_SKL &&
            !(VISA_WA_CHECK(m_pWaTable, WaDisableSendsSrc0DstOverlap));
   }
 
diff --git a/visa/include/VISAOptionsDefs.h b/visa/include/VISAOptionsDefs.h
@@ -191,7 +191,7 @@ DEF_VISA_OPTION(vISA_forceFPMAD, ET_BOOL, "-forcefmad", UNUSED, true)
 DEF_VISA_OPTION(vISA_DisableMixMode, ET_BOOL, "-disableMixMode", UNUSED, false)
 DEF_VISA_OPTION(vISA_DisableHFMath, ET_BOOL, "-disableHFMath", UNUSED, false)
 DEF_VISA_OPTION(vISA_ForceMixMode, ET_BOOL, "-forceMixMode", UNUSED, false)
-DEF_VISA_OPTION(vISA_UseSends, ET_BOOL, "-nosends", UNUSED, true)
+DEF_VISA_OPTION(vISA_UseSends, ET_BOOL, "-nosends", "DEPRECATED, is a nop", true)
 DEF_VISA_OPTION(vISA_doAlign1Ternary, ET_BOOL, "-noalign1ternary", UNUSED, true)
 DEF_VISA_OPTION(vISA_loadThreadPayload, ET_BOOL, "-noLoadPayload", UNUSED, true)
 DEF_VISA_OPTION(vISA_foldEOTtoPrevSend, ET_BOOL, "-foldEOT", UNUSED, false)

Original file line number	Diff line number	Diff line change
`@@ -4495,10 +4495,6 @@ namespace IGC`
`4495`	`4495`	`SaveOption(vISA_ALTMode, true);`
`4496`	`4496`	`}`
`4497`	`4497`
`4498`		`- if (IGC_IS_FLAG_ENABLED(DisableSendS))`
`4499`		`- {`
`4500`		`- SaveOption(vISA_UseSends, false);`
`4501`		`- }`
`4502`	`4498`	`if (IGC_IS_FLAG_ENABLED(DisablePrefetchToL1Cache)) {`
`4503`	`4499`	`SaveOption(vISA_DisablePrefetchToL1Cache, true);`
`4504`	`4500`	`}`
Original file line number	Diff line number	Diff line change
`@@ -2280,7 +2280,7 @@ class IR_Builder {`
`2280`	`2280`	`}`
`2281`	`2281`
`2282`	`2282`	`bool useSends() const {`
`2283`		`- return getPlatform() >= GENX_SKL && m_options->getOption(vISA_UseSends) &&`
	`2283`	`+ return getPlatform() >= GENX_SKL &&`
`2284`	`2284`	`!(VISA_WA_CHECK(m_pWaTable, WaDisableSendsSrc0DstOverlap));`
`2285`	`2285`	`}`
`2286`	`2286`