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anikaushikigcbot
anikaushik
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igcbot
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Minor refactoring for send message instruction and
descriptor construction Minor code changes for send message descriptor and instruction construction for sampler operations.
1 parent 313f59f commit fadd220

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13 files changed

+114
-5
lines changed

13 files changed

+114
-5
lines changed

‎IGC/Compiler/CISACodeGen/CISABuilder.cpp

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2589,7 +2589,8 @@ namespace IGC
25892589
}
25902590

25912591
{
2592-
int status = vKernel->AppendVISA3dSampler(
2592+
int status = -1; //VISA_FAILURE;
2593+
status = vKernel->AppendVISA3dSampler(
25932594
ConvertSubOpcode(subOpcode, zeroLOD),
25942595
feedbackEnable, // pixel null mask
25952596
cpsEnable,
@@ -4919,6 +4920,7 @@ namespace IGC
49194920
SaveOption(vISA_writeCombine, false);
49204921
}
49214922

4923+
49224924
} // InitVISABuilderOptions
49234925

49244926
// Get a unqiue label for inline asm instruction blocks at the module level.

‎IGC/Compiler/CISACodeGen/Platform.hpp

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -106,6 +106,7 @@ bool needsHSBarrierIDWorkaround() const { return m_platformInfo.eRenderCoreFamil
106106
bool supportBindless() const { return m_platformInfo.eRenderCoreFamily >= IGFX_GEN9_CORE; }
107107
bool supportsBindlessSamplers() const { return m_platformInfo.eRenderCoreFamily >= IGFX_GEN10_CORE; }
108108

109+
109110
bool SupportSurfaceInfoMessage() const { return m_platformInfo.eRenderCoreFamily >= IGFX_GEN9_CORE; }
110111
bool SupportHDCUnormFormats() const { return m_platformInfo.eRenderCoreFamily >= IGFX_GEN10_CORE; }
111112
bool localMemFenceSupress() const {

‎visa/BuildCISAIR.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -613,6 +613,7 @@ class CISA_IR_Builder : public VISABuilder
613613
VISA_RawOpnd** params,
614614
int lineNum);
615615

616+
616617
bool CISA_create_sample_instruction(
617618
ISA_Opcode opcode,
618619
ChannelMask channel,

‎visa/BuildIR.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1315,6 +1315,8 @@ class IR_Builder
13151315
G4_InstOpts options, // FIXME: re-order options to follow all operands
13161316
G4_SendDesc *msgDesc,
13171317
bool addToInstList);
1318+
1319+
13181320
G4_InstSend* createInternalSendInst(
13191321
G4_Predicate* prd, G4_opcode op,
13201322
G4_ExecSize execSize,
@@ -2061,6 +2063,7 @@ class IR_Builder
20612063
unsigned int numParms,
20622064
G4_SrcRegRegion ** params);
20632065

2066+
20642067
int translateVISALoad3DInst(
20652068
VISASampler3DSubOpCode actualop,
20662069
bool pixelNullMask,

‎visa/BuildIRImpl.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -747,7 +747,6 @@ void IR_Builder::createBuiltinDecls()
747747
builtinHWTID->setBuiltin();
748748

749749

750-
751750
builtinT252 = createDeclareNoLookup(vISAPreDefSurf[PREDEFINED_SURFACE_T252].name, G4_GRF, 1, 1, Type_UD);
752751
builtinT252->setBuiltin();
753752
builtinBindlessSampler = createDeclareNoLookup("B_S", G4_GRF, 1, 1, Type_UD);
@@ -2067,6 +2066,8 @@ G4_InstSend* IR_Builder::createInternalSendInst(
20672066
// sends (size) dst src0 src1 exDesc msgDesc
20682067
//
20692068

2069+
2070+
20702071
G4_InstSend* IR_Builder::createSplitSendInst(
20712072
G4_Predicate* prd,
20722073
G4_opcode op,

‎visa/CISA.y

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1310,8 +1310,10 @@ SampleInstruction:
13101310
$5, $6, $7, $8, CISAlineno));
13111311
}
13121312

1313+
Sample3dInstruction: Sample3DInstruction
1314+
13131315
// 1 2 3 4 5 6 7 8 9 10 11
1314-
Sample3dInstruction: Predicate SAMPLE_3D_OP PixelNullMaskEnableOpt CPSEnableOpt NonUniformSamplerEnableOpt SAMPLER_CHANNEL ExecSize VecSrcOperand_G_I_IMM Var Var RawOperand
1316+
Sample3DInstruction: Predicate SAMPLE_3D_OP PixelNullMaskEnableOpt CPSEnableOpt NonUniformSamplerEnableOpt SAMPLER_CHANNEL ExecSize VecSrcOperand_G_I_IMM Var Var RawOperand
13151317
// 12
13161318
RawOperandArray
13171319
{
@@ -1323,6 +1325,9 @@ Sample3dInstruction: Predicate SAMPLE_3D_OP PixelNullMaskEnableOpt CPSEnableOpt
13231325
ABORT_ON_FAIL(success);
13241326
}
13251327

1328+
1329+
1330+
13261331
CPSEnableOpt: %empty {$$ = false;} | CPS {$$ = true;}
13271332

13281333
NonUniformSamplerEnableOpt: %empty {$$ = false;} | NON_UNIFORM_SAMPLER {$$ = true;}

‎visa/G4_IR.cpp

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -223,6 +223,7 @@ G4_INST::G4_INST(
223223
G4_Operand* s1,
224224
G4_Operand* s2,
225225
G4_Operand* s3,
226+
G4_Operand* s4,
226227
G4_InstOpts opt) :
227228
op(o), dst(d), predicate(prd), mod(m), option(opt),
228229
useInstList(irb.getAllocator()),
@@ -240,6 +241,7 @@ G4_INST::G4_INST(
240241
srcs[1] = s1;
241242
srcs[2] = s2;
242243
srcs[3] = s3;
244+
srcs[4] = s4;
243245

244246
dead = false;
245247
skipPostRA = false;
@@ -252,6 +254,7 @@ G4_INST::G4_INST(
252254
resetRightBound(s1);
253255
resetRightBound(s2);
254256
resetRightBound(s3);
257+
resetRightBound(s4);
255258
computeRightBound(predicate);
256259
computeRightBound(mod);
257260

@@ -260,6 +263,7 @@ G4_INST::G4_INST(
260263
associateOpndWithInst(s1, this);
261264
associateOpndWithInst(s2, this);
262265
associateOpndWithInst(s3, this);
266+
associateOpndWithInst(s4, this);
263267
associateOpndWithInst(predicate, this);
264268
associateOpndWithInst(mod, this);
265269
}
@@ -299,6 +303,7 @@ G4_InstSend::G4_InstSend(
299303
md->setExecSize(size);
300304
}
301305

306+
302307
void G4_INST::setOpcode(G4_opcode opcd)
303308
{
304309
MUST_BE_TRUE(opcd < G4_NUM_OPCODE &&

‎visa/G4_IR.hpp

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -514,6 +514,22 @@ typedef struct _SWSBInfo
514514
: G4_INST(irb, prd, o, m, s, size, d, s0, s1, s2, nullptr, opt)
515515
{ }
516516

517+
G4_INST(
518+
const IR_Builder& irb,
519+
G4_Predicate* prd,
520+
G4_opcode o,
521+
G4_CondMod* m,
522+
G4_Sat s,
523+
G4_ExecSize size,
524+
G4_DstRegRegion* d,
525+
G4_Operand* s0,
526+
G4_Operand* s1,
527+
G4_Operand* s2,
528+
G4_Operand* s3,
529+
G4_InstOpts opt)
530+
: G4_INST(irb, prd, o, m, s, size, d, s0, s1, s2, s3, nullptr, opt)
531+
{ }
532+
517533
G4_INST(
518534
const IR_Builder& builder,
519535
G4_Predicate* prd,
@@ -526,6 +542,7 @@ typedef struct _SWSBInfo
526542
G4_Operand* s1,
527543
G4_Operand* s2,
528544
G4_Operand* s3,
545+
G4_Operand* s4,
529546
G4_InstOpts opt);
530547

531548
virtual ~G4_INST()
@@ -1519,6 +1536,7 @@ class G4_InstSend : public G4_INST
15191536
G4_InstOpts opt,
15201537
G4_SendDesc* md);
15211538

1539+
15221540
G4_INST* cloneInst() override;
15231541

15241542
bool isSendc() const { return op == G4_sendc || op == G4_sendsc; }

‎visa/G4_Opcode.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -11,7 +11,7 @@ SPDX-License-Identifier: MIT
1111
#include "visa_igc_common_header.h"
1212
#include "common.h"
1313

14-
#define G4_MAX_SRCS 4
14+
#define G4_MAX_SRCS 5
1515
#define G4_MAX_INTRINSIC_SRCS 8
1616
#define UNDEFINED_VAL 0xFFFFFFFF
1717
#define UNDEFINED_SHORT 0x8000

‎visa/G4_SendDescs.cpp

Lines changed: 47 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -63,6 +63,33 @@ std::string vISA::ToSymbol(MsgOp op)
6363
return "???";
6464
}
6565

66+
MsgOp vISA::ConvertSamplerOpToMsgOp (VISASampler3DSubOpCode op) {
67+
switch (op) {
68+
case VISASampler3DSubOpCode::VISA_3D_SAMPLE:
69+
return MsgOp::SAMPLE;
70+
case VISASampler3DSubOpCode::VISA_3D_SAMPLE_B:
71+
return MsgOp::SAMPLE_B;
72+
case VISASampler3DSubOpCode::VISA_3D_SAMPLE_L:
73+
return MsgOp::SAMPLE_L;
74+
case VISASampler3DSubOpCode::VISA_3D_SAMPLE_C:
75+
return MsgOp::SAMPLE_C;
76+
case VISASampler3DSubOpCode::VISA_3D_SAMPLE_D:
77+
return MsgOp::SAMPLE_D;
78+
case VISASampler3DSubOpCode::VISA_3D_SAMPLE_B_C:
79+
return MsgOp::SAMPLE_B_C;
80+
case VISASampler3DSubOpCode::VISA_3D_SAMPLE_L_C:
81+
return MsgOp::SAMPLE_L_C;
82+
case VISASampler3DSubOpCode::VISA_3D_SAMPLE_D_C:
83+
return MsgOp::SAMPLE_D_C;
84+
case VISASampler3DSubOpCode::VISA_3D_SAMPLE_LZ:
85+
return MsgOp::SAMPLE_LZ;
86+
case VISASampler3DSubOpCode::VISA_3D_SAMPLE_C_LZ:
87+
return MsgOp::SAMPLE_C_LZ;
88+
default:
89+
return MsgOp::INVALID;
90+
}
91+
}
92+
6693
MsgOp vISA::ConvertLSCOpToMsgOp(LSC_OP op) {
6794
switch(op) {
6895
case LSC_OP::LSC_LOAD:
@@ -118,8 +145,27 @@ MsgOp vISA::ConvertLSCOpToMsgOp(LSC_OP op) {
118145
}
119146
}
120147

148+
uint32_t vISA::GetSamplerMsgOpEncoding(MsgOp m) {
149+
switch(m) {
150+
case MsgOp::SAMPLE: return 0;
151+
case MsgOp::SAMPLE_B: return 1;
152+
case MsgOp::SAMPLE_L: return 2;
153+
case MsgOp::SAMPLE_C: return 3;
154+
case MsgOp::SAMPLE_D: return 4;
155+
case MsgOp::SAMPLE_B_C: return 5;
156+
case MsgOp::SAMPLE_L_C: return 6;
157+
case MsgOp::SAMPLE_D_C: return 20;
158+
case MsgOp::SAMPLE_LZ: return 24;
159+
case MsgOp::SAMPLE_C_LZ: return 25;
160+
case MsgOp::GATHER4: return 8;
161+
case MsgOp::GATHER4_L: return 13;
162+
case MsgOp::GATHER4_B: return 14;
163+
default: MUST_BE_TRUE(false, "Invalid msg op");
164+
}
165+
return 0;
166+
}
167+
121168
uint32_t vISA::GetMsgOpEncoding(MsgOp m) {
122-
// source -- https://gfxspecs.intel.com/Predator/Home/Index/71890
123169
switch(m) {
124170
case MsgOp::LOAD: return 0;
125171
case MsgOp::LOAD_QUAD: return 2;

‎visa/G4_SendDescs.hpp

Lines changed: 24 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -28,6 +28,8 @@ enum class SendAccess
2828
static const int MSGOP_BUFFER_LOAD_GROUP = 0x100;
2929
static const int MSGOP_BUFFER_STORE_GROUP = 0x200;
3030
static const int MSGOP_BUFFER_ATOMIC_GROUP = 0x400;
31+
static const int MSGOP_SAMPLE_GROUP = 0x600;
32+
static const int MSGOP_GATHER_GROUP = 0x800;
3133
static const int MSGOP_OTHER_GROUP = 0x800;
3234
//
3335
// various message operations
@@ -82,10 +84,32 @@ enum class MsgOp {
8284
BARRIER,
8385
NBARRIER,
8486
EOT,
87+
SAMPLE_GROUP = MSGOP_SAMPLE_GROUP + 1,
88+
SAMPLE,
89+
SAMPLE_B,
90+
SAMPLE_L,
91+
SAMPLE_C,
92+
SAMPLE_D,
93+
SAMPLE_B_C,
94+
SAMPLE_L_C,
95+
SAMPLE_KILLPIX,
96+
SAMPLE_D_C,
97+
SAMPLE_LZ,
98+
SAMPLE_C_LZ,
99+
GATHER_GROUP = MSGOP_GATHER_GROUP + 1,
100+
GATHER4,
101+
GATHER4_L,
102+
GATHER4_B,
103+
GATHER4_I,
104+
GATHER4_I_C,
105+
GATHER4_L_C,
106+
GATHER4_C,
85107
};
86108
std::string ToSymbol(MsgOp);
87109
uint32_t GetMsgOpEncoding(MsgOp);
110+
uint32_t GetSamplerMsgOpEncoding(MsgOp);
88111
MsgOp ConvertLSCOpToMsgOp(LSC_OP op);
112+
MsgOp ConvertSamplerOpToMsgOp(VISASampler3DSubOpCode op);
89113

90114
enum class LdStOrder {
91115
INVALID = 0,

‎visa/VISAKernelImpl.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -5651,6 +5651,7 @@ int VISAKernelImpl::AppendVISA3dSamplerMsgGeneric(
56515651
return status;
56525652
}
56535653

5654+
56545655
int VISAKernelImpl::AppendVISA3dSampler(
56555656
VISASampler3DSubOpCode subOpcode,
56565657
bool pixelNullMask,
@@ -5686,6 +5687,7 @@ int VISAKernelImpl::AppendVISA3dSampler(
56865687
opndArray);
56875688
}
56885689

5690+
56895691
int VISAKernelImpl::AppendVISA3dLoad(
56905692
VISASampler3DSubOpCode subOpcode,
56915693
bool pixelNullMask,

‎visa/VisaToG4/TranslateSend3D.cpp

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1963,6 +1963,7 @@ int IR_Builder::translateVISASampler3DInst(
19631963
return VISA_SUCCESS;
19641964
}
19651965

1966+
19661967
int IR_Builder::translateVISALoad3DInst(
19671968
VISASampler3DSubOpCode actualop,
19681969
bool pixelNullMask,

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