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// Tests various binary operations applied to simd objects.
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// TODO
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- // Arithmetic operations behaviour depends on Gen's control regiter 's rounding
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+ // Arithmetic operations behaviour depends on Gen's control register 's rounding
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// mode, which is RTNE by default:
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// cr0.5:4 is 00b = Round to Nearest or Even (RTNE)
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- // For half this leads to divergence between Gen and host (emulated) results
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- // larger than certain threshold. Might need to tune the cr0 once this feature
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- // is available in ESIMD.
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+ // For half and tfloat32 this leads to divergence between Gen and host
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+ // (emulated) results larger than certain threshold. Might need to tune the cr0
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+ // once this feature is available in ESIMD.
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//
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#include " ../esimd_test_utils.hpp"
@@ -286,16 +286,15 @@ int main(void) {
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passed &= test<half, bfloat16, 7 , BinOp, VEfa, IDf>(arith_ops, q, 0.03 );
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#endif // USE_BF16
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#ifdef USE_TF32
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- passed &= test<tfloat32, float , 32 , BinOp, VEf , IDf>(arith_ops, q, 0 .000001f );
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+ passed &= test<tfloat32, float , 32 , BinOp, VEfa , IDf>(arith_ops, q, 0 .001f );
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passed &=
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- test<tfloat32, tfloat32, 32 , BinOp, VEf , IDf>(arith_ops, q, 0 .000001f );
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- passed &= test<char , tfloat32, 32 , BinOp, VEf , IDf>(arith_ops, q, 0 .000001f );
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+ test<tfloat32, tfloat32, 32 , BinOp, VEfa , IDf>(arith_ops, q, 0 .001f );
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+ passed &= test<char , tfloat32, 32 , BinOp, VEfa , IDf>(arith_ops, q, 0 .001f );
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if (SupportsHalf)
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- passed &=
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- test<tfloat32, half, 32 , BinOp, VEf, IDf>(arith_ops, q, 0 .000001f );
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- passed &= test<tfloat32, unsigned char , 32 , BinOp, VEf, IDf>(arith_ops, q,
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- 0 .000001f );
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- passed &= test<tfloat32, short , 32 , BinOp, VEf, IDf>(arith_ops, q, 0 .000001f );
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+ passed &= test<tfloat32, half, 32 , BinOp, VEfa, IDf>(arith_ops, q, 0 .001f );
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+ passed &=
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+ test<tfloat32, unsigned char , 32 , BinOp, VEfa, IDf>(arith_ops, q, 0 .001f );
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+ passed &= test<tfloat32, short , 32 , BinOp, VEfa, IDf>(arith_ops, q, 0 .001f );
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#endif // USE_TF32
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// Test division separately, as error probability is higher.
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auto div_op = esimd_test::BinaryOpSeq<BinOp::div>{};
@@ -322,14 +321,14 @@ int main(void) {
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#endif // USE_BF16
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#ifdef USE_TF32
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- passed &= test<tfloat32, float , 32 , BinOp, VEf, IDf>(div_op, q, 0 .000001f );
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- passed &= test<tfloat32, tfloat32, 32 , BinOp, VEf, IDf>(div_op, q, 0 .000001f );
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- passed &= test<char , tfloat32, 32 , BinOp, VEf, IDf>(div_op, q, 0 .000001f );
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+ passed &= test<tfloat32, float , 32 , BinOp, VEf, IDf>(div_op, q, 0 .001f );
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+ passed &= test<tfloat32, tfloat32, 32 , BinOp, VEf, IDf>(div_op, q, 0 .001f );
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+ passed &= test<char , tfloat32, 32 , BinOp, VEf, IDf>(div_op, q, 0 .001f );
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if (SupportsHalf)
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- passed &= test<tfloat32, half, 32 , BinOp, VEf, IDf>(div_op, q, 0 .000001f );
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+ passed &= test<tfloat32, half, 32 , BinOp, VEf, IDf>(div_op, q, 0 .001f );
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passed &=
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- test<tfloat32, unsigned char , 32 , BinOp, VEf, IDf>(div_op, q, 0 .000001f );
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- passed &= test<tfloat32, short , 32 , BinOp, VEf, IDf>(div_op, q, 0 .000001f );
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+ test<tfloat32, unsigned char , 32 , BinOp, VEf, IDf>(div_op, q, 0 .001f );
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+ passed &= test<tfloat32, short , 32 , BinOp, VEf, IDf>(div_op, q, 0 .001f );
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#endif // USE_TF32
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auto int_ops = esimd_test::IntBinaryOpsNoShiftNoDivRem;
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