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[SYCL] Move more intel/llvm in-tree tests to test-suite (#1269)
isordered.cpp and mad_sat.cpp from intel/llvm require devices to be available for testing, which is no longer allowed. This commit moves these tests to the test-suite. Signed-off-by: Larsen, Steffen <[email protected]>
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SYCL/Regression/isordered.cpp

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// RUN: %clangxx -fsycl -fsycl-targets=%sycl_triple %s -o %t.out
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// RUNx: %CPU_RUN_PLACEHOLDER %t.out
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// RUNx: %GPU_RUN_PLACEHOLDER %t.out
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// RUNx: %ACC_RUN_PLACEHOLDER %t.out
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#include <sycl/sycl.hpp>
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int main() {
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sycl::range<1> ndRng(3);
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int32_t kernelResult[3];
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sycl::queue testQueue;
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{
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sycl::buffer<int32_t, 1> buffer(&kernelResult[0], ndRng);
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testQueue.submit([&](sycl::handler &h) {
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auto resultPtr = buffer.template get_access<sycl::access::mode::write>(h);
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h.single_task<class kernel>([=]() {
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float inputData_0F(0.1);
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float inputData_1F(0.5);
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resultPtr[0] = sycl::isordered(inputData_0F, inputData_1F);
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double inputData_0D(0.2);
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double inputData_1D(0.3);
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resultPtr[1] = sycl::isordered(inputData_0D, inputData_1D);
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sycl::half inputData_0H(0.3);
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sycl::half inputData_1H(0.9);
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resultPtr[2] = sycl::isordered(inputData_0H, inputData_1H);
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});
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});
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}
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// Should be 1 according to spec since it's a scalar type not a vector
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assert(kernelResult[0] == 1 && "Incorrect result");
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assert(kernelResult[1] == 1 && "Incorrect result");
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assert(kernelResult[2] == 1 && "Incorrect result");
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return 0;
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}

SYCL/Regression/mad_sat.cpp

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// RUN: %clangxx -fsycl -fsycl-targets=%sycl_triple %s -o %t.out
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// RUNx: %CPU_RUN_PLACEHOLDER %t.out
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// RUNx: %GPU_RUN_PLACEHOLDER %t.out
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// RUNx: %ACC_RUN_PLACEHOLDER %t.out
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#include <sycl/sycl.hpp>
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int main() {
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sycl::queue testQueue;
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{
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const sycl::longlong3 verification3(
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9223372036854775807LL, 9223372036854775807LL, -9223372036854775808LL);
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sycl::longlong3 inputData_0(1152105081885725616LL, 8383539663869980295LL,
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-3013159033463244495LL);
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sycl::longlong3 inputData_1(9169239286331099647LL, 8545168655265359544LL,
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69290337040907021LL);
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sycl::longlong3 inputData_2(-5670250901301018333LL, 216462155376518854LL,
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-7910909987096217335LL);
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sycl::buffer<sycl::longlong3, 1> buffer(1);
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testQueue.submit([&](sycl::handler &h) {
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auto resultPtr = buffer.template get_access<sycl::access::mode::write>(h);
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h.single_task<class k3>([=]() {
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resultPtr[0] = sycl::mad_sat(inputData_0, inputData_1, inputData_2);
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});
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});
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const auto HostAccessor = buffer.get_access<sycl::access::mode::read>();
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for (int i = 0; i < 3; i++)
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assert((HostAccessor[0][i] == verification3[i]) && "Incorrect result");
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}
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{
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const sycl::longlong4 verification4(
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9223372036854775807LL, 9223372036854775807LL, -9223372036854775808LL,
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9223372036854775807LL);
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sycl::longlong4 inputData_0(-4713774672458165250LL, 7161321293740295698LL,
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-7560042360032818022LL, 1712118953348815386LL);
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sycl::longlong4 inputData_1(-5256951628950351348LL, 3094294642897896981LL,
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4183324171724765944LL, 1726930751531248453LL);
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sycl::longlong4 inputData_2(-614349234816759997LL, -7793620271163345724LL,
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5480991826433743823LL, -3977840325478979484LL);
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sycl::buffer<sycl::longlong4, 1> buffer(1);
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testQueue.submit([&](sycl::handler &h) {
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auto resultPtr = buffer.template get_access<sycl::access::mode::write>(h);
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h.single_task<class k4>([=]() {
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resultPtr[0] = sycl::mad_sat(inputData_0, inputData_1, inputData_2);
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});
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});
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const auto HostAccessor = buffer.get_access<sycl::access::mode::read>();
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for (int i = 0; i < 4; i++)
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assert((HostAccessor[0][i] == verification4[i]) && "Incorrect result");
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}
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{
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const sycl::longlong8 verification8(
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9223372036854775807LL, 9223372036854775807LL, -9223372036854775808LL,
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-9223372036854775808LL, 9223372036854775807LL, 9223372036854775807LL,
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-9223372036854775808LL, -9223372036854775808LL);
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sycl::longlong8 inputData_0(3002837817109371705LL, -6132505093056073745LL,
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-2677806413031023542LL, -3906932152445696896LL,
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-5966911996430888011LL, 487233493241732294LL,
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8234534527416862935LL, 8302379558520488989LL);
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sycl::longlong8 inputData_1(3895748400226584336LL, -3171989754828069475LL,
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6135091761884568657LL, 3449810579449494485LL,
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-5153085649597103327LL, 2036067225828737775LL,
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-2456339276147680058LL, -2321401317481120691LL);
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sycl::longlong8 inputData_2(5847800471474896191LL, 6421268696360310080LL,
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426131359031594004LL, 3388848179800138438LL,
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9095634920776267157LL, 3909069092545608647LL,
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-6551917618131929798LL, -5283018165188606431LL);
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sycl::buffer<sycl::longlong8, 1> buffer(1);
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testQueue.submit([&](sycl::handler &h) {
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auto resultPtr = buffer.template get_access<sycl::access::mode::write>(h);
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h.single_task<class k8>([=]() {
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resultPtr[0] = sycl::mad_sat(inputData_0, inputData_1, inputData_2);
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});
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});
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const auto HostAccessor = buffer.get_access<sycl::access::mode::read>();
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for (int i = 0; i < 8; i++)
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assert((HostAccessor[0][i] == verification8[i]) && "Incorrect result");
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}
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{
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const sycl::longlong16 verification16(
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-9223372036854775808LL, 9223372036854775807LL, 9223372036854775807LL,
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-9223372036854775808LL, 9223372036854775807LL, 9223372036854775807LL,
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9223372036854775807LL, 9223372036854775807LL, 9223372036854775807LL,
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9223372036854775807LL, -9223372036854775808LL, 9223372036854775807LL,
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-9223372036854775808LL, 9223372036854775807LL, -9223372036854775808LL,
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-9223372036854775808LL);
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sycl::longlong16 inputData_0(
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4711072418277000515LL, -8205098172692021203LL, -7385016145788992368LL,
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5953521028589173909LL, -5219240995491769312LL, 8710496141913755416LL,
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-6685846261491268433LL, 4193173269411595542LL, -8540195959022520771LL,
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-4715465363106336895LL, -1020086937442724783LL, 4496316677230042947LL,
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1321442475247578017LL, -7374746170855359764LL, -3206370806055241163LL,
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-2175226063524462053LL);
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sycl::longlong16 inputData_1(
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-9126728881985856159LL, -8235441378758843293LL, -3529617622861997052LL,
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-4696495345590499183LL, -2446014787831249326LL, 3966377959819902357LL,
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-8707315735766590681LL, 4940281453308003965LL, -4008494233289413829LL,
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-1007875458987895243LL, 8007184939842565626LL, 7006363475270750393LL,
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-3126435375497361798LL, -2666957213164527889LL, 3425215156535282625LL,
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5057359883753713949LL);
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sycl::longlong16 inputData_2(
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-5792361016316836568LL, 1155364222481085809LL, 7552404711758320408LL,
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-9123476257323872288LL, -924920183965907175LL, 1921314238201973170LL,
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3462681782260196063LL, 7822120358287768333LL, -3130033938219713817LL,
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-3165995450630991604LL, -7647706888277832178LL, -8427901934971949821LL,
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4207763935319579681LL, 1564279736903158695LL, 3722632463806041635LL,
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939009161285897285LL);
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sycl::buffer<sycl::longlong16, 1> buffer(1);
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testQueue.submit([&](sycl::handler &h) {
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auto resultPtr = buffer.template get_access<sycl::access::mode::write>(h);
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h.single_task<class k16>([=]() {
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resultPtr[0] = sycl::mad_sat(inputData_0, inputData_1, inputData_2);
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});
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});
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const auto HostAccessor = buffer.get_access<sycl::access::mode::read>();
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for (int i = 0; i < 16; i++)
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assert((HostAccessor[0][i] == verification16[i]) && "Incorrect result");
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}
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}

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