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SYCL/ESIMD/regression/half_conversion_test.cpp

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -11,9 +11,9 @@
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//
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//===----------------------------------------------------------------------===//
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#include <CL/sycl.hpp>
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#include <stdlib.h>
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#include <sycl/ext/intel/esimd.hpp>
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#include <sycl/sycl.hpp>
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#include <iostream>
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@@ -22,7 +22,6 @@ using namespace ::sycl::ext;
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using namespace sycl::ext::intel;
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using namespace sycl::ext::intel::esimd;
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template <typename Ty> struct test_id;
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template <int N>
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using int_type_t = std::conditional_t<
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N == 1, int8_t,
@@ -44,7 +43,7 @@ template <class Ty> bool test(queue q, int inc) {
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<< q.get_device().get_info<::sycl::info::device::name>()
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<< "\n";
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auto acc = buf.template get_access<access::mode::read_write>(cgh);
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cgh.single_task<test_id<Ty>>([=]() SYCL_ESIMD_KERNEL {
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cgh.single_task([=]() SYCL_ESIMD_KERNEL {
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simd<uint32_t, 1> offsets(0);
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simd<Ty, 1> vec = gather<Ty, 1>(acc, offsets);
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vec[0] += (Ty)inc;

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