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[SYCL] Check for aspect::fp64 in ESIMD/api/*ops_heavy.cpp #1248

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Sep 13, 2022
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[SYCL] Check for aspect::fp64 in ESIMD/api/*ops_heavy.cpp #1248

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20 changes: 13 additions & 7 deletions SYCL/ESIMD/api/bin_and_cmp_ops_heavy.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@
// Exclude PVC not to run same test cases twice (via the *_pvc.cpp variant).
// REQUIRES: gpu && !gpu-intel-pvc
// UNSUPPORTED: cuda || hip
// RUN: %clangxx -fsycl %s -o %t.out
// RUN: %clangxx -fsycl-device-code-split=per_kernel -fsycl %s -o %t.out
// RUN: %GPU_RUN_PLACEHOLDER %t.out

// Tests various binary operations applied to simd objects.
Expand Down Expand Up @@ -266,11 +266,13 @@ int main(void) {
auto arith_ops = esimd_test::ArithBinaryOpsNoDiv;
passed &= test<unsigned char, int, 1, BinOp, VSf, IDf>(arith_ops, q);
passed &= test<char, float, 7, BinOp, VEf, IDf>(arith_ops, q, 0.000001f);
passed &= test<short, double, 7, BinOp, VEf, IDf>(arith_ops, q, 1e-15);
if (dev.has(aspect::fp64))
passed &= test<short, double, 7, BinOp, VEf, IDf>(arith_ops, q, 1e-15);
passed &= test<float, float, 32, BinOp, VEf, IDf>(arith_ops, q, 0.000001f);
passed &= test<half, char, 1, BinOp, verify_n, IDf>(arith_ops, q, 1);
passed &= test<half, unsigned int, 32, BinOp, VSf, IDf>(arith_ops, q, 1);
passed &= test<double, half, 7, BinOp, VSf, IDf>(arith_ops, q);
if (dev.has(aspect::fp64))
passed &= test<double, half, 7, BinOp, VSf, IDf>(arith_ops, q);
Comment on lines +274 to +275
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I think, this code should check for both fp64 and fp16

passed &= test<short, uint64_t, 7, BinOp, VSf, IDf>(arith_ops, q);
#ifdef USE_BF16
passed &= test<bfloat16, int, 8, BinOp, VSf, IDf>(arith_ops, q);
Expand All @@ -282,13 +284,15 @@ int main(void) {
passed &= test<unsigned char, int, 1, BinOp, VSf, IDf>(div_op, q);
passed &= test<char, float, 7, BinOp, VEf, IDf>(div_op, q, 0.000001f);
#ifndef WA_BUG
passed &= test<short, double, 7, BinOp, VSf, IDf>(div_op, q);
if (dev.has(aspect::fp64))
passed &= test<short, double, 7, BinOp, VSf, IDf>(div_op, q);
#endif // WA_BUG
passed &= test<float, float, 32, BinOp, VEf, IDf>(div_op, q, 0.000001f);
passed &= test<half, char, 1, BinOp, verify_n, IDf>(div_op, q, 1);
passed &= test<half, unsigned int, 32, BinOp, VSf, IDf>(div_op, q, 1);
Comment on lines 291 to 292
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Would you please add check for fp16?

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I'd rather do it in a different PR. Fp64 is way more urgent because our CI is broken.

#ifndef WA_BUG
passed &= test<double, half, 7, BinOp, VSf, IDf>(div_op, q);
if (dev.has(aspect::fp64))
passed &= test<double, half, 7, BinOp, VSf, IDf>(div_op, q);
#endif // WA_BUG
passed &= test<short, uint64_t, 7, BinOp, VSf, IDf>(div_op, q);
#ifdef USE_BF16
Expand Down Expand Up @@ -327,11 +331,13 @@ int main(void) {
auto cmp_ops = esimd_test::CmpOps;
passed &= test<unsigned char, int, 1, CmpOp, VSf, IDf>(cmp_ops, q);
passed &= test<char, float, 7, CmpOp, VSf, IDf>(cmp_ops, q);
passed &= test<short, double, 7, CmpOp, VSf, IDf>(cmp_ops, q);
if (dev.has(aspect::fp64))
passed &= test<short, double, 7, CmpOp, VSf, IDf>(cmp_ops, q);
passed &= test<float, float, 32, CmpOp, VSf, IDf>(cmp_ops, q);
passed &= test<half, char, 1, CmpOp, VSf, IDf>(cmp_ops, q, 1);
passed &= test<half, unsigned int, 32, CmpOp, VSf, IDf>(cmp_ops, q, 1);
passed &= test<double, half, 7, CmpOp, VSf, IDf>(cmp_ops, q);
if (dev.has(aspect::fp64))
passed &= test<double, half, 7, CmpOp, VSf, IDf>(cmp_ops, q);
passed &= test<short, uint64_t, 7, CmpOp, VSf, IDf>(cmp_ops, q);
#ifdef USE_BF16
passed &= test<bfloat16, int, 32, CmpOp, VSf, IDf>(cmp_ops, q);
Expand Down
8 changes: 5 additions & 3 deletions SYCL/ESIMD/api/unary_ops_heavy.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@
// Exclude PVC not to run same test cases twice (via the *_pvc.cpp variant).
// REQUIRES: gpu && !gpu-intel-pvc
// UNSUPPORTED: cuda || hip
// RUN: %clangxx -fsycl %s -o %t.out
// RUN: %clangxx -fsycl-device-code-split=per_kernel -fsycl %s -o %t.out
// RUN: %GPU_RUN_PLACEHOLDER %t.out

// Tests various unary operations applied to simd objects.
Expand Down Expand Up @@ -174,7 +174,8 @@ int main(void) {
passed &= test<half, 1>(mod_ops, q);
passed &= test<half, 32>(mod_ops, q);
passed &= test<float, 32>(mod_ops, q);
passed &= test<double, 7>(mod_ops, q);
if (dev.has(aspect::fp64))
passed &= test<double, 7>(mod_ops, q);

auto signed_ops = esimd_test::OpSeq<UnOp, UnOp::minus, UnOp::plus>{};
passed &= test<char, 7>(signed_ops, q);
Expand All @@ -183,7 +184,8 @@ int main(void) {
passed &= test<int64_t, 16>(signed_ops, q);
passed &= test<half, 16>(signed_ops, q);
passed &= test<float, 16>(signed_ops, q);
passed &= test<double, 16>(signed_ops, q);
if (dev.has(aspect::fp64))
passed &= test<double, 16>(signed_ops, q);

#ifdef USE_BF16
// TODO: the rest unary operations are not yet supported for bfloat16 on host.
Expand Down