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AaronBallmanAaronBallman
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Merge remote-tracking branch 'upstream/sycl' into cc1-options
2 parents 71dab23 + 98505e4 commit 0592fed

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‎.github/workflows/linux_post_commit.yml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,7 @@ on:
66
- sycl
77
jobs:
88
check:
9-
runs-on: ubuntu-latest
9+
runs-on: ubuntu-18.04
1010
strategy:
1111
fail-fast: false
1212
matrix:

‎buildbot/dependency.conf

Lines changed: 19 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -1,11 +1,11 @@
11
[VERSIONS]
2-
# https://github.com/intel/llvm/releases/download/2020-WW45/oclcpuexp-2020.11.11.0.04_rel.tar.gz
3-
ocl_cpu_rt_ver=2020.11.11.0.04
4-
# https://github.com/intel/llvm/releases/download/2020-WW45/win-oclcpuexp-2020.11.11.0.04_rel.zip
5-
ocl_cpu_rt_ver_win=2020.11.11.0.04
2+
# https://github.com/intel/llvm/releases/download/2021-WW10/oclcpuexp-2021.11.3.0.02_rel.tar.gz
3+
ocl_cpu_rt_ver=2021.11.3.0.02
4+
# https://github.com/intel/llvm/releases/download/2021-WW10/win-oclcpuexp-2021.11.3.0.02_rel.zip
5+
ocl_cpu_rt_ver_win=2021.11.3.0.02
66
# Same GPU driver supports Level Zero and OpenCL
7-
# https://github.com/intel/compute-runtime/releases/tag/21.07.19042
8-
ocl_gpu_rt_ver=21.07.19042
7+
# https://github.com/intel/compute-runtime/releases/tag/21.08.19096
8+
ocl_gpu_rt_ver=21.08.19096
99
# Same GPU driver supports Level Zero and OpenCL
1010
# https://downloadmirror.intel.com/30148/a08/igfx_win10_100.9168.zip
1111
ocl_gpu_rt_ver_win=27.20.100.9168
@@ -15,25 +15,25 @@ intel_sycl_ver=build
1515
# https://github.com/oneapi-src/oneTBB/blob/master/cmake/README.md
1616
# or downloaded using links below:
1717
# https://github.com/oneapi-src/oneTBB/releases/download/v2021.1.1/oneapi-tbb-2021.1.1-lin.tgz
18-
tbb_ver=2021.1.053
18+
tbb_ver=2021.2.0.236
1919
# https://github.com/oneapi-src/oneTBB/releases/download/v2021.1.1/oneapi-tbb-2021.1.1-win.zip
20-
tbb_ver_win=2021.1.049
20+
tbb_ver_win=2021.2.0.221
2121

22-
# https://github.com/intel/llvm/releases/download/2020-WW45/fpgaemu-2020.11.11.0.04_rel.tar.gz
23-
ocl_fpga_emu_ver=2020.11.11.0.04
24-
# https://github.com/intel/llvm/releases/download/2020-WW45/win-fpgaemu-2020.11.11.0.04_rel.zip
25-
ocl_fpga_emu_ver_win=2020.11.11.0.04
26-
fpga_ver=20201021_000005
27-
fpga_ver_win=20201022_000005
22+
# https://github.com/intel/llvm/releases/download/2021-WW10/fpgaemu-2021.11.3.0.02_rel.tar.gz
23+
ocl_fpga_emu_ver=2021.11.3.0.02
24+
# https://github.com/intel/llvm/releases/download/2021-WW10/win-fpgaemu-2021.11.3.0.02_rel.zip
25+
ocl_fpga_emu_ver_win=2021.11.3.0.02
26+
fpga_ver=20210205_000005
27+
fpga_ver_win=20210204_000003_signed_bom_fixed
2828
ocloc_ver_win=27.20.100.9168
2929

3030
[DRIVER VERSIONS]
31-
cpu_driver_lin=2020.11.11.0.04
32-
cpu_driver_win=2020.11.11.0.04
33-
gpu_driver_lin=21.07.19042
31+
cpu_driver_lin=2021.11.3.0.02
32+
cpu_driver_win=2021.11.3.0.02
33+
gpu_driver_lin=21.08.19096
3434
gpu_driver_win=27.20.100.9168
35-
fpga_driver_lin=2020.11.11.0.04
36-
fpga_driver_win=2020.11.11.0.04
35+
fpga_driver_lin=2021.11.3.0.02
36+
fpga_driver_win=2021.11.3.0.02
3737
# NVidia CUDA driver
3838
# TODO provide URL for CUDA driver
3939
nvidia_gpu_driver_lin=435.21

‎llvm/tools/sycl-post-link/CMakeLists.txt

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -21,7 +21,7 @@ add_llvm_tool(sycl-post-link
2121
sycl-post-link.cpp
2222
SPIRKernelParamOptInfo.cpp
2323
SpecConstants.cpp
24-
24+
SYCLDeviceLibReqMask.cpp
2525
ADDITIONAL_HEADER_DIRS
2626
${LLVMGenXIntrinsics_SOURCE_DIR}/GenXIntrinsics/include
2727
${LLVMGenXIntrinsics_BINARY_DIR}/GenXIntrinsics/include

‎llvm/tools/sycl-post-link/SYCLDeviceLibReqMask.cpp

Lines changed: 203 additions & 0 deletions
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1+
//==----- SYCLDeviceLibReqMask.cpp - get SYCL devicelib required Info ------==//
2+
//
3+
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4+
// See https://llvm.org/LICENSE.txt for license information.
5+
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6+
//
7+
//===----------------------------------------------------------------------===//
8+
//
9+
// This pass goes through input module's function list to detect all SYCL
10+
// devicelib functions invoked. Each devicelib function invoked is included in
11+
// one 'fallback' SPIR-V library loaded by SYCL runtime. After scanning all
12+
// functions in input module, a mask telling which SPIR-V libraries are needed
13+
// by input module indeed will be returned. This mask will be saved and used by
14+
// SYCL runtime later.
15+
//===----------------------------------------------------------------------===//
16+
17+
#include "SYCLDeviceLibReqMask.h"
18+
#include "llvm/ADT/Triple.h"
19+
#include "llvm/IR/Module.h"
20+
21+
static constexpr char DEVICELIB_FUNC_PREFIX[] = "__devicelib_";
22+
23+
namespace {
24+
// Please update SDLMap if any item is added to or removed from
25+
// fallback device libraries in libdevice.
26+
SYCLDeviceLibFuncMap SDLMap = {
27+
{"__devicelib_acosf", DeviceLibExt::cl_intel_devicelib_math},
28+
{"__devicelib_acoshf", DeviceLibExt::cl_intel_devicelib_math},
29+
{"__devicelib_asinf", DeviceLibExt::cl_intel_devicelib_math},
30+
{"__devicelib_asinhf", DeviceLibExt::cl_intel_devicelib_math},
31+
{"__devicelib_atan2f", DeviceLibExt::cl_intel_devicelib_math},
32+
{"__devicelib_atanf", DeviceLibExt::cl_intel_devicelib_math},
33+
{"__devicelib_atanhf", DeviceLibExt::cl_intel_devicelib_math},
34+
{"__devicelib_cbrtf", DeviceLibExt::cl_intel_devicelib_math},
35+
{"__devicelib_cosf", DeviceLibExt::cl_intel_devicelib_math},
36+
{"__devicelib_coshf", DeviceLibExt::cl_intel_devicelib_math},
37+
{"__devicelib_erfcf", DeviceLibExt::cl_intel_devicelib_math},
38+
{"__devicelib_erff", DeviceLibExt::cl_intel_devicelib_math},
39+
{"__devicelib_exp2f", DeviceLibExt::cl_intel_devicelib_math},
40+
{"__devicelib_expf", DeviceLibExt::cl_intel_devicelib_math},
41+
{"__devicelib_expm1f", DeviceLibExt::cl_intel_devicelib_math},
42+
{"__devicelib_fdimf", DeviceLibExt::cl_intel_devicelib_math},
43+
{"__devicelib_fmaf", DeviceLibExt::cl_intel_devicelib_math},
44+
{"__devicelib_fmodf", DeviceLibExt::cl_intel_devicelib_math},
45+
{"__devicelib_frexpf", DeviceLibExt::cl_intel_devicelib_math},
46+
{"__devicelib_hypotf", DeviceLibExt::cl_intel_devicelib_math},
47+
{"__devicelib_ilogbf", DeviceLibExt::cl_intel_devicelib_math},
48+
{"__devicelib_ldexpf", DeviceLibExt::cl_intel_devicelib_math},
49+
{"__devicelib_lgammaf", DeviceLibExt::cl_intel_devicelib_math},
50+
{"__devicelib_log10f", DeviceLibExt::cl_intel_devicelib_math},
51+
{"__devicelib_log1pf", DeviceLibExt::cl_intel_devicelib_math},
52+
{"__devicelib_log2f", DeviceLibExt::cl_intel_devicelib_math},
53+
{"__devicelib_logbf", DeviceLibExt::cl_intel_devicelib_math},
54+
{"__devicelib_logf", DeviceLibExt::cl_intel_devicelib_math},
55+
{"__devicelib_modff", DeviceLibExt::cl_intel_devicelib_math},
56+
{"__devicelib_nextafterf", DeviceLibExt::cl_intel_devicelib_math},
57+
{"__devicelib_powf", DeviceLibExt::cl_intel_devicelib_math},
58+
{"__devicelib_remainderf", DeviceLibExt::cl_intel_devicelib_math},
59+
{"__devicelib_remquof", DeviceLibExt::cl_intel_devicelib_math},
60+
{"__devicelib_scalbnf", DeviceLibExt::cl_intel_devicelib_math},
61+
{"__devicelib_sinf", DeviceLibExt::cl_intel_devicelib_math},
62+
{"__devicelib_sinhf", DeviceLibExt::cl_intel_devicelib_math},
63+
{"__devicelib_sqrtf", DeviceLibExt::cl_intel_devicelib_math},
64+
{"__devicelib_tanf", DeviceLibExt::cl_intel_devicelib_math},
65+
{"__devicelib_tanhf", DeviceLibExt::cl_intel_devicelib_math},
66+
{"__devicelib_tgammaf", DeviceLibExt::cl_intel_devicelib_math},
67+
{"__devicelib_acos", DeviceLibExt::cl_intel_devicelib_math_fp64},
68+
{"__devicelib_acosh", DeviceLibExt::cl_intel_devicelib_math_fp64},
69+
{"__devicelib_asin", DeviceLibExt::cl_intel_devicelib_math_fp64},
70+
{"__devicelib_asinh", DeviceLibExt::cl_intel_devicelib_math_fp64},
71+
{"__devicelib_atan", DeviceLibExt::cl_intel_devicelib_math_fp64},
72+
{"__devicelib_atan2", DeviceLibExt::cl_intel_devicelib_math_fp64},
73+
{"__devicelib_atanh", DeviceLibExt::cl_intel_devicelib_math_fp64},
74+
{"__devicelib_cbrt", DeviceLibExt::cl_intel_devicelib_math_fp64},
75+
{"__devicelib_cos", DeviceLibExt::cl_intel_devicelib_math_fp64},
76+
{"__devicelib_cosh", DeviceLibExt::cl_intel_devicelib_math_fp64},
77+
{"__devicelib_erf", DeviceLibExt::cl_intel_devicelib_math_fp64},
78+
{"__devicelib_erfc", DeviceLibExt::cl_intel_devicelib_math_fp64},
79+
{"__devicelib_exp", DeviceLibExt::cl_intel_devicelib_math_fp64},
80+
{"__devicelib_exp2", DeviceLibExt::cl_intel_devicelib_math_fp64},
81+
{"__devicelib_expm1", DeviceLibExt::cl_intel_devicelib_math_fp64},
82+
{"__devicelib_fdim", DeviceLibExt::cl_intel_devicelib_math_fp64},
83+
{"__devicelib_fma", DeviceLibExt::cl_intel_devicelib_math_fp64},
84+
{"__devicelib_fmod", DeviceLibExt::cl_intel_devicelib_math_fp64},
85+
{"__devicelib_frexp", DeviceLibExt::cl_intel_devicelib_math_fp64},
86+
{"__devicelib_hypot", DeviceLibExt::cl_intel_devicelib_math_fp64},
87+
{"__devicelib_ilogb", DeviceLibExt::cl_intel_devicelib_math_fp64},
88+
{"__devicelib_ldexp", DeviceLibExt::cl_intel_devicelib_math_fp64},
89+
{"__devicelib_lgamma", DeviceLibExt::cl_intel_devicelib_math_fp64},
90+
{"__devicelib_log", DeviceLibExt::cl_intel_devicelib_math_fp64},
91+
{"__devicelib_log10", DeviceLibExt::cl_intel_devicelib_math_fp64},
92+
{"__devicelib_log1p", DeviceLibExt::cl_intel_devicelib_math_fp64},
93+
{"__devicelib_log2", DeviceLibExt::cl_intel_devicelib_math_fp64},
94+
{"__devicelib_logb", DeviceLibExt::cl_intel_devicelib_math_fp64},
95+
{"__devicelib_modf", DeviceLibExt::cl_intel_devicelib_math_fp64},
96+
{"__devicelib_nextafter", DeviceLibExt::cl_intel_devicelib_math_fp64},
97+
{"__devicelib_pow", DeviceLibExt::cl_intel_devicelib_math_fp64},
98+
{"__devicelib_remainder", DeviceLibExt::cl_intel_devicelib_math_fp64},
99+
{"__devicelib_remquo", DeviceLibExt::cl_intel_devicelib_math_fp64},
100+
{"__devicelib_scalbn", DeviceLibExt::cl_intel_devicelib_math_fp64},
101+
{"__devicelib_sin", DeviceLibExt::cl_intel_devicelib_math_fp64},
102+
{"__devicelib_sinh", DeviceLibExt::cl_intel_devicelib_math_fp64},
103+
{"__devicelib_sqrt", DeviceLibExt::cl_intel_devicelib_math_fp64},
104+
{"__devicelib_tan", DeviceLibExt::cl_intel_devicelib_math_fp64},
105+
{"__devicelib_tanh", DeviceLibExt::cl_intel_devicelib_math_fp64},
106+
{"__devicelib_tgamma", DeviceLibExt::cl_intel_devicelib_math_fp64},
107+
{"__devicelib___divsc3", DeviceLibExt::cl_intel_devicelib_complex},
108+
{"__devicelib___mulsc3", DeviceLibExt::cl_intel_devicelib_complex},
109+
{"__devicelib_cabsf", DeviceLibExt::cl_intel_devicelib_complex},
110+
{"__devicelib_cacosf", DeviceLibExt::cl_intel_devicelib_complex},
111+
{"__devicelib_cacoshf", DeviceLibExt::cl_intel_devicelib_complex},
112+
{"__devicelib_cargf", DeviceLibExt::cl_intel_devicelib_complex},
113+
{"__devicelib_casinf", DeviceLibExt::cl_intel_devicelib_complex},
114+
{"__devicelib_casinhf", DeviceLibExt::cl_intel_devicelib_complex},
115+
{"__devicelib_catanf", DeviceLibExt::cl_intel_devicelib_complex},
116+
{"__devicelib_catanhf", DeviceLibExt::cl_intel_devicelib_complex},
117+
{"__devicelib_ccosf", DeviceLibExt::cl_intel_devicelib_complex},
118+
{"__devicelib_ccoshf", DeviceLibExt::cl_intel_devicelib_complex},
119+
{"__devicelib_cexpf", DeviceLibExt::cl_intel_devicelib_complex},
120+
{"__devicelib_cimagf", DeviceLibExt::cl_intel_devicelib_complex},
121+
{"__devicelib_clogf", DeviceLibExt::cl_intel_devicelib_complex},
122+
{"__devicelib_cpolarf", DeviceLibExt::cl_intel_devicelib_complex},
123+
{"__devicelib_cpowf", DeviceLibExt::cl_intel_devicelib_complex},
124+
{"__devicelib_cprojf", DeviceLibExt::cl_intel_devicelib_complex},
125+
{"__devicelib_crealf", DeviceLibExt::cl_intel_devicelib_complex},
126+
{"__devicelib_csinf", DeviceLibExt::cl_intel_devicelib_complex},
127+
{"__devicelib_csinhf", DeviceLibExt::cl_intel_devicelib_complex},
128+
{"__devicelib_csqrtf", DeviceLibExt::cl_intel_devicelib_complex},
129+
{"__devicelib_ctanf", DeviceLibExt::cl_intel_devicelib_complex},
130+
{"__devicelib_ctanhf", DeviceLibExt::cl_intel_devicelib_complex},
131+
{"__devicelib___divdc3", DeviceLibExt::cl_intel_devicelib_complex_fp64},
132+
{"__devicelib___muldc3", DeviceLibExt::cl_intel_devicelib_complex_fp64},
133+
{"__devicelib_cabs", DeviceLibExt::cl_intel_devicelib_complex_fp64},
134+
{"__devicelib_cacos", DeviceLibExt::cl_intel_devicelib_complex_fp64},
135+
{"__devicelib_cacosh", DeviceLibExt::cl_intel_devicelib_complex_fp64},
136+
{"__devicelib_carg", DeviceLibExt::cl_intel_devicelib_complex_fp64},
137+
{"__devicelib_casin", DeviceLibExt::cl_intel_devicelib_complex_fp64},
138+
{"__devicelib_casinh", DeviceLibExt::cl_intel_devicelib_complex_fp64},
139+
{"__devicelib_catan", DeviceLibExt::cl_intel_devicelib_complex_fp64},
140+
{"__devicelib_catanh", DeviceLibExt::cl_intel_devicelib_complex_fp64},
141+
{"__devicelib_ccos", DeviceLibExt::cl_intel_devicelib_complex_fp64},
142+
{"__devicelib_ccosh", DeviceLibExt::cl_intel_devicelib_complex_fp64},
143+
{"__devicelib_cexp", DeviceLibExt::cl_intel_devicelib_complex_fp64},
144+
{"__devicelib_cimag", DeviceLibExt::cl_intel_devicelib_complex_fp64},
145+
{"__devicelib_clog", DeviceLibExt::cl_intel_devicelib_complex_fp64},
146+
{"__devicelib_cpolar", DeviceLibExt::cl_intel_devicelib_complex_fp64},
147+
{"__devicelib_cpow", DeviceLibExt::cl_intel_devicelib_complex_fp64},
148+
{"__devicelib_cproj", DeviceLibExt::cl_intel_devicelib_complex_fp64},
149+
{"__devicelib_creal", DeviceLibExt::cl_intel_devicelib_complex_fp64},
150+
{"__devicelib_csin", DeviceLibExt::cl_intel_devicelib_complex_fp64},
151+
{"__devicelib_csinh", DeviceLibExt::cl_intel_devicelib_complex_fp64},
152+
{"__devicelib_csqrt", DeviceLibExt::cl_intel_devicelib_complex_fp64},
153+
{"__devicelib_ctan", DeviceLibExt::cl_intel_devicelib_complex_fp64},
154+
{"__devicelib_ctanh", DeviceLibExt::cl_intel_devicelib_complex_fp64},
155+
};
156+
157+
// Each fallback device library corresponds to one bit in "require mask" which
158+
// is an unsigned int32. getDeviceLibBit checks which fallback device library
159+
// is required for FuncName and returns the corresponding bit. The corresponding
160+
// mask for each fallback device library is:
161+
// fallback-cassert: 0x1
162+
// fallback-cmath: 0x2
163+
// fallback-cmath-fp64: 0x4
164+
// fallback-complex: 0x8
165+
// fallback-complex-fp64: 0x10
166+
uint32_t getDeviceLibBits(const std::string &FuncName) {
167+
auto DeviceLibFuncIter = SDLMap.find(FuncName);
168+
return ((DeviceLibFuncIter == SDLMap.end())
169+
? 0
170+
: 0x1 << (static_cast<uint32_t>(DeviceLibFuncIter->second) -
171+
static_cast<uint32_t>(
172+
DeviceLibExt::cl_intel_devicelib_assert)));
173+
}
174+
175+
// For each device image module, we go through all functions which meets
176+
// 1. The function name has prefix "__devicelib_"
177+
// 2. The function is declaration which means it doesn't have function body
178+
// And we don't expect non-spirv functions with "__devicelib_" prefix.
179+
uint32_t getModuleDeviceLibReqMask(const Module &M) {
180+
// Device libraries will be enabled only for spir-v module.
181+
if (!llvm::Triple(M.getTargetTriple()).isSPIR())
182+
return 0;
183+
// 0x1 means sycl runtime will link and load libsycl-fallback-assert.spv as
184+
// default. In fact, default link assert spv is not necessary but dramatic
185+
// perf regression is observed if we don't link any device library. The perf
186+
// regression is caused by a clang issue.
187+
uint32_t ReqMask = 0x1;
188+
for (const Function &SF : M) {
189+
if (SF.getName().startswith(DEVICELIB_FUNC_PREFIX) && SF.isDeclaration()) {
190+
assert(SF.getCallingConv() == CallingConv::SPIR_FUNC);
191+
uint32_t DeviceLibBits = getDeviceLibBits(SF.getName().str());
192+
ReqMask |= DeviceLibBits;
193+
}
194+
}
195+
return ReqMask;
196+
}
197+
} // namespace
198+
199+
char SYCLDeviceLibReqMaskPass::ID = 0;
200+
bool SYCLDeviceLibReqMaskPass::runOnModule(Module &M) {
201+
MReqMask = getModuleDeviceLibReqMask(M);
202+
return false;
203+
}

‎llvm/tools/sycl-post-link/SYCLDeviceLibReqMask.h

Lines changed: 44 additions & 0 deletions
Original file line numberDiff line numberDiff line change
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1+
//===----- SYCLDeviceLibReqMask.h - get SYCL devicelib required Info -----=-==//
2+
//
3+
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4+
// See https://llvm.org/LICENSE.txt for license information.
5+
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6+
//
7+
//===----------------------------------------------------------------------===//
8+
//
9+
// This pass goes through input module's function list to detect all SYCL
10+
// devicelib functions invoked. Each devicelib function invoked is included in
11+
// one 'fallback' SPIR-V library loaded by SYCL runtime. After scanning all
12+
// functions in input module, a mask telling which SPIR-V libraries are needed
13+
// by input module indeed will be returned. This mask will be saved and used by
14+
// SYCL runtime later.
15+
//===----------------------------------------------------------------------===//
16+
17+
#pragma onece
18+
19+
#include "llvm/Pass.h"
20+
#include <unordered_map>
21+
using namespace llvm;
22+
23+
// DeviceLibExt is shared between sycl-post-link tool and sycl runtime.
24+
// If any change is made here, need to sync with DeviceLibExt definition
25+
// in sycl/source/detail/program_manager/program_manager.hpp
26+
enum class DeviceLibExt : std::uint32_t {
27+
cl_intel_devicelib_assert,
28+
cl_intel_devicelib_math,
29+
cl_intel_devicelib_math_fp64,
30+
cl_intel_devicelib_complex,
31+
cl_intel_devicelib_complex_fp64
32+
};
33+
34+
using SYCLDeviceLibFuncMap = std::unordered_map<std::string, DeviceLibExt>;
35+
class SYCLDeviceLibReqMaskPass : public ModulePass {
36+
public:
37+
static char ID;
38+
SYCLDeviceLibReqMaskPass() : ModulePass(ID) { MReqMask = 0; }
39+
bool runOnModule(Module &M) override;
40+
uint32_t getSYCLDeviceLibReqMask() { return MReqMask; }
41+
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private:
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uint32_t MReqMask;
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};

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