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svenvhjsji
svenvh
authored and
jsji
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Convert extension tests to opaque pointers (#2131)
This is a bulk conversion done using the migration script. There are more extension tests to be converted; however they will need manual fixups, so leave them out of this bulk conversion. Original commit: KhronosGroup/SPIRV-LLVM-Translator@e6eae86
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‎llvm-spirv/test/extensions/EXT/SPV_EXT_shader_atomic_float_min_max/atomicrmw_fminfmax_double.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -20,9 +20,9 @@ target triple = "spir64"
2020
; Function Attrs: nounwind
2121
define dso_local spir_func void @test_atomicrmw_fadd() local_unnamed_addr #0 {
2222
entry:
23-
%0 = atomicrmw fmin double addrspace(1)* @f, double 42.000000e+00 seq_cst
23+
%0 = atomicrmw fmin ptr addrspace(1) @f, double 42.000000e+00 seq_cst
2424
; CHECK: AtomicFMinEXT [[Double]] {{[0-9]+}} [[DoublePointer]] [[Scope_Device]] [[MemSem_SequentiallyConsistent]] [[DoubleValue]]
25-
%1 = atomicrmw fmax double addrspace(1)* @f, double 42.000000e+00 seq_cst
25+
%1 = atomicrmw fmax ptr addrspace(1) @f, double 42.000000e+00 seq_cst
2626
; CHECK: AtomicFMaxEXT [[Double]] {{[0-9]+}} [[DoublePointer]] [[Scope_Device]] [[MemSem_SequentiallyConsistent]] [[DoubleValue]]
2727

2828
ret void

‎llvm-spirv/test/extensions/EXT/SPV_EXT_shader_atomic_float_min_max/atomicrmw_fminfmax_float.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -20,9 +20,9 @@ target triple = "spir64"
2020
; Function Attrs: nounwind
2121
define dso_local spir_func void @test_atomicrmw_fadd() local_unnamed_addr #0 {
2222
entry:
23-
%0 = atomicrmw fmin float addrspace(1)* @f, float 42.000000e+00 seq_cst
23+
%0 = atomicrmw fmin ptr addrspace(1) @f, float 42.000000e+00 seq_cst
2424
; CHECK: AtomicFMinEXT [[Float]] {{[0-9]+}} [[FPPointer]] [[Scope_Device]] [[MemSem_SequentiallyConsistent]] [[FPValue]]
25-
%1 = atomicrmw fmax float addrspace(1)* @f, float 42.000000e+00 seq_cst
25+
%1 = atomicrmw fmax ptr addrspace(1) @f, float 42.000000e+00 seq_cst
2626
; CHECK: AtomicFMaxEXT [[Float]] {{[0-9]+}} [[FPPointer]] [[Scope_Device]] [[MemSem_SequentiallyConsistent]] [[FPValue]]
2727

2828
ret void

‎llvm-spirv/test/extensions/EXT/SPV_EXT_shader_atomic_float_min_max/atomicrmw_fminfmax_half.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -20,9 +20,9 @@ target triple = "spir64"
2020
; Function Attrs: nounwind
2121
define dso_local spir_func void @test_atomicrmw_fadd() local_unnamed_addr #0 {
2222
entry:
23-
%0 = atomicrmw fmin half addrspace(1)* @f, half 42.000000e+00 seq_cst
23+
%0 = atomicrmw fmin ptr addrspace(1) @f, half 42.000000e+00 seq_cst
2424
; CHECK: AtomicFMinEXT [[Half]] {{[0-9]+}} [[HalfPointer]] [[Scope_Device]] [[MemSem_SequentiallyConsistent]] [[HalfValue]]
25-
%1 = atomicrmw fmax half addrspace(1)* @f, half 42.000000e+00 seq_cst
25+
%1 = atomicrmw fmax ptr addrspace(1) @f, half 42.000000e+00 seq_cst
2626
; CHECK: AtomicFMaxEXT [[Half]] {{[0-9]+}} [[HalfPointer]] [[Scope_Device]] [[MemSem_SequentiallyConsistent]] [[HalfValue]]
2727

2828
ret void

‎llvm-spirv/test/extensions/INTEL/SPV_INTEL_arbitrary_precision_fixed_point/capability-arbitrary-precision-fixed-point-numbers.ll

Lines changed: 124 additions & 184 deletions
Large diffs are not rendered by default.

‎llvm-spirv/test/extensions/INTEL/SPV_INTEL_arbitrary_precision_floating_point/capability-arbitrary-precision-floating-point.ll

Lines changed: 411 additions & 623 deletions
Large diffs are not rendered by default.

‎llvm-spirv/test/extensions/INTEL/SPV_INTEL_arbitrary_precision_integers/capability-arbitrary-precision-integers.ll

Lines changed: 10 additions & 10 deletions
Large diffs are not rendered by default.

‎llvm-spirv/test/extensions/INTEL/SPV_INTEL_blocking_pipes/PipeBlocking.ll

Lines changed: 36 additions & 36 deletions
Original file line numberDiff line numberDiff line change
@@ -40,88 +40,88 @@ target triple = "spir64-unknown-unknown"
4040
; CHECK-SPV-IR: call spir_func void @_Z30__spirv_WritePipeBlockingINTEL{{.*}}(target("spirv.Pipe", 1){{.*}}, ptr addrspace(4){{.*}}, i32 2, i32 2)
4141

4242
; Function Attrs: convergent noinline nounwind optnone
43-
define spir_func void @foo(target("spirv.Pipe", 0) %p, i32 addrspace(1)* %ptr) #0 {
43+
define spir_func void @foo(target("spirv.Pipe", 0) %p, ptr addrspace(1) %ptr) #0 {
4444
entry:
4545
%p.addr = alloca target("spirv.Pipe", 0), align 8
46-
%ptr.addr = alloca i32 addrspace(1)*, align 8
46+
%ptr.addr = alloca ptr addrspace(1), align 8
4747
store target("spirv.Pipe", 0) %p, target("spirv.Pipe", 0)* %p.addr, align 8
48-
store i32 addrspace(1)* %ptr, i32 addrspace(1)** %ptr.addr, align 8
48+
store ptr addrspace(1) %ptr, ptr %ptr.addr, align 8
4949
%0 = load target("spirv.Pipe", 0), target("spirv.Pipe", 0)* %p.addr, align 8
50-
%1 = load i32 addrspace(1)*, i32 addrspace(1)** %ptr.addr, align 8
51-
%2 = addrspacecast i32 addrspace(1)* %1 to i32 addrspace(4)*
52-
call spir_func void @_Z29__spirv_ReadPipeBlockingINTELIiEv8ocl_pipePiii(target("spirv.Pipe", 0) %0, i32 addrspace(4)* %2, i32 4, i32 4)
50+
%1 = load ptr addrspace(1), ptr %ptr.addr, align 8
51+
%2 = addrspacecast ptr addrspace(1) %1 to ptr addrspace(4)
52+
call spir_func void @_Z29__spirv_ReadPipeBlockingINTELIiEv8ocl_pipePiii(target("spirv.Pipe", 0) %0, ptr addrspace(4) %2, i32 4, i32 4)
5353
ret void
5454
}
5555

56-
declare dso_local spir_func void @_Z29__spirv_ReadPipeBlockingINTELIiEv8ocl_pipePiii(target("spirv.Pipe", 0), i32 addrspace(4)*, i32, i32)
56+
declare dso_local spir_func void @_Z29__spirv_ReadPipeBlockingINTELIiEv8ocl_pipePiii(target("spirv.Pipe", 0), ptr addrspace(4), i32, i32)
5757

5858
; Function Attrs: convergent noinline nounwind optnone
59-
define spir_func void @bar(target("spirv.Pipe", 0) %p, i32 addrspace(1)* %ptr) #0 {
59+
define spir_func void @bar(target("spirv.Pipe", 0) %p, ptr addrspace(1) %ptr) #0 {
6060
entry:
6161
%p.addr = alloca target("spirv.Pipe", 0), align 8
62-
%ptr.addr = alloca i32 addrspace(1)*, align 8
62+
%ptr.addr = alloca ptr addrspace(1), align 8
6363
store target("spirv.Pipe", 0) %p, target("spirv.Pipe", 0)* %p.addr, align 8
64-
store i32 addrspace(1)* %ptr, i32 addrspace(1)** %ptr.addr, align 8
64+
store ptr addrspace(1) %ptr, ptr %ptr.addr, align 8
6565
%0 = load target("spirv.Pipe", 0), target("spirv.Pipe", 0)* %p.addr, align 8
66-
%1 = load i32 addrspace(1)*, i32 addrspace(1)** %ptr.addr, align 8
67-
%2 = addrspacecast i32 addrspace(1)* %1 to i8 addrspace(4)*
68-
call spir_func void @_Z29__spirv_ReadPipeBlockingINTELIiEv8ocl_pipePvii(target("spirv.Pipe", 0) %0, i8 addrspace(4)* %2, i32 4, i32 4)
66+
%1 = load ptr addrspace(1), ptr %ptr.addr, align 8
67+
%2 = addrspacecast ptr addrspace(1) %1 to ptr addrspace(4)
68+
call spir_func void @_Z29__spirv_ReadPipeBlockingINTELIiEv8ocl_pipePvii(target("spirv.Pipe", 0) %0, ptr addrspace(4) %2, i32 4, i32 4)
6969
ret void
7070
}
7171

72-
declare dso_local spir_func void @_Z29__spirv_ReadPipeBlockingINTELIiEv8ocl_pipePvii(target("spirv.Pipe", 0), i8 addrspace(4)*, i32, i32)
72+
declare dso_local spir_func void @_Z29__spirv_ReadPipeBlockingINTELIiEv8ocl_pipePvii(target("spirv.Pipe", 0), ptr addrspace(4), i32, i32)
7373

7474
; Function Attrs: convergent noinline nounwind optnone
75-
define spir_func void @boo(target("spirv.Pipe", 1) %p, i32 addrspace(1)* %ptr) #0 {
75+
define spir_func void @boo(target("spirv.Pipe", 1) %p, ptr addrspace(1) %ptr) #0 {
7676
entry:
7777
%p.addr = alloca target("spirv.Pipe", 1), align 8
78-
%ptr.addr = alloca i32 addrspace(1)*, align 8
78+
%ptr.addr = alloca ptr addrspace(1), align 8
7979
store target("spirv.Pipe", 1) %p, target("spirv.Pipe", 1)* %p.addr, align 8
80-
store i32 addrspace(1)* %ptr, i32 addrspace(1)** %ptr.addr, align 8
80+
store ptr addrspace(1) %ptr, ptr %ptr.addr, align 8
8181
%0 = load target("spirv.Pipe", 1), target("spirv.Pipe", 1)* %p.addr, align 8
82-
%1 = load i32 addrspace(1)*, i32 addrspace(1)** %ptr.addr, align 8
83-
%2 = addrspacecast i32 addrspace(1)* %1 to i32 addrspace(4)*
84-
call spir_func void @_Z30__spirv_WritePipeBlockingINTELIKiEv8ocl_pipePiii(target("spirv.Pipe", 1) %0, i32 addrspace(4)* %2, i32 4, i32 4)
82+
%1 = load ptr addrspace(1), ptr %ptr.addr, align 8
83+
%2 = addrspacecast ptr addrspace(1) %1 to ptr addrspace(4)
84+
call spir_func void @_Z30__spirv_WritePipeBlockingINTELIKiEv8ocl_pipePiii(target("spirv.Pipe", 1) %0, ptr addrspace(4) %2, i32 4, i32 4)
8585
ret void
8686
}
8787

88-
declare dso_local spir_func void @_Z30__spirv_WritePipeBlockingINTELIKiEv8ocl_pipePiii(target("spirv.Pipe", 1), i32 addrspace(4)*, i32, i32)
88+
declare dso_local spir_func void @_Z30__spirv_WritePipeBlockingINTELIKiEv8ocl_pipePiii(target("spirv.Pipe", 1), ptr addrspace(4), i32, i32)
8989

9090
; Function Attrs: convergent noinline nounwind optnone
91-
define spir_func void @baz(target("spirv.Pipe", 1) %p, i32 addrspace(1)* %ptr) #0 {
91+
define spir_func void @baz(target("spirv.Pipe", 1) %p, ptr addrspace(1) %ptr) #0 {
9292
entry:
9393
%p.addr = alloca target("spirv.Pipe", 1), align 8
94-
%ptr.addr = alloca i32 addrspace(1)*, align 8
94+
%ptr.addr = alloca ptr addrspace(1), align 8
9595
store target("spirv.Pipe", 1) %p, target("spirv.Pipe", 1)* %p.addr, align 8
96-
store i32 addrspace(1)* %ptr, i32 addrspace(1)** %ptr.addr, align 8
96+
store ptr addrspace(1) %ptr, ptr %ptr.addr, align 8
9797
%0 = load target("spirv.Pipe", 1), target("spirv.Pipe", 1)* %p.addr, align 8
98-
%1 = load i32 addrspace(1)*, i32 addrspace(1)** %ptr.addr, align 8
99-
%2 = addrspacecast i32 addrspace(1)* %1 to i8 addrspace(4)*
100-
call spir_func void @_Z30__spirv_WritePipeBlockingINTELIKiEv8ocl_pipePvii(target("spirv.Pipe", 1) %0, i8 addrspace(4)* %2, i32 4, i32 4)
98+
%1 = load ptr addrspace(1), ptr %ptr.addr, align 8
99+
%2 = addrspacecast ptr addrspace(1) %1 to ptr addrspace(4)
100+
call spir_func void @_Z30__spirv_WritePipeBlockingINTELIKiEv8ocl_pipePvii(target("spirv.Pipe", 1) %0, ptr addrspace(4) %2, i32 4, i32 4)
101101
ret void
102102
}
103103

104-
declare dso_local spir_func void @_Z30__spirv_WritePipeBlockingINTELIKiEv8ocl_pipePvii(target("spirv.Pipe", 1), i8 addrspace(4)*, i32, i32)
104+
declare dso_local spir_func void @_Z30__spirv_WritePipeBlockingINTELIKiEv8ocl_pipePvii(target("spirv.Pipe", 1), ptr addrspace(4), i32, i32)
105105

106106
; CHECK-LLVM: declare spir_func void @__read_pipe_2_bl(ptr addrspace(1), ptr addrspace(4), i32, i32)
107107
; CHECK-LLVM: declare spir_func void @__write_pipe_2_bl(ptr addrspace(1), ptr addrspace(4), i32, i32)
108108

109109
; Function Attrs: convergent mustprogress norecurse nounwind
110-
define linkonce_odr dso_local spir_func void @WritePipeBLockingi9Pointer(i9 addrspace(4)* align 2 dereferenceable(2) %_Data) {
110+
define linkonce_odr dso_local spir_func void @WritePipeBLockingi9Pointer(ptr addrspace(4) align 2 dereferenceable(2) %_Data) {
111111
entry:
112-
%_Data.addr = alloca i9 addrspace(4)*, align 8
112+
%_Data.addr = alloca ptr addrspace(4), align 8
113113
%_WPipe = alloca target("spirv.Pipe", 1), align 8
114-
%_Data.addr.ascast = addrspacecast i9 addrspace(4)** %_Data.addr to i9 addrspace(4)* addrspace(4)*
114+
%_Data.addr.ascast = addrspacecast ptr %_Data.addr to ptr addrspace(4)
115115
%_WPipe.ascast = addrspacecast target("spirv.Pipe", 1)* %_WPipe to target("spirv.Pipe", 1) addrspace(4)*
116-
store i9 addrspace(4)* %_Data, i9 addrspace(4)* addrspace(4)* %_Data.addr.ascast, align 8
117-
%0 = bitcast target("spirv.Pipe", 1)* %_WPipe to i8*
116+
store ptr addrspace(4) %_Data, ptr addrspace(4) %_Data.addr.ascast, align 8
117+
%0 = bitcast target("spirv.Pipe", 1)* %_WPipe to ptr
118118
%1 = load target("spirv.Pipe", 1), target("spirv.Pipe", 1) addrspace(4)* %_WPipe.ascast, align 8
119-
%2 = load i9 addrspace(4)*, i9 addrspace(4)* addrspace(4)* %_Data.addr.ascast, align 8
120-
call spir_func void @_Z30__spirv_WritePipeBlockingINTELIDU9_Ev8ocl_pipePKT_ii(target("spirv.Pipe", 1) %1, i9 addrspace(4)* %2, i32 2, i32 2)
119+
%2 = load ptr addrspace(4), ptr addrspace(4) %_Data.addr.ascast, align 8
120+
call spir_func void @_Z30__spirv_WritePipeBlockingINTELIDU9_Ev8ocl_pipePKT_ii(target("spirv.Pipe", 1) %1, ptr addrspace(4) %2, i32 2, i32 2)
121121
ret void
122122
}
123123

124-
declare dso_local spir_func void @_Z30__spirv_WritePipeBlockingINTELIDU9_Ev8ocl_pipePKT_ii(target("spirv.Pipe", 1), i9 addrspace(4)*, i32, i32)
124+
declare dso_local spir_func void @_Z30__spirv_WritePipeBlockingINTELIDU9_Ev8ocl_pipePKT_ii(target("spirv.Pipe", 1), ptr addrspace(4), i32, i32)
125125

126126
attributes #0 = { convergent noinline nounwind optnone "correctly-rounded-divide-sqrt-fp-math"="false" "denorms-are-zero"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
127127

‎llvm-spirv/test/extensions/INTEL/SPV_INTEL_complex_float_mul_div/complex-operations.ll

Lines changed: 7 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -30,17 +30,14 @@ target triple = "spir-unknown-unknown"
3030
%structtype = type { float, float }
3131

3232
; Function Attrs: nounwind
33-
define spir_func void @_Z19cmul_kernel_complexPSt7complexIfES1_S1_(%"struct.std::complex"* noalias nocapture readonly %a, %"struct.std::complex"* noalias nocapture readonly %b, %"struct.std::complex"* noalias nocapture %c) #0 {
33+
define spir_func void @_Z19cmul_kernel_complexPSt7complexIfES1_S1_(ptr noalias nocapture readonly %a, ptr noalias nocapture readonly %b, ptr noalias nocapture %c) #0 {
3434
entry:
35-
%0 = bitcast %"struct.std::complex"* %a to <2 x float>*
36-
%1 = load <2 x float>, <2 x float>* %0, align 4
37-
%2 = bitcast %"struct.std::complex"* %b to <2 x float>*
38-
%3 = load <2 x float>, <2 x float>* %2, align 4
39-
%4 = call spir_func <2 x float> @_Z24__spirv_ComplexFDivINTELDv2_fS_(<2 x float> %1, <2 x float> %3) #0
40-
%ref.tmp.sroa.0.0..sroa_cast5 = bitcast %"struct.std::complex"* %c to <2 x float>*
41-
store <2 x float> %4, <2 x float>* %ref.tmp.sroa.0.0..sroa_cast5, align 4
42-
%5 = call spir_func <2 x float> @_Z24__spirv_ComplexFMulINTELDv2_fS_(<2 x float> %1, <2 x float> %3) #0
43-
store <2 x float> %5, <2 x float>* %ref.tmp.sroa.0.0..sroa_cast5, align 4
35+
%0 = load <2 x float>, ptr %a, align 4
36+
%1 = load <2 x float>, ptr %b, align 4
37+
%2 = call spir_func <2 x float> @_Z24__spirv_ComplexFDivINTELDv2_fS_(<2 x float> %0, <2 x float> %1) #0
38+
store <2 x float> %2, ptr %c, align 4
39+
%3 = call spir_func <2 x float> @_Z24__spirv_ComplexFMulINTELDv2_fS_(<2 x float> %0, <2 x float> %1) #0
40+
store <2 x float> %3, ptr %c, align 4
4441
ret void
4542
}
4643

‎llvm-spirv/test/extensions/INTEL/SPV_INTEL_float_controls2/exec_mode_float_control_intel.ll

Lines changed: 13 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -42,7 +42,7 @@ entry:
4242
; SPV-DAG: EntryPoint {{[0-9]+}} [[KERNEL1:[0-9]+]] "k_float_controls_1"
4343
; SPV-DAG: EntryPoint {{[0-9]+}} [[KERNEL2:[0-9]+]] "k_float_controls_2"
4444
; SPV-DAG: EntryPoint {{[0-9]+}} [[KERNEL3:[0-9]+]] "k_float_controls_3"
45-
!0 = !{void (i32, i32)* @k_float_controls_0, !"k_float_controls_0", !1, i32 0, !2, !3, !4, i32 0, i32 0}
45+
!0 = !{ptr @k_float_controls_0, !"k_float_controls_0", !1, i32 0, !2, !3, !4, i32 0, i32 0}
4646
!1 = !{i32 2, i32 2}
4747
!2 = !{i32 32, i32 36}
4848
!3 = !{i32 0, i32 0}
@@ -52,29 +52,29 @@ entry:
5252
!14 = !{i32 1, i32 0}
5353

5454
; SPV-DAG: ExecutionMode [[KERNEL0]] 5620 64
55-
!15 = !{void (i32, i32)* @k_float_controls_0, i32 5620, i32 64}
55+
!15 = !{ptr @k_float_controls_0, i32 5620, i32 64}
5656
; SPV-DAG: ExecutionMode [[KERNEL0]] 5620 32
57-
!16 = !{void (i32, i32)* @k_float_controls_0, i32 5620, i32 32}
57+
!16 = !{ptr @k_float_controls_0, i32 5620, i32 32}
5858
; SPV-DAG: ExecutionMode [[KERNEL0]] 5620 16
59-
!17 = !{void (i32, i32)* @k_float_controls_0, i32 5620, i32 16}
59+
!17 = !{ptr @k_float_controls_0, i32 5620, i32 16}
6060

6161
; SPV-DAG: ExecutionMode [[KERNEL1]] 5621 64
62-
!18 = !{void (i32, i32)* @k_float_controls_1, i32 5621, i32 64}
62+
!18 = !{ptr @k_float_controls_1, i32 5621, i32 64}
6363
; SPV-DAG: ExecutionMode [[KERNEL1]] 5621 32
64-
!19 = !{void (i32, i32)* @k_float_controls_1, i32 5621, i32 32}
64+
!19 = !{ptr @k_float_controls_1, i32 5621, i32 32}
6565
; SPV-DAG: ExecutionMode [[KERNEL1]] 5621 16
66-
!20 = !{void (i32, i32)* @k_float_controls_1, i32 5621, i32 16}
66+
!20 = !{ptr @k_float_controls_1, i32 5621, i32 16}
6767

6868
; SPV-DAG: ExecutionMode [[KERNEL2]] 5622 64
69-
!21 = !{void (i32, i32)* @k_float_controls_2, i32 5622, i32 64}
69+
!21 = !{ptr @k_float_controls_2, i32 5622, i32 64}
7070
; SPV-DAG: ExecutionMode [[KERNEL2]] 5622 32
71-
!22 = !{void (i32, i32)* @k_float_controls_2, i32 5622, i32 32}
71+
!22 = !{ptr @k_float_controls_2, i32 5622, i32 32}
7272
; SPV-DAG: ExecutionMode [[KERNEL2]] 5622 16
73-
!23 = !{void (i32, i32)* @k_float_controls_2, i32 5622, i32 16}
73+
!23 = !{ptr @k_float_controls_2, i32 5622, i32 16}
7474

7575
; SPV-DAG: ExecutionMode [[KERNEL3]] 5623 64
76-
!24 = !{void (i32, i32)* @k_float_controls_3, i32 5623, i32 64}
76+
!24 = !{ptr @k_float_controls_3, i32 5623, i32 64}
7777
; SPV-DAG: ExecutionMode [[KERNEL3]] 5623 32
78-
!25 = !{void (i32, i32)* @k_float_controls_3, i32 5623, i32 32}
78+
!25 = !{ptr @k_float_controls_3, i32 5623, i32 32}
7979
; SPV-DAG: ExecutionMode [[KERNEL3]] 5623 16
80-
!26 = !{void (i32, i32)* @k_float_controls_3, i32 5623, i32 16}
80+
!26 = !{ptr @k_float_controls_3, i32 5623, i32 16}

‎llvm-spirv/test/extensions/INTEL/SPV_INTEL_fp_fast_math_mode/fp_contract_reassoc_fast_mode.ll

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -27,16 +27,16 @@ define spir_kernel void @test(float %a, float %b) #0 !kernel_arg_addr_space !3 !
2727
entry:
2828
%a.addr = alloca float, align 4
2929
%b.addr = alloca float, align 4
30-
store float %a, float* %a.addr, align 4
31-
store float %b, float* %b.addr, align 4
32-
%0 = load float, float* %a.addr, align 4
33-
%1 = load float, float* %a.addr, align 4
30+
store float %a, ptr %a.addr, align 4
31+
store float %b, ptr %b.addr, align 4
32+
%0 = load float, ptr %a.addr, align 4
33+
%1 = load float, ptr %a.addr, align 4
3434
%mul = fmul contract float %0, %1
35-
store float %mul, float* %b.addr, align 4
36-
%2 = load float, float* %b.addr, align 4
37-
%3 = load float, float* %b.addr, align 4
35+
store float %mul, ptr %b.addr, align 4
36+
%2 = load float, ptr %b.addr, align 4
37+
%3 = load float, ptr %b.addr, align 4
3838
%sub = fsub reassoc float %2, %3
39-
store float %sub, float* %b.addr, align 4
39+
store float %sub, ptr %b.addr, align 4
4040
ret void
4141
}
4242

‎llvm-spirv/test/extensions/INTEL/SPV_INTEL_fpga_argument_interfaces/sycl-kernel-arg-annotation.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,7 @@ target triple = "spir64-unknown-unknown"
1010
$_ZTS4MyIP = comdat any
1111

1212
; Function Attrs: convergent mustprogress norecurse
13-
define weak_odr dso_local spir_kernel void @_ZTS4MyIP(i32 addrspace(4)* noundef %_arg_p) #0 comdat !kernel_arg_buffer_location !1587 !spirv.ParameterDecorations !1588
13+
define weak_odr dso_local spir_kernel void @_ZTS4MyIP(ptr addrspace(4) noundef %_arg_p) #0 comdat !kernel_arg_buffer_location !1587 !spirv.ParameterDecorations !1588
1414
; CHECK-LLVM-DAG: !spirv.ParameterDecorations ![[PARMDECOR:[0-9]+]]
1515
{
1616
entry:

‎llvm-spirv/test/extensions/INTEL/SPV_INTEL_fpga_dsp_control/prefer_dsp.ll

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -57,29 +57,29 @@ define dso_local i32 @main() #0 {
5757
entry:
5858
%retval = alloca i32, align 4
5959
%agg.tmp = alloca %class.anon, align 1
60-
store i32 0, i32* %retval, align 4
61-
call spir_func void @"_Z25math_prefer_dsp_propagateIZ4mainE3$_0EvT_"(%class.anon* byval(%class.anon) align 1 %agg.tmp)
60+
store i32 0, ptr %retval, align 4
61+
call spir_func void @"_Z25math_prefer_dsp_propagateIZ4mainE3$_0EvT_"(ptr byval(%class.anon) align 1 %agg.tmp)
6262
ret i32 0
6363
}
6464

6565
; Function Attrs: noinline optnone mustprogress
66-
define internal spir_func void @"_Z25math_prefer_dsp_propagateIZ4mainE3$_0EvT_"(%class.anon* byval(%class.anon) align 1 %f) #1 !prefer_dsp !3 {
66+
define internal spir_func void @"_Z25math_prefer_dsp_propagateIZ4mainE3$_0EvT_"(ptr byval(%class.anon) align 1 %f) #1 !prefer_dsp !3 {
6767
entry:
68-
call spir_func void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull dereferenceable(1) %f)
68+
call spir_func void @"_ZZ4mainENK3$_0clEv"(ptr nonnull dereferenceable(1) %f)
6969
ret void
7070
}
7171

7272
; Function Attrs: noinline nounwind optnone mustprogress
73-
define internal spir_func void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull dereferenceable(1) %this) #2 align 2 {
73+
define internal spir_func void @"_ZZ4mainENK3$_0clEv"(ptr nonnull dereferenceable(1) %this) #2 align 2 {
7474
entry:
75-
%this.addr = alloca %class.anon*, align 8
75+
%this.addr = alloca ptr, align 8
7676
%a = alloca i32, align 4
77-
store %class.anon* %this, %class.anon** %this.addr, align 8
78-
%this1 = load %class.anon*, %class.anon** %this.addr, align 8
79-
store i32 0, i32* %a, align 4
80-
%0 = load i32, i32* %a, align 4
77+
store ptr %this, ptr %this.addr, align 8
78+
%this1 = load ptr, ptr %this.addr, align 8
79+
store i32 0, ptr %a, align 4
80+
%0 = load i32, ptr %a, align 4
8181
%add = add nsw i32 %0, 1
82-
store i32 %add, i32* %a, align 4
82+
store i32 %add, ptr %a, align 4
8383
ret void
8484
}
8585

‎llvm-spirv/test/extensions/INTEL/SPV_INTEL_fpga_dsp_control/prefer_dsp_propagate.ll

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -59,29 +59,29 @@ define dso_local i32 @main() #0 {
5959
entry:
6060
%retval = alloca i32, align 4
6161
%agg.tmp = alloca %class.anon, align 1
62-
store i32 0, i32* %retval, align 4
63-
call spir_func void @"_Z25math_prefer_dsp_propagateIZ4mainE3$_0EvT_"(%class.anon* byval(%class.anon) align 1 %agg.tmp)
62+
store i32 0, ptr %retval, align 4
63+
call spir_func void @"_Z25math_prefer_dsp_propagateIZ4mainE3$_0EvT_"(ptr byval(%class.anon) align 1 %agg.tmp)
6464
ret i32 0
6565
}
6666

6767
; Function Attrs: noinline optnone mustprogress
68-
define internal spir_func void @"_Z25math_prefer_dsp_propagateIZ4mainE3$_0EvT_"(%class.anon* byval(%class.anon) align 1 %f) #1 !prefer_dsp !3 !propagate_dsp_preference !3 {
68+
define internal spir_func void @"_Z25math_prefer_dsp_propagateIZ4mainE3$_0EvT_"(ptr byval(%class.anon) align 1 %f) #1 !prefer_dsp !3 !propagate_dsp_preference !3 {
6969
entry:
70-
call spir_func void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull dereferenceable(1) %f)
70+
call spir_func void @"_ZZ4mainENK3$_0clEv"(ptr nonnull dereferenceable(1) %f)
7171
ret void
7272
}
7373

7474
; Function Attrs: noinline nounwind optnone mustprogress
75-
define internal spir_func void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull dereferenceable(1) %this) #2 align 2 {
75+
define internal spir_func void @"_ZZ4mainENK3$_0clEv"(ptr nonnull dereferenceable(1) %this) #2 align 2 {
7676
entry:
77-
%this.addr = alloca %class.anon*, align 8
77+
%this.addr = alloca ptr, align 8
7878
%a = alloca i32, align 4
79-
store %class.anon* %this, %class.anon** %this.addr, align 8
80-
%this1 = load %class.anon*, %class.anon** %this.addr, align 8
81-
store i32 0, i32* %a, align 4
82-
%0 = load i32, i32* %a, align 4
79+
store ptr %this, ptr %this.addr, align 8
80+
%this1 = load ptr, ptr %this.addr, align 8
81+
store i32 0, ptr %a, align 4
82+
%0 = load i32, ptr %a, align 4
8383
%add = add nsw i32 %0, 1
84-
store i32 %add, i32* %a, align 4
84+
store i32 %add, ptr %a, align 4
8585
ret void
8686
}
8787

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