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vladimirlazvladimirlaz
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Merge remote-tracking branch 'intel_llvm/sycl' into llvmspirv_pulldown
2 parents b74ec89 + 1202ccd commit 1fbf778

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‎buildbot/dependency.conf

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,7 @@ ocl_cpu_rt_ver=2020.10.7.0.15
55
ocl_cpu_rt_ver_win=2020.10.7.0.15
66
# Same GPU driver supports Level Zero and OpenCL:
77
# https://github.com/intel/compute-runtime/releases/tag/20.29.17408
8-
ocl_gpu_rt_ver=20.29.17408
8+
ocl_gpu_rt_ver=20.33.17675
99
# Same GPU driver supports Level Zero and OpenCL:
1010
# https://downloadmirror.intel.com/29674/a08/igfx_win10_100.8336.zip
1111
ocl_gpu_rt_ver_win=27.20.100.8336
@@ -24,7 +24,7 @@ fpga_ver_win=20200701_000002
2424
[DRIVER VERSIONS]
2525
cpu_driver_lin=2020.10.7.0.15
2626
cpu_driver_win=2020.10.7.0.15
27-
gpu_driver_lin=20.29.17408
27+
gpu_driver_lin=20.33.17675
2828
gpu_driver_win=27.20.100.8336
2929
fpga_driver_lin=2020.10.7.0.15
3030
fpga_driver_win=2020.10.7.0.15

‎clang/include/clang/Driver/Options.td

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1868,9 +1868,6 @@ def fstrict_vtable_pointers: Flag<["-"], "fstrict-vtable-pointers">,
18681868
def fstrict_overflow : Flag<["-"], "fstrict-overflow">, Group<f_Group>;
18691869
def fintelfpga : Flag<["-"], "fintelfpga">, Group<f_Group>,
18701870
Flags<[CC1Option, CoreOption]>, HelpText<"Perform ahead of time compilation for FPGA">;
1871-
def fsycl_enable_usm_address_spaces : Flag<["-"], "fsycl-enable-usm-address-spaces">,
1872-
Group<f_Group>, Flags<[CC1Option, CoreOption]>,
1873-
HelpText<"Enable USM address spaces">;
18741871
def fsycl_device_only : Flag<["-"], "fsycl-device-only">, Flags<[CoreOption]>,
18751872
HelpText<"Compile SYCL kernels for device">;
18761873
def fsycl_targets_EQ : CommaJoined<["-"], "fsycl-targets=">, Flags<[DriverOption, CC1Option, CoreOption]>,

‎clang/lib/Driver/ToolChains/Clang.cpp

Lines changed: 17 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -6252,11 +6252,10 @@ void Clang::ConstructJob(Compilation &C, const JobAction &JA,
62526252
if (Args.hasArg(options::OPT_fsycl_unnamed_lambda))
62536253
CmdArgs.push_back("-fsycl-unnamed-lambda");
62546254

6255-
// Enable generation of USM address spaces as opt-in.
6255+
// Enable generation of USM address spaces for FPGA.
62566256
// __ENABLE_USM_ADDR_SPACE__ will be used during compilation of SYCL headers
62576257
if (getToolChain().getTriple().getSubArch() ==
6258-
llvm::Triple::SPIRSubArch_fpga &&
6259-
Args.hasArg(options::OPT_fsycl_enable_usm_address_spaces))
6258+
llvm::Triple::SPIRSubArch_fpga)
62606259
CmdArgs.push_back("-D__ENABLE_USM_ADDR_SPACE__");
62616260
}
62626261

@@ -7711,18 +7710,27 @@ void SPIRVTranslator::ConstructJob(Compilation &C, const JobAction &JA,
77117710
if (getToolChain().getTriple().isSYCLDeviceEnvironment()) {
77127711
TranslatorArgs.push_back("-spirv-max-version=1.1");
77137712
TranslatorArgs.push_back("-spirv-debug-info-version=legacy");
7714-
std::string ExtArg("-spirv-ext=+all");
77157713
if (C.getArgs().hasArg(options::OPT_fsycl_esimd))
77167714
TranslatorArgs.push_back("-spirv-allow-unknown-intrinsics");
7715+
77177716
// Disable SPV_INTEL_usm_storage_classes by default since it adds new
77187717
// storage classes that represent global_device and global_host address
77197718
// spaces, which are not supported for all targets. With the extension
77207719
// disable the storage classes will be lowered to CrossWorkgroup storage
7721-
// class that is mapped to just global address space.
7722-
if (!(getToolChain().getTriple().getSubArch() ==
7723-
llvm::Triple::SPIRSubArch_fpga &&
7724-
TCArgs.hasArg(options::OPT_fsycl_enable_usm_address_spaces)))
7725-
ExtArg += ",-SPV_INTEL_usm_storage_classes";
7720+
// class that is mapped to just global address space. The extension is
7721+
// supposed to be enabled only for FPGA hardware.
7722+
std::string ExtArg("-spirv-ext=+all,-SPV_INTEL_usm_storage_classes");
7723+
if (getToolChain().getTriple().getSubArch() ==
7724+
llvm::Triple::SPIRSubArch_fpga) {
7725+
for (auto *A : TCArgs) {
7726+
if (A->getOption().matches(options::OPT_Xs_separate) ||
7727+
A->getOption().matches(options::OPT_Xs)) {
7728+
StringRef ArgString(A->getValue());
7729+
if (ArgString == "hardware" || ArgString == "simulation")
7730+
ExtArg = "-spirv-ext=+all";
7731+
}
7732+
}
7733+
}
77267734
TranslatorArgs.push_back(TCArgs.MakeArgString(ExtArg));
77277735
}
77287736
for (auto I : Inputs) {

‎clang/test/Driver/sycl-offload-with-split.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -217,7 +217,7 @@
217217
// CHK-TOOLS-GEN: clang-offload-wrapper{{.*}} "-o=[[OUTPUT8:.+\.bc]]" "-host=x86_64-unknown-linux-gnu" "-target=spir64_gen" "-kind=sycl" "-batch" "[[OUTPUT7]]"
218218
// CHK-TOOLS-CPU: clang-offload-wrapper{{.*}} "-o=[[OUTPUT8:.+\.bc]]" "-host=x86_64-unknown-linux-gnu" "-target=spir64_x86_64" "-kind=sycl" "-batch" "[[OUTPUT7]]"
219219
// CHK-TOOLS-AOT: llc{{.*}} "-filetype=obj" "-o" "[[OUTPUT9:.+\.o]]" "[[OUTPUT8]]"
220-
// CHK-TOOLS-FPGA: clang{{.*}} "-triple" "spir64_fpga-unknown-unknown-sycldevice" {{.*}} "-fsycl-int-header=[[INPUT1:.+\.h]]" "-faddrsig"
220+
// CHK-TOOLS-FPGA: clang{{.*}} "-triple" "spir64_fpga-unknown-unknown-sycldevice" {{.*}} "-fsycl-int-header=[[INPUT1:.+\.h]]" "-D__ENABLE_USM_ADDR_SPACE__" "-faddrsig"
221221
// CHK-TOOLS-GEN: clang{{.*}} "-triple" "spir64_gen-unknown-unknown-sycldevice" {{.*}} "-fsycl-int-header=[[INPUT1:.+\.h]]" "-faddrsig"
222222
// CHK-TOOLS-CPU: clang{{.*}} "-triple" "spir64_x86_64-unknown-unknown-sycldevice" {{.*}} "-fsycl-int-header=[[INPUT1:.+\.h]]" "-faddrsig"
223223
// CHK-TOOLS-AOT: clang{{.*}} "-triple" "x86_64-unknown-linux-gnu" {{.*}} "-include" "[[INPUT1]]" {{.*}} "-o" "[[OUTPUT10:.+\.o]]"

‎clang/test/Driver/sycl-offload.c

Lines changed: 13 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -646,13 +646,21 @@
646646
// RUN: | FileCheck %s -check-prefixes=CHK-TOOLS-AOT,CHK-TOOLS-FPGA,CHK-TOOLS-FPGA-USM-DISABLE
647647
// RUN: %clang -target x86_64-unknown-linux-gnu -fsycl -fintelfpga %s -### 2>&1 \
648648
// RUN: | FileCheck %s -check-prefixes=CHK-TOOLS-AOT,CHK-TOOLS-FPGA,CHK-TOOLS-FPGA-USM-DISABLE
649-
// RUN: %clang -target x86_64-unknown-linux-gnu -fsycl -fsycl-targets=spir64_fpga-unknown-unknown-sycldevice -fsycl-enable-usm-address-spaces %s -### 2>&1 \
649+
// RUN: %clang -target x86_64-unknown-linux-gnu -fsycl -fsycl-targets=spir64_fpga-unknown-unknown-sycldevice -Xshardware %s -### 2>&1 \
650650
// RUN: | FileCheck %s -check-prefixes=CHK-TOOLS-AOT,CHK-TOOLS-FPGA,CHK-TOOLS-FPGA-USM-ENABLE
651-
// RUN: %clang -target x86_64-unknown-linux-gnu -fsycl -fintelfpga -fsycl-enable-usm-address-spaces %s -### 2>&1 \
651+
// RUN: %clang -target x86_64-unknown-linux-gnu -fsycl -fintelfpga -Xshardware %s -### 2>&1 \
652652
// RUN: | FileCheck %s -check-prefixes=CHK-TOOLS-AOT,CHK-TOOLS-FPGA,CHK-TOOLS-FPGA-USM-ENABLE
653-
// RUN: %clang -target x86_64-unknown-linux-gnu -fsycl -fsycl-targets=spir64_gen-unknown-unknown-sycldevice -fsycl-enable-usm-address-spaces %s -### 2>&1 \
653+
// RUN: %clang -target x86_64-unknown-linux-gnu -fsycl -fsycl-targets=spir64_fpga-unknown-unknown-sycldevice -Xssimulation %s -### 2>&1 \
654+
// RUN: | FileCheck %s -check-prefixes=CHK-TOOLS-AOT,CHK-TOOLS-FPGA,CHK-TOOLS-FPGA-USM-ENABLE
655+
// RUN: %clang -target x86_64-unknown-linux-gnu -fsycl -fintelfpga -Xssimulation %s -### 2>&1 \
656+
// RUN: | FileCheck %s -check-prefixes=CHK-TOOLS-AOT,CHK-TOOLS-FPGA,CHK-TOOLS-FPGA-USM-ENABLE
657+
// RUN: %clang -target x86_64-unknown-linux-gnu -fsycl -fsycl-targets=spir64_fpga-unknown-unknown-sycldevice -Xsemulator %s -### 2>&1 \
658+
// RUN: | FileCheck %s -check-prefixes=CHK-TOOLS-AOT,CHK-TOOLS-FPGA,CHK-TOOLS-FPGA-USM-DISABLE
659+
// RUN: %clang -target x86_64-unknown-linux-gnu -fsycl -fintelfpga -Xsemulator %s -### 2>&1 \
660+
// RUN: | FileCheck %s -check-prefixes=CHK-TOOLS-AOT,CHK-TOOLS-FPGA,CHK-TOOLS-FPGA-USM-DISABLE
661+
// RUN: %clang -target x86_64-unknown-linux-gnu -fsycl -fsycl-targets=spir64_gen-unknown-unknown-sycldevice %s -### 2>&1 \
654662
// RUN: | FileCheck %s -check-prefixes=CHK-TOOLS-AOT,CHK-TOOLS-GEN
655-
// RUN: %clang -target x86_64-unknown-linux-gnu -fsycl -fsycl-targets=spir64_x86_64-unknown-unknown-sycldevice -fsycl-enable-usm-address-spaces %s -### 2>&1 \
663+
// RUN: %clang -target x86_64-unknown-linux-gnu -fsycl -fsycl-targets=spir64_x86_64-unknown-unknown-sycldevice %s -### 2>&1 \
656664
// RUN: | FileCheck %s -check-prefixes=CHK-TOOLS-AOT,CHK-TOOLS-CPU
657665
// RUN: %clang -target x86_64-unknown-linux-gnu -fsycl -fsycl-targets=spir64_gen-unknown-unknown-sycldevice %s -### 2>&1 \
658666
// RUN: | FileCheck %s -check-prefixes=CHK-TOOLS-AOT,CHK-TOOLS-GEN
@@ -672,8 +680,7 @@
672680
// CHK-TOOLS-GEN: clang-offload-wrapper{{.*}} "-o=[[OUTPUT5:.+\.bc]]" "-host=x86_64-unknown-linux-gnu" "-target=spir64_gen{{.*}}" "-kind=sycl" "[[OUTPUT4]]"
673681
// CHK-TOOLS-CPU: clang-offload-wrapper{{.*}} "-o=[[OUTPUT5:.+\.bc]]" "-host=x86_64-unknown-linux-gnu" "-target=spir64_x86_64{{.*}}" "-kind=sycl" "[[OUTPUT4]]"
674682
// CHK-TOOLS-AOT: llc{{.*}} "-filetype=obj" "-o" "[[OUTPUT6:.+\.o]]" "[[OUTPUT5]]"
675-
// CHK-TOOLS-FPGA-USM-DISABLE: clang{{.*}} "-triple" "spir64_fpga-unknown-unknown-sycldevice" {{.*}} "-fsycl-int-header=[[INPUT1:.+\.h]]" "-faddrsig"
676-
// CHK-TOOLS-FPGA-USM-ENABLE: clang{{.*}} "-triple" "spir64_fpga-unknown-unknown-sycldevice" {{.*}} "-fsycl-int-header=[[INPUT1:.+\.h]]" "-D__ENABLE_USM_ADDR_SPACE__" "-faddrsig"
683+
// CHK-TOOLS-FPGA: clang{{.*}} "-triple" "spir64_fpga-unknown-unknown-sycldevice" {{.*}} "-fsycl-int-header=[[INPUT1:.+\.h]]" "-D__ENABLE_USM_ADDR_SPACE__" "-faddrsig"
677684
// CHK-TOOLS-GEN: clang{{.*}} "-triple" "spir64_gen-unknown-unknown-sycldevice" {{.*}} "-fsycl-int-header=[[INPUT1:.+\.h]]" "-faddrsig"
678685
// CHK-TOOLS-CPU: clang{{.*}} "-triple" "spir64_x86_64-unknown-unknown-sycldevice" {{.*}} "-fsycl-int-header=[[INPUT1:.+\.h]]" "-faddrsig"
679686
// CHK-TOOLS-AOT: clang{{.*}} "-triple" "x86_64-unknown-linux-gnu" {{.*}} "-include" "[[INPUT1]]" {{.*}} "-o" "[[OUTPUT7:.+\.o]]"

‎sycl/include/CL/sycl/types.hpp

Lines changed: 28 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2117,6 +2117,14 @@ using select_apply_cl_t =
21172117
GET_CL_TYPE(int, num), GET_CL_TYPE(long, num)>; \
21182118
};
21192119

2120+
#define DECLARE_BOOL_CONVERTER(num) \
2121+
template <> class BaseCLTypeConverter<bool, num> { \
2122+
public: \
2123+
using DataType = detail::select_apply_cl_t< \
2124+
bool, GET_CL_TYPE(char, num), GET_CL_TYPE(short, num), \
2125+
GET_CL_TYPE(int, num), GET_CL_TYPE(long, num)>; \
2126+
};
2127+
21202128
#define DECLARE_HALF_CONVERTER(base, num) \
21212129
template <> class BaseCLTypeConverter<base, num> { \
21222130
public: \
@@ -2129,6 +2137,12 @@ using select_apply_cl_t =
21292137
using DataType = schar; \
21302138
};
21312139

2140+
#define DECLARE_SCALAR_BOOL_CONVERTER \
2141+
template <> class BaseCLTypeConverter<bool, 1> { \
2142+
public: \
2143+
using DataType = bool; \
2144+
};
2145+
21322146
#define DECLARE_SCALAR_CONVERTER(base) \
21332147
template <> class BaseCLTypeConverter<base, 1> { \
21342148
public: \
@@ -2212,8 +2226,19 @@ using select_apply_cl_t =
22122226
DECLARE_SCALAR_SCHAR_CONVERTER \
22132227
} // namespace detail
22142228

2229+
#define DECLARE_BOOL_VECTOR_CONVERTERS \
2230+
namespace detail { \
2231+
DECLARE_BOOL_CONVERTER(2) \
2232+
DECLARE_BOOL_CONVERTER(3) \
2233+
DECLARE_BOOL_CONVERTER(4) \
2234+
DECLARE_BOOL_CONVERTER(8) \
2235+
DECLARE_BOOL_CONVERTER(16) \
2236+
DECLARE_SCALAR_BOOL_CONVERTER \
2237+
} // namespace detail
2238+
22152239
DECLARE_VECTOR_CONVERTERS(char)
22162240
DECLARE_SCHAR_VECTOR_CONVERTERS
2241+
DECLARE_BOOL_VECTOR_CONVERTERS
22172242
DECLARE_UNSIGNED_INTEGRAL_VECTOR_CONVERTERS(uchar)
22182243
DECLARE_SIGNED_INTEGRAL_VECTOR_CONVERTERS(short)
22192244
DECLARE_UNSIGNED_INTEGRAL_VECTOR_CONVERTERS(ushort)
@@ -2236,6 +2261,9 @@ DECLARE_FLOAT_VECTOR_CONVERTERS(double)
22362261
#undef DECLARE_SCHAR_VECTOR_CONVERTERS
22372262
#undef DECLARE_SCHAR_CONVERTER
22382263
#undef DECLARE_SCALAR_SCHAR_CONVERTER
2264+
#undef DECLARE_BOOL_VECTOR_CONVERTERS
2265+
#undef DECLARE_BOOL_CONVERTER
2266+
#undef DECLARE_SCALAR_BOOL_CONVERTER
22392267

22402268
} // namespace sycl
22412269
} // __SYCL_INLINE_NAMESPACE(cl)

‎sycl/source/CMakeLists.txt

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -129,6 +129,7 @@ set(SYCL_SOURCES
129129
"detail/sampler_impl.cpp"
130130
"detail/stream_impl.cpp"
131131
"detail/scheduler/commands.cpp"
132+
"detail/scheduler/leaves_collection.cpp"
132133
"detail/scheduler/scheduler.cpp"
133134
"detail/scheduler/graph_processor.cpp"
134135
"detail/scheduler/graph_builder.cpp"

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