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1 parent a43c5bd commit 27e5e55Copy full SHA for 27e5e55
clang/test/CodeGenSYCL/fpga-attr-do-while-loops.cpp
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-// RUN: %clang++ -fsycl-device-only -fintelfpga -S %s -o - | FileCheck %s
+// RUN: %clang -fsycl-device-only -fintelfpga -S %s -o - | FileCheck %s
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#include "Inputs/sycl.hpp"
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