[ESIMD] Preserve debug info in LowerESIMD pass (#3482)

[ESIMD] Preserve debug info in LowerESIMD pass

Author: DenisBakhvalov

llvm/lib/SYCLLowerIR/LowerESIMD.cpp

@@ -813,6 +813,12 @@ static Instruction *generateVectorGenXForSpirv(ExtractElementInst *EEI,
   Instruction *ExtrI = ExtractElementInst::Create(
       IntrI, ConstantInt::get(I32Ty, ExtractIndex), ExtractName, EEI);
   Instruction *CastI = addCastInstIfNeeded(EEI, ExtrI);
+  if (EEI->getDebugLoc()) {
+    IntrI->setDebugLoc(EEI->getDebugLoc());
+    ExtrI->setDebugLoc(EEI->getDebugLoc());
+    // It's OK if ExtrI and CastI is the same instruction
+    CastI->setDebugLoc(EEI->getDebugLoc());
+  }
   return CastI;
 }
 
@@ -839,6 +845,11 @@ static Instruction *generateGenXForSpirv(ExtractElementInst *EEI,
   Instruction *IntrI =
       IntrinsicInst::Create(NewFDecl, {}, IntrinName + Suff.str(), EEI);
   Instruction *CastI = addCastInstIfNeeded(EEI, IntrI);
+  if (EEI->getDebugLoc()) {
+    IntrI->setDebugLoc(EEI->getDebugLoc());
+    // It's OK if IntrI and CastI is the same instruction
+    CastI->setDebugLoc(EEI->getDebugLoc());
+  }
   return CastI;
 }
 
@@ -1093,6 +1104,8 @@ static void translateESIMDIntrinsicCall(CallInst &CI) {
       NewFDecl, GenXArgs,
       NewFDecl->getReturnType()->isVoidTy() ? "" : CI.getName() + ".esimd",
       &CI);
+  if (CI.getDebugLoc())
+    NewCI->setDebugLoc(CI.getDebugLoc());
   NewCI = addCastInstIfNeeded(&CI, NewCI);
   CI.replaceAllUsesWith(NewCI);
   CI.eraseFromParent();

llvm/test/SYCLLowerIR/esimd_lower_debug_info.ll

@@ -0,0 +1,49 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -debugify -LowerESIMD -S < %s | FileCheck %s
+
+; This test checks that debug info is preserved during lowering
+; ESIMD specific constructs.
+
+@__spirv_BuiltInGlobalInvocationId = external dso_local local_unnamed_addr addrspace(1) constant <3 x i64>, align 32
+
+declare spir_func <16 x float> @_Z18__esimd_block_readIfLi16EPU3AS1fEN2cl4sycl5INTEL3gpu11vector_typeIT_XT0_EE4typeET1_j(float addrspace(1)*, i32)
+
+define spir_func void @func1(float addrspace(1)* %arg1, i32 %arg2 ){
+; CHECK-LABEL: @func1(
+; CHECK-NEXT:    [[TMP1:%.*]] = ptrtoint float addrspace(1)* [[ARG1:%.*]] to i32, !dbg [[DBG11:![0-9]+]]
+; CHECK-NEXT:    [[CALL1_I_I_ESIMD:%.*]] = call <16 x float> @llvm.genx.oword.ld.unaligned.v16f32(i32 0, i32 [[TMP1]], i32 [[ARG2:%.*]]), !dbg [[DBG11]]
+; CHECK-NEXT:    call void @llvm.dbg.value(metadata <16 x float> [[CALL1_I_I_ESIMD]], metadata [[META9:![0-9]+]], metadata !DIExpression()), !dbg [[DBG11]]
+; CHECK-NEXT:    ret void, !dbg [[DBG12:![0-9]+]]
+;
+  %call1.i.i = tail call spir_func <16 x float> @_Z18__esimd_block_readIfLi16EPU3AS1fEN2cl4sycl5INTEL3gpu11vector_typeIT_XT0_EE4typeET1_j(float addrspace(1)* %arg1, i32 %arg2)
+  ret void
+}
+
+define spir_func void @func2(i64 addrspace(1)* %arg1) {
+; CHECK-LABEL: @func2(
+; CHECK-NEXT:    call void @llvm.dbg.value(metadata <3 x i64> undef, metadata [[META15:![0-9]+]], metadata !DIExpression()), !dbg [[DBG21:![0-9]+]]
+; CHECK-NEXT:    [[DOTESIMD:%.*]] = call <3 x i32> @llvm.genx.local.id.v3i32(), !dbg [[DBG22:![0-9]+]]
+; CHECK-NEXT:    [[LOCAL_ID_X:%.*]] = extractelement <3 x i32> [[DOTESIMD]], i32 0, !dbg [[DBG22]]
+; CHECK-NEXT:    [[LOCAL_ID_X_CAST_TY:%.*]] = zext i32 [[LOCAL_ID_X]] to i64, !dbg [[DBG22]]
+; CHECK-NEXT:    [[DOTESIMD1:%.*]] = call <3 x i32> @llvm.genx.local.size.v3i32(), !dbg [[DBG22]]
+; CHECK-NEXT:    [[WGSIZE_X:%.*]] = extractelement <3 x i32> [[DOTESIMD1]], i32 0, !dbg [[DBG22]]
+; CHECK-NEXT:    [[WGSIZE_X_CAST_TY:%.*]] = zext i32 [[WGSIZE_X]] to i64, !dbg [[DBG22]]
+; CHECK-NEXT:    [[GROUP_ID_X:%.*]] = call i32 @llvm.genx.group.id.x(), !dbg [[DBG22]]
+; CHECK-NEXT:    [[GROUP_ID_X_CAST_TY:%.*]] = zext i32 [[GROUP_ID_X]] to i64, !dbg [[DBG22]]
+; CHECK-NEXT:    [[MUL:%.*]] = mul i64 [[WGSIZE_X_CAST_TY]], [[GROUP_ID_X_CAST_TY]]
+; CHECK-NEXT:    [[ADD:%.*]] = add i64 [[LOCAL_ID_X_CAST_TY]], [[MUL]]
+; CHECK-NEXT:    call void @llvm.dbg.value(metadata i64 [[ADD]], metadata [[META17:![0-9]+]], metadata !DIExpression()), !dbg [[DBG22]]
+; CHECK-NEXT:    [[PTRIDX_I_I:%.*]] = getelementptr inbounds i64, i64 addrspace(1)* [[ARG1:%.*]], i64 2, !dbg [[DBG23:![0-9]+]]
+; CHECK-NEXT:    call void @llvm.dbg.value(metadata i64 addrspace(1)* [[PTRIDX_I_I]], metadata [[META19:![0-9]+]], metadata !DIExpression()), !dbg [[DBG23]]
+; CHECK-NEXT:    [[PTRIDX_ASCAST_I_I:%.*]] = addrspacecast i64 addrspace(1)* [[PTRIDX_I_I]] to i64 addrspace(4)*, !dbg [[DBG24:![0-9]+]]
+; CHECK-NEXT:    call void @llvm.dbg.value(metadata i64 addrspace(4)* [[PTRIDX_ASCAST_I_I]], metadata [[META20:![0-9]+]], metadata !DIExpression()), !dbg [[DBG24]]
+; CHECK-NEXT:    store i64 [[ADD]], i64 addrspace(4)* [[PTRIDX_ASCAST_I_I]], align 4, !dbg [[DBG25:![0-9]+]]
+; CHECK-NEXT:    ret void, !dbg [[DBG26:![0-9]+]]
+;
+  %1 = load <3 x i64>, <3 x i64> addrspace(4)* addrspacecast (<3 x i64> addrspace(1)* @__spirv_BuiltInGlobalInvocationId to <3 x i64> addrspace(4)*)
+  %2 = extractelement <3 x i64> %1, i64 0
+  %ptridx.i.i = getelementptr inbounds i64, i64 addrspace(1)* %arg1, i64 2
+  %ptridx.ascast.i.i = addrspacecast i64 addrspace(1)* %ptridx.i.i to i64 addrspace(4)*
+  store i64 %2, i64 addrspace(4)* %ptridx.ascast.i.i
+  ret void
+}