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Merge remote-tracking branch 'remote/sycl' into max-attr-scratch
2 parents fbd9a03 + 4c6ea6e commit 350744a

33 files changed

+1252
-451
lines changed

clang/include/clang/Basic/Attr.td

Lines changed: 10 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1878,16 +1878,18 @@ def SYCLIntelFPGAIVDep : StmtAttr {
18781878
let Documentation = [SYCLIntelFPGAIVDepAttrDocs];
18791879
}
18801880

1881-
def SYCLIntelFPGAInitiationInterval : StmtAttr {
1881+
def SYCLIntelFPGAInitiationInterval : DeclOrStmtAttr {
18821882
let Spellings = [CXX11<"intelfpga","ii">,
18831883
CXX11<"intel","ii">,
18841884
CXX11<"intel", "initiation_interval">];
1885-
let Subjects = SubjectList<[ForStmt, CXXForRangeStmt, WhileStmt, DoStmt],
1886-
ErrorDiag, "'for', 'while', and 'do' statements">;
1885+
let Subjects = SubjectList<[ForStmt, CXXForRangeStmt, WhileStmt, DoStmt, Function],
1886+
ErrorDiag,
1887+
"'for', 'while', 'do' statements, and functions">;
18871888
let Args = [ExprArgument<"IntervalExpr", /*opt*/1>];
18881889
let LangOpts = [SYCLIsDevice, SilentlyIgnoreSYCLIsHost];
18891890
let HasCustomTypeTransform = 1;
18901891
let Documentation = [SYCLIntelFPGAInitiationIntervalAttrDocs];
1892+
let SupportsNonconformingLambdaSyntax = 1;
18911893
}
18921894

18931895
def SYCLIntelFPGAMaxConcurrency : DeclOrStmtAttr {
@@ -1913,14 +1915,16 @@ def SYCLIntelFPGALoopCoalesce : StmtAttr {
19131915
let Documentation = [SYCLIntelFPGALoopCoalesceAttrDocs];
19141916
}
19151917

1916-
def SYCLIntelFPGADisableLoopPipelining : StmtAttr {
1918+
def SYCLIntelFPGADisableLoopPipelining : DeclOrStmtAttr {
19171919
let Spellings = [CXX11<"intelfpga","disable_loop_pipelining">,
19181920
CXX11<"intel","disable_loop_pipelining">];
1919-
let Subjects = SubjectList<[ForStmt, CXXForRangeStmt, WhileStmt, DoStmt],
1920-
ErrorDiag, "'for', 'while', and 'do' statements">;
1921+
let Subjects = SubjectList<[ForStmt, CXXForRangeStmt, WhileStmt, DoStmt, Function],
1922+
ErrorDiag,
1923+
"'for', 'while', 'do' statements, and functions">;
19211924
let LangOpts = [SYCLIsDevice, SilentlyIgnoreSYCLIsHost];
19221925
let HasCustomTypeTransform = 1;
19231926
let Documentation = [SYCLIntelFPGADisableLoopPipeliningAttrDocs];
1927+
let SupportsNonconformingLambdaSyntax = 1;
19241928
}
19251929

19261930
def SYCLIntelFPGAMaxInterleaving : StmtAttr {

clang/include/clang/Basic/AttrDocs.td

Lines changed: 17 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -2832,9 +2832,11 @@ def SYCLIntelFPGAInitiationIntervalAttrDocs : Documentation {
28322832
let Category = DocCatVariable;
28332833
let Heading = "intel::initiation_interval";
28342834
let Content = [{
2835-
This attribute applies to a loop. Indicates that the loop should be pipelined
2836-
with an initiation interval of N. N must be a positive integer. Cannot be
2837-
applied multiple times to the same loop.
2835+
This attribute applies to a loop or a function. Indicates that the loop or
2836+
function should be pipelined with an initiation interval of N. N must be a
2837+
positive integer. Cannot be applied multiple times to the same loop or function.
2838+
Cannot be used on the same loop or function in conjunction with
2839+
disable_loop_pipelining.
28382840

28392841
The ``[[intel::ii]]`` attribute spelling is a deprecated synonym for
28402842
``[[intel::initiation_interval]]`` and will be removed in the future.
@@ -2846,11 +2848,16 @@ The ``[[intel::ii]]`` attribute spelling is a deprecated synonym for
28462848
[[intel::initiation_interval(4)]] for (int i = 0; i < 10; ++i) var++;
28472849
}
28482850

2851+
[[intel::initiation_interval(4)]] void foo1 { }
2852+
28492853
template<int N>
28502854
void bar() {
28512855
[[intel::initiation_interval(N)]] for(;;) { }
28522856
}
28532857

2858+
template<int N>
2859+
[[intel::initiation_interval(N)]] void bar1 { }
2860+
28542861
}];
28552862
}
28562863

@@ -2924,10 +2931,11 @@ def SYCLIntelFPGADisableLoopPipeliningAttrDocs : Documentation {
29242931
let Category = DocCatVariable;
29252932
let Heading = "intel::disable_loop_pipelining";
29262933
let Content = [{
2927-
This attribute applies to a loop. Disables pipelining of the loop data path,
2928-
causing the loop to be executed serially. Cannot be used on the same loop in
2929-
conjunction with max_interleaving, speculated_iterations, max_concurrency, ii
2930-
or ivdep.
2934+
This attribute applies to a loop or a function. Takes no arguments and
2935+
disables pipelining of the loop or function data path, causing the loop
2936+
or function to be executed serially. Cannot be used on the same loop or
2937+
function in conjunction with max_interleaving, speculated_iterations,
2938+
max_concurrency, initiation_interval, or ivdep.
29312939

29322940
.. code-block:: c++
29332941

@@ -2936,6 +2944,8 @@ or ivdep.
29362944
[[intel::disable_loop_pipelining] for (int i = 0; i < 10; ++i) var++;
29372945
}
29382946

2947+
[[intel::disable_loop_pipelining] void foo1() { }
2948+
29392949
}];
29402950
}
29412951

clang/include/clang/Basic/DiagnosticSemaKinds.td

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -11214,6 +11214,8 @@ def err_ext_int_max_size : Error<"%select{signed|unsigned}0 _ExtInt of bit "
1121411214
"sizes greater than %1 not supported">;
1121511215
def err_esimd_glob_cant_init : Error<
1121611216
"SYCL explicit SIMD does not permit private global variable to have an initializer">;
11217+
def err_esimd_global_in_sycl_context : Error<
11218+
"ESIMD globals cannot be used in a SYCL context">;
1121711219

1121811220
def err_sycl_kernel_incorrectly_named : Error<"%0 is an invalid kernel name type">;
1121911221
def note_invalid_type_in_sycl_kernel : Note<

clang/include/clang/Sema/Sema.h

Lines changed: 64 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1769,6 +1769,34 @@ class Sema final {
17691769
}
17701770
};
17711771

1772+
/// Bitmask to contain the list of reasons a single diagnostic should be
1773+
/// emitted, based on its language. This permits multiple offload systems
1774+
/// to coexist in the same translation unit.
1775+
enum class DeviceDiagnosticReason {
1776+
/// Diagnostic doesn't apply to anything. Included for completeness, but
1777+
/// should make this a no-op.
1778+
None = 0,
1779+
/// OpenMP specific diagnostic.
1780+
OmpDevice = 1 << 0,
1781+
OmpHost = 1 << 1,
1782+
OmpAll = OmpDevice | OmpHost,
1783+
/// CUDA specific diagnostics.
1784+
CudaDevice = 1 << 2,
1785+
CudaHost = 1 << 3,
1786+
CudaAll = CudaDevice | CudaHost,
1787+
/// SYCL specific diagnostic.
1788+
Sycl = 1 << 4,
1789+
/// ESIMD specific diagnostic.
1790+
Esimd = 1 << 5,
1791+
/// A flag representing 'all'. This can be used to avoid the check
1792+
/// all-together and make this behave as it did before the
1793+
/// DiagnosticReason was added (that is, unconditionally emit).
1794+
/// Note: This needs to be updated if any flags above are added.
1795+
All = OmpAll | CudaAll | Sycl | Esimd,
1796+
1797+
LLVM_MARK_AS_BITMASK_ENUM(/*LargestValue=*/All)
1798+
};
1799+
17721800
/// A generic diagnostic builder for errors which may or may not be deferred.
17731801
///
17741802
/// In CUDA, there exist constructs (e.g. variable-length arrays, try/catch)
@@ -1801,7 +1829,7 @@ class Sema final {
18011829
};
18021830

18031831
SemaDiagnosticBuilder(Kind K, SourceLocation Loc, unsigned DiagID,
1804-
FunctionDecl *Fn, Sema &S);
1832+
FunctionDecl *Fn, Sema &S, DeviceDiagnosticReason R);
18051833
SemaDiagnosticBuilder(SemaDiagnosticBuilder &&D);
18061834
SemaDiagnosticBuilder(const SemaDiagnosticBuilder &) = default;
18071835
~SemaDiagnosticBuilder();
@@ -1826,7 +1854,9 @@ class Sema final {
18261854
if (Diag.ImmediateDiag.hasValue())
18271855
*Diag.ImmediateDiag << Value;
18281856
else if (Diag.PartialDiagId.hasValue())
1829-
Diag.S.DeviceDeferredDiags[Diag.Fn][*Diag.PartialDiagId].second
1857+
Diag.S.DeviceDeferredDiags[Diag.Fn][*Diag.PartialDiagId]
1858+
.getDiag()
1859+
.second
18301860
<< Value;
18311861
return Diag;
18321862
}
@@ -1840,7 +1870,8 @@ class Sema final {
18401870
if (ImmediateDiag.hasValue())
18411871
*ImmediateDiag << std::move(V);
18421872
else if (PartialDiagId.hasValue())
1843-
S.DeviceDeferredDiags[Fn][*PartialDiagId].second << std::move(V);
1873+
S.DeviceDeferredDiags[Fn][*PartialDiagId].getDiag().second
1874+
<< std::move(V);
18441875
return *this;
18451876
}
18461877

@@ -1849,15 +1880,18 @@ class Sema final {
18491880
if (Diag.ImmediateDiag.hasValue())
18501881
PD.Emit(*Diag.ImmediateDiag);
18511882
else if (Diag.PartialDiagId.hasValue())
1852-
Diag.S.DeviceDeferredDiags[Diag.Fn][*Diag.PartialDiagId].second = PD;
1883+
Diag.S.DeviceDeferredDiags[Diag.Fn][*Diag.PartialDiagId]
1884+
.getDiag()
1885+
.second = PD;
18531886
return Diag;
18541887
}
18551888

18561889
void AddFixItHint(const FixItHint &Hint) const {
18571890
if (ImmediateDiag.hasValue())
18581891
ImmediateDiag->AddFixItHint(Hint);
18591892
else if (PartialDiagId.hasValue())
1860-
S.DeviceDeferredDiags[Fn][*PartialDiagId].second.AddFixItHint(Hint);
1893+
S.DeviceDeferredDiags[Fn][*PartialDiagId].getDiag().second.AddFixItHint(
1894+
Hint);
18611895
}
18621896

18631897
friend ExprResult ExprError(const SemaDiagnosticBuilder &) {
@@ -4281,6 +4315,7 @@ class Sema final {
42814315
};
42824316
FunctionEmissionStatus getEmissionStatus(FunctionDecl *Decl,
42834317
bool Final = false);
4318+
DeviceDiagnosticReason getEmissionReason(const FunctionDecl *Decl);
42844319

42854320
// Whether the callee should be ignored in CUDA/HIP/OpenMP host/device check.
42864321
bool shouldIgnoreInHostDeviceCheck(FunctionDecl *Callee);
@@ -10263,6 +10298,11 @@ class Sema final {
1026310298
IntelFPGAForcePow2DepthAttr *
1026410299
MergeIntelFPGAForcePow2DepthAttr(Decl *D,
1026510300
const IntelFPGAForcePow2DepthAttr &A);
10301+
void AddSYCLIntelFPGAInitiationIntervalAttr(Decl *D,
10302+
const AttributeCommonInfo &CI,
10303+
Expr *E);
10304+
SYCLIntelFPGAInitiationIntervalAttr *MergeSYCLIntelFPGAInitiationIntervalAttr(
10305+
Decl *D, const SYCLIntelFPGAInitiationIntervalAttr &A);
1026610306

1026710307
SYCLIntelFPGAMaxConcurrencyAttr *MergeSYCLIntelFPGAMaxConcurrencyAttr(
1026810308
Decl *D, const SYCLIntelFPGAMaxConcurrencyAttr &A);
@@ -12166,11 +12206,25 @@ class Sema final {
1216612206
/// before incrementing, so you can emit an error.
1216712207
bool PopForceCUDAHostDevice();
1216812208

12209+
class DeviceDeferredDiagnostic {
12210+
public:
12211+
DeviceDeferredDiagnostic(SourceLocation SL, const PartialDiagnostic &PD,
12212+
DeviceDiagnosticReason R)
12213+
: Diagnostic(SL, PD), Reason(R) {}
12214+
12215+
PartialDiagnosticAt &getDiag() { return Diagnostic; }
12216+
DeviceDiagnosticReason getReason() const { return Reason; }
12217+
12218+
private:
12219+
PartialDiagnosticAt Diagnostic;
12220+
DeviceDiagnosticReason Reason;
12221+
};
12222+
1216912223
/// Diagnostics that are emitted only if we discover that the given function
1217012224
/// must be codegen'ed. Because handling these correctly adds overhead to
1217112225
/// compilation, this is currently only enabled for CUDA compilations.
1217212226
llvm::DenseMap<CanonicalDeclPtr<FunctionDecl>,
12173-
std::vector<PartialDiagnosticAt>>
12227+
std::vector<DeviceDeferredDiagnostic>>
1217412228
DeviceDeferredDiags;
1217512229

1217612230
/// A pair of a canonical FunctionDecl and a SourceLocation. When used as the
@@ -13133,8 +13187,10 @@ class Sema final {
1313313187
/// if (!S.Context.getTargetInfo().hasFloat128Type() &&
1313413188
/// S.getLangOpts().SYCLIsDevice)
1313513189
/// SYCLDiagIfDeviceCode(Loc, diag::err_type_unsupported) << "__float128";
13136-
SemaDiagnosticBuilder SYCLDiagIfDeviceCode(SourceLocation Loc,
13137-
unsigned DiagID);
13190+
SemaDiagnosticBuilder SYCLDiagIfDeviceCode(
13191+
SourceLocation Loc, unsigned DiagID,
13192+
DeviceDiagnosticReason Reason = DeviceDiagnosticReason::Sycl |
13193+
DeviceDiagnosticReason::Esimd);
1313813194

1313913195
/// Check whether we're allowed to call Callee from the current context.
1314013196
///

clang/lib/CodeGen/CodeGenFunction.cpp

Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -745,6 +745,21 @@ void CodeGenFunction::EmitOpenCLKernelMetadata(const FunctionDecl *FD,
745745
llvm::Metadata *AttrMDArgs[] = {
746746
llvm::ConstantAsMetadata::get(Builder.getInt32(ArgVal.getSExtValue()))};
747747
Fn->setMetadata("max_concurrency", llvm::MDNode::get(Context, AttrMDArgs));
748+
749+
if (FD->hasAttr<SYCLIntelFPGADisableLoopPipeliningAttr>()) {
750+
llvm::Metadata *AttrMDArgs[] = {
751+
llvm::ConstantAsMetadata::get(Builder.getInt32(1))};
752+
Fn->setMetadata("disable_loop_pipelining",
753+
llvm::MDNode::get(Context, AttrMDArgs));
754+
}
755+
756+
if (const auto *A = FD->getAttr<SYCLIntelFPGAInitiationIntervalAttr>()) {
757+
const auto *CE = cast<ConstantExpr>(A->getIntervalExpr());
758+
llvm::APSInt ArgVal = CE->getResultAsAPSInt();
759+
llvm::Metadata *AttrMDArgs[] = {
760+
llvm::ConstantAsMetadata::get(Builder.getInt32(ArgVal.getSExtValue()))};
761+
Fn->setMetadata("initiation_interval",
762+
llvm::MDNode::get(Context, AttrMDArgs));
748763
}
749764
}
750765

clang/lib/Frontend/InitPreprocessor.cpp

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1139,8 +1139,6 @@ static void InitializePredefinedMacros(const TargetInfo &TI,
11391139
Builder.defineMacro("__SYCL_NVPTX__", "1");
11401140
}
11411141
}
1142-
if (LangOpts.SYCLExplicitSIMD)
1143-
Builder.defineMacro("__SYCL_EXPLICIT_SIMD__", "1");
11441142
if (LangOpts.SYCLUnnamedLambda)
11451143
Builder.defineMacro("__SYCL_UNNAMED_LAMBDA__", "1");
11461144

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