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[SYCL][Codegen] Add -opaque-pointers to fix LIT tests (#10489)
Guard tests under macro `INTEL_SYCL_OPAQUEPOINTER_READY`
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6 files changed

+33
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‎llvm/test/CodeGen/X86/MergeConsecutiveStores.ll

Lines changed: 4 additions & 2 deletions
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@@ -1,6 +1,8 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2-
; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx -fixup-byte-word-insts=1 < %s | FileCheck -check-prefix=CHECK -check-prefix=BWON %s
3-
; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx -fixup-byte-word-insts=0 < %s | FileCheck -check-prefix=CHECK -check-prefix=BWOFF %s
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; ifndef INTEL_SYCL_OPAQUEPOINTER_READY
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; RUN: llc -opaque-pointers -mtriple=x86_64-unknown-unknown -mattr=+avx -fixup-byte-word-insts=1 < %s | FileCheck -check-prefix=CHECK -check-prefix=BWON %s
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; RUN: llc -opaque-pointers -mtriple=x86_64-unknown-unknown -mattr=+avx -fixup-byte-word-insts=0 < %s | FileCheck -check-prefix=CHECK -check-prefix=BWOFF %s
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; end
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%struct.A = type { i8, i8, i8, i8, i8, i8, i8, i8 }
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%struct.B = type { i32, i32, i32, i32, i32, i32, i32, i32 }

‎llvm/test/CodeGen/X86/avx512-broadcast-unfold.ll

Lines changed: 3 additions & 1 deletion
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@@ -1,5 +1,7 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2-
; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=avx512vl | FileCheck %s
2+
; ifndef INTEL_SYCL_OPAQUEPOINTER_READY
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; RUN: llc -opaque-pointers < %s -mtriple=x86_64-pc-linux -mattr=avx512vl | FileCheck %s
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; end
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; Test that we can unfold constant pool loads when we're using avx512's
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; ability to fold a broadcast load into an operation.

‎llvm/test/CodeGen/X86/block-placement.ll

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,7 @@
1-
; RUN: llc -mtriple=i686-linux -pre-RA-sched=source < %s | FileCheck %s
2-
; RUN: opt -disable-output -passes=debugify < %s
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; ifndef INTEL_SYCL_OPAQUEPOINTER_READY
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; RUN: llc -opaque-pointers -mtriple=i686-linux -pre-RA-sched=source < %s | FileCheck %s
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; RUN: opt -opaque-pointers -disable-output -passes=debugify < %s
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; end
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declare void @error(i32 %i, i32 %a, i32 %b)
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‎llvm/test/CodeGen/X86/lsr-loop-exit-cond.ll

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,8 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2-
; RUN: llc < %s -mtriple=x86_64-darwin | FileCheck %s --check-prefix=GENERIC
3-
; RUN: llc < %s -mtriple=x86_64-darwin -mcpu=atom | FileCheck %s --check-prefix=ATOM
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; ifndef INTEL_SYCL_OPAQUEPOINTER_READY
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; RUN: llc -opaque-pointers < %s -mtriple=x86_64-darwin | FileCheck %s --check-prefix=GENERIC
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; RUN: llc -opaque-pointers < %s -mtriple=x86_64-darwin -mcpu=atom | FileCheck %s --check-prefix=ATOM
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; end
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@Te0 = external global [256 x i32] ; <[256 x i32]*> [#uses=5]
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@Te1 = external global [256 x i32] ; <[256 x i32]*> [#uses=4]

‎llvm/test/CodeGen/X86/min-legal-vector-width.ll

Lines changed: 11 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -1,14 +1,16 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2-
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=skylake-avx512 -mattr=prefer-256-bit | FileCheck %s --check-prefixes=CHECK,CHECK-SKX
3-
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=skylake-avx512 -mattr=prefer-256-bit,avx512vbmi | FileCheck %s --check-prefixes=CHECK,CHECK-SKX,CHECK-SKX-VBMI
2+
; ifndef INTEL_SYCL_OPAQUEPOINTER_READY
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; RUN: llc -opaque-pointers < %s -mtriple=x86_64-unknown-unknown -mcpu=skylake-avx512 -mattr=prefer-256-bit | FileCheck %s --check-prefixes=CHECK,CHECK-SKX
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; RUN: llc -opaque-pointers < %s -mtriple=x86_64-unknown-unknown -mcpu=skylake-avx512 -mattr=prefer-256-bit,avx512vbmi | FileCheck %s --check-prefixes=CHECK,CHECK-SKX,CHECK-SKX-VBMI
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; Make sure CPUs default to prefer-256-bit. avx512vnni isn't interesting as it just adds an isel peephole for vpmaddwd+vpaddd
5-
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=skylake-avx512 | FileCheck %s --check-prefixes=CHECK,CHECK-AVX512
6-
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=-avx512vnni -mcpu=cascadelake | FileCheck %s --check-prefixes=CHECK,CHECK-AVX512
7-
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=-avx512vnni -mcpu=cooperlake | FileCheck %s --check-prefixes=CHECK,CHECK-AVX512
8-
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=cannonlake | FileCheck %s --check-prefixes=CHECK,CHECK-VBMI
9-
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=-avx512vnni -mcpu=icelake-client | FileCheck %s --check-prefixes=CHECK,CHECK-VBMI
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=-avx512vnni -mcpu=icelake-server | FileCheck %s --check-prefixes=CHECK,CHECK-VBMI
11-
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=-avx512vnni -mcpu=tigerlake | FileCheck %s --check-prefixes=CHECK,CHECK-VBMI
6+
; RUN: llc -opaque-pointers < %s -mtriple=x86_64-unknown-unknown -mcpu=skylake-avx512 | FileCheck %s --check-prefixes=CHECK,CHECK-AVX512
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; RUN: llc -opaque-pointers < %s -mtriple=x86_64-unknown-unknown -mattr=-avx512vnni -mcpu=cascadelake | FileCheck %s --check-prefixes=CHECK,CHECK-AVX512
8+
; RUN: llc -opaque-pointers < %s -mtriple=x86_64-unknown-unknown -mattr=-avx512vnni -mcpu=cooperlake | FileCheck %s --check-prefixes=CHECK,CHECK-AVX512
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; RUN: llc -opaque-pointers < %s -mtriple=x86_64-unknown-unknown -mcpu=cannonlake | FileCheck %s --check-prefixes=CHECK,CHECK-VBMI
10+
; RUN: llc -opaque-pointers < %s -mtriple=x86_64-unknown-unknown -mattr=-avx512vnni -mcpu=icelake-client | FileCheck %s --check-prefixes=CHECK,CHECK-VBMI
11+
; RUN: llc -opaque-pointers < %s -mtriple=x86_64-unknown-unknown -mattr=-avx512vnni -mcpu=icelake-server | FileCheck %s --check-prefixes=CHECK,CHECK-VBMI
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; RUN: llc -opaque-pointers < %s -mtriple=x86_64-unknown-unknown -mattr=-avx512vnni -mcpu=tigerlake | FileCheck %s --check-prefixes=CHECK,CHECK-VBMI
13+
; end
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; This file primarily contains tests for specific places in X86ISelLowering.cpp that needed be made aware of the legalizer not allowing 512-bit vectors due to prefer-256-bit even though AVX512 is enabled.
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‎llvm/test/CodeGen/X86/sad.ll

Lines changed: 7 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,9 +1,11 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2-
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE2
3-
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
4-
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
5-
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512,AVX512F
6-
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX,AVX512,AVX512BW
2+
; ifndef INTEL_SYCL_OPAQUEPOINTER_READY
3+
; RUN: llc -opaque-pointers < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE2
4+
; RUN: llc -opaque-pointers < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
5+
; RUN: llc -opaque-pointers < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
6+
; RUN: llc -opaque-pointers < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512,AVX512F
7+
; RUN: llc -opaque-pointers < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX,AVX512,AVX512BW
8+
; end
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@a = dso_local global [1024 x i8] zeroinitializer, align 16
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@b = dso_local global [1024 x i8] zeroinitializer, align 16

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