Add support for read/write ocl builtins from cl_intel_subgroups_{char|long}

Link to PR with extension: KhronosGroup/OpenCL-Registry#79.

Author: aus-intel

llvm-spirv/lib/SPIRV/OCL20ToSPIRV.cpp

@@ -1597,6 +1597,29 @@ void OCL20ToSPIRV::visitCallKernelQuery(CallInst *CI, StringRef DemangledName) {
                  /*BuiltinFuncMangleInfo*/ nullptr, &Attrs);
 }
 
+// Add postfix to overloaded intel subgroup block read/write builtins
+// so new functions can be distinguished.
+static void processSubgroupBlockReadWriteINTEL(CallInst *CI,
+                                               OCLBuiltinTransInfo &Info,
+                                               const Type *DataTy, Module *M) {
+  unsigned VectorNumElements = 1;
+  if (DataTy->isVectorTy())
+    VectorNumElements = DataTy->getVectorNumElements();
+  unsigned ElementBitSize = DataTy->getScalarSizeInBits();
+  Info.Postfix = "_";
+  Info.Postfix +=
+      getIntelSubgroupBlockDataPostfix(ElementBitSize, VectorNumElements);
+  assert(CI->getCalledFunction() && "Unexpected indirect call");
+  AttributeList Attrs = CI->getCalledFunction()->getAttributes();
+  mutateCallInstSPIRV(
+      M, CI,
+      [&Info](CallInst *, std::vector<Value *> &Args) {
+        Info.PostProc(Args);
+        return Info.UniqName + Info.Postfix;
+      },
+      &Attrs);
+}
+
 // The intel_sub_group_block_read built-ins are overloaded to support both
 // buffers and images, but need to be mapped to distinct SPIR-V instructions.
 // Additionally, for block reads, need to distinguish between scalar block
@@ -1607,70 +1630,24 @@ void OCL20ToSPIRV::visitSubgroupBlockReadINTEL(CallInst *CI) {
     Info.UniqName = getSPIRVFuncName(spv::OpSubgroupImageBlockReadINTEL);
   else
     Info.UniqName = getSPIRVFuncName(spv::OpSubgroupBlockReadINTEL);
-  if (CI->getType()->isVectorTy()) {
-    switch (cast<VectorType>(CI->getType())->getNumElements()) {
-    case 2:
-      Info.Postfix = "_v2";
-      break;
-    case 4:
-      Info.Postfix = "_v4";
-      break;
-    case 8:
-      Info.Postfix = "_v8";
-      break;
-    default:
-      break;
-    }
-  }
-  if (CI->getType()->getScalarSizeInBits() == 16)
-    Info.Postfix += "_us";
-  else
-    Info.Postfix += "_ui";
-  assert(CI->getCalledFunction() && "Unexpected indirect call");
-  AttributeList Attrs = CI->getCalledFunction()->getAttributes();
-  mutateCallInstSPIRV(M, CI,
-                      [=](CallInst *, std::vector<Value *> &Args) {
-                        Info.PostProc(Args);
-                        return Info.UniqName + Info.Postfix;
-                      },
-                      &Attrs);
+  Type *DataTy = CI->getType();
+  processSubgroupBlockReadWriteINTEL(CI, Info, DataTy, M);
 }
 
 // The intel_sub_group_block_write built-ins are similarly overloaded to support
 // both buffers and images but need to be mapped to distinct SPIR-V
-// instructions. Since the type of data to be written is encoded in the mangled
-// name there is no need to do additional work to distinguish between scalar
-// block writes and vector block writes.
+// instructions.
 void OCL20ToSPIRV::visitSubgroupBlockWriteINTEL(CallInst *CI) {
   OCLBuiltinTransInfo Info;
   if (isOCLImageType(CI->getArgOperand(0)->getType()))
     Info.UniqName = getSPIRVFuncName(spv::OpSubgroupImageBlockWriteINTEL);
   else
     Info.UniqName = getSPIRVFuncName(spv::OpSubgroupBlockWriteINTEL);
-  unsigned NumArgs = CI->getNumArgOperands();
-  if (NumArgs && CI->getArgOperand(NumArgs - 1)->getType()->isVectorTy()) {
-    switch (cast<VectorType>(CI->getArgOperand(NumArgs - 1)->getType())->getNumElements()) {
-    case 2:
-      Info.Postfix = "_v2";
-      break;
-    case 4:
-      Info.Postfix = "_v4";
-      break;
-    case 8:
-      Info.Postfix = "_v8";
-      break;
-    default:
-      break;
-    }
-  }
-  assert(CI->getCalledFunction() && "Unexpected indirect call");
-  AttributeList Attrs = CI->getCalledFunction()->getAttributes();
-  mutateCallInstSPIRV(M, CI,
-                      [=](CallInst *, std::vector<Value *> &Args) {
-                        Info.PostProc(Args);
-                        return Info.UniqName + Info.Postfix;
-                      },
-                      &Attrs);
+  assert(!CI->arg_empty() &&
+         "Intel subgroup block write should have arguments");
+  unsigned DataArg = CI->getNumArgOperands() - 1;
+  Type *DataTy = CI->getArgOperand(DataArg)->getType();
+  processSubgroupBlockReadWriteINTEL(CI, Info, DataTy, M);
 }
 
 void OCL20ToSPIRV::visitSubgroupImageMediaBlockINTEL(CallInst *CI,

llvm-spirv/lib/SPIRV/OCLUtil.cpp

@@ -903,6 +903,46 @@ void checkFpContract(BinaryOperator *B, SPIRVBasicBlock *BB) {
     }
   }
 }
+
+std::string getIntelSubgroupBlockDataPostfix(unsigned ElementBitSize,
+                                             unsigned VectorNumElements) {
+  std::ostringstream OSS;
+  switch (ElementBitSize) {
+  case 8:
+    OSS << "_uc";
+    break;
+  case 16:
+    OSS << "_us";
+    break;
+  case 32:
+    // Intentionally does nothing since _ui variant is only an alias.
+    break;
+  case 64:
+    OSS << "_ul";
+    break;
+  default:
+    llvm_unreachable(
+        "Incorrect data bitsize for intel_subgroup_block builtins");
+  }
+  switch (VectorNumElements) {
+  case 1:
+    break;
+  case 2:
+  case 4:
+  case 8:
+    OSS << VectorNumElements;
+    break;
+  case 16:
+    assert(ElementBitSize == 8 &&
+           "16 elements vector allowed only for char builtins");
+    OSS << VectorNumElements;
+    break;
+  default:
+    llvm_unreachable(
+        "Incorrect vector length for intel_subgroup_block builtins");
+  }
+  return OSS.str();
+}
 } // namespace OCLUtil
 
 void llvm::mangleOpenClBuiltin(const std::string &UniqName,

llvm-spirv/lib/SPIRV/OCLUtil.h

@@ -437,6 +437,12 @@ template <typename T> std::string toString(const T *Object) {
   RSOS.flush();
   return S;
 }
+
+// Get data and vector size postfix for sugroup_block_{read|write} builtins
+// as specified by cl_intel_subgroups* extensions.
+// Scalar data assumed to be represented as vector of one element.
+std::string getIntelSubgroupBlockDataPostfix(unsigned ElementBitSize,
+                                             unsigned VectorNumElements);
 } // namespace OCLUtil
 
 ///////////////////////////////////////////////////////////////////////////////

llvm-spirv/lib/SPIRV/SPIRVReader.cpp

@@ -2818,14 +2818,12 @@ std::string SPIRVToLLVM::getOCLBuiltinName(SPIRVInstruction *BI) {
     default:
       return OCLSPIRVBuiltinMap::rmap(OC);
     }
-    if (DataTy) {
-      if (DataTy->getBitWidth() == 16)
-        Name << "_us";
-      if (DataTy->isTypeVector()) {
-        if (unsigned ComponentCount = DataTy->getVectorComponentCount())
-          Name << ComponentCount;
-      }
-    }
+    assert(DataTy && "Intel subgroup block builtins should have data type");
+    unsigned VectorNumElements = 1;
+    if (DataTy->isTypeVector())
+      VectorNumElements = DataTy->getVectorComponentCount();
+    unsigned ElementBitSize = DataTy->getBitWidth();
+    Name << getIntelSubgroupBlockDataPostfix(ElementBitSize, VectorNumElements);
     return Name.str();
   }
   if (isSubgroupAvcINTELInstructionOpCode(OC))