[SYCL][FPGA] Enhance document, add an alias to fpga_reg in namespace intelfpga

Signed-off-by: Domi Yan <[email protected]>

Author: domiyan

sycl/doc/extensions/intel_fpga/fpga_reg.md

@@ -1,6 +1,6 @@
 # FPGA reg
 
-Intel FPGA extension fpga_reg() is implemented in header file
+Intel FPGA extension `fpga_reg()` is implemented in header file
 `#include <CL/sycl/intel/fpga_extensions.hpp>`.
 
 fpga_reg is used to help compiler infer that at least one register is on the corresponding data path.

sycl/doc/extensions/intel_fpga/fpga_selector.md

@@ -13,7 +13,7 @@ one FPGA board installed in their system (one device per platform).
 #include <CL/sycl/intel/fpga_device_selector.hpp>
 ...
 // force FPGA hardware device
-cl::sycl::queue deviceQueue(cl::sycl::intel::fpga_selector{});
+cl::sycl::queue deviceQueue{cl::sycl::intel::fpga_selector{}};
 ...
 ```
 
@@ -22,6 +22,6 @@ cl::sycl::queue deviceQueue(cl::sycl::intel::fpga_selector{});
 #include <CL/sycl/intel/fpga_device_selector.hpp>
 ...
 // force FPGA emulation device
-cl::sycl::queue deviceQueue(cl::sycl::intel::fpga_emulator_selector{});
+cl::sycl::queue deviceQueue{cl::sycl::intel::fpga_emulator_selector{}};
 ...
 ```

sycl/include/CL/sycl/intel/fpga_device_selector.hpp

@@ -14,7 +14,7 @@ namespace cl {
 namespace sycl {
 namespace intel {
 
-class platform_selector : public default_selector {
+class platform_selector : public device_selector {
 private:
   std::string device_platform_name;
 

sycl/include/CL/sycl/intel/fpga_extensions.hpp

@@ -8,4 +8,4 @@
 
 #pragma once
 #include <CL/sycl/intel/fpga_device_selector.hpp>
-#include <CL/sycl/intel/fpga_reg.hpp>
+#include <CL/sycl/intel/fpga_reg.hpp>

sycl/include/CL/sycl/intel/fpga_reg.hpp

@@ -23,3 +23,11 @@ template <typename T> T fpga_reg(const T &t) {
 } // namespace intel
 } // namespace sycl
 } // namespace cl
+
+// Keep it consistent with FPGA attributes like intelfpga::memory()
+// Currently clang does not support nested namespace for attributes
+namespace intelfpga {
+template <typename T> T fpga_reg(const T &t) {
+	return cl::sycl::intel::fpga_reg(t);
+}	
+}