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Revert some of the last changes
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‎sycl/include/sycl/ext/intel/esimd/memory.hpp

Lines changed: 41 additions & 40 deletions
Original file line numberDiff line numberDiff line change
@@ -5662,10 +5662,10 @@ atomic_update(Tx *p, Toffset byte_offset, simd<Tx, N> src0, simd<Tx, N> src1,
56625662
/// @brief No-argument variant of the atomic update operation.
56635663
///
56645664
/// simd<T, N>
5665-
/// atomic_update(AccessorT acc, simd<OffsetObjT, N> byte_offset,
5665+
/// atomic_update(AccessorT acc, simd<Toffset, N> byte_offset,
56665666
/// simd_mask<N> mask, props = {}); /// (acc-au0-1)
56675667
/// simd<T, N>
5668-
/// atomic_update(AccessorT acc, simd<OffsetObjT, N> byte_offset,
5668+
/// atomic_update(AccessorT acc, simd<Toffset, N> byte_offset,
56695669
/// props = {}); /// (acc-au0-2)
56705670
/// simd<T, N>
56715671
/// atomic_update(AccessorT acc, simd_view<OffsetObjT, RegionTy> byte_offset,
@@ -5674,10 +5674,11 @@ atomic_update(Tx *p, Toffset byte_offset, simd<Tx, N> src0, simd<Tx, N> src1,
56745674
/// atomic_update(AccessorT acc, simd_view<OffsetObjT, RegionTy> byte_offset,
56755675
/// props = {}); /// (acc-au0-4)
56765676
///
5677+
56775678
/// Usage of cache hints or non-standard operation width N requires DG2 or PVC.
56785679
///
56795680
/// simd<T, N>
5680-
/// atomic_update(AccessorT acc, simd<OffsetObjT, N> byte_offset,
5681+
/// atomic_update(AccessorT acc, simd<Toffset, N> byte_offset,
56815682
/// simd_mask<N> mask, props = {}); /// (acc-au0-1)
56825683
///
56835684
/// Atomically updates \c N memory locations represented by an accessor and
@@ -5702,7 +5703,7 @@ atomic_update(Tx *p, Toffset byte_offset, simd<Tx, N> src0, simd<Tx, N> src1,
57025703
/// @return A vector of the old values at the memory locations before the
57035704
/// update.
57045705
///
5705-
template <atomic_op Op, typename T, int N, typename OffsetObjT,
5706+
template <atomic_op Op, typename T, int N, typename Toffset,
57065707
typename AccessorTy,
57075708
typename PropertyListT =
57085709
ext::oneapi::experimental::detail::empty_properties_t>
@@ -5711,8 +5712,8 @@ __ESIMD_API std::enable_if_t<
57115712
__ESIMD_DNS::is_rw_device_accessor_v<AccessorTy> &&
57125713
ext::oneapi::experimental::is_property_list_v<PropertyListT>,
57135714
simd<T, N>>
5714-
atomic_update(AccessorTy acc, simd<OffsetObjT, N> byte_offset,
5715-
simd_mask<N> mask, PropertyListT props = {}) {
5715+
atomic_update(AccessorTy acc, simd<Toffset, N> byte_offset, simd_mask<N> mask,
5716+
PropertyListT props = {}) {
57165717
#ifdef __ESIMD_FORCE_STATELESS_MEM
57175718
return atomic_update<Op, T, N>(__ESIMD_DNS::accessorToPointer<T>(acc),
57185719
byte_offset, mask, props);
@@ -5727,7 +5728,7 @@ atomic_update(AccessorTy acc, simd<OffsetObjT, N> byte_offset,
57275728
"L3 cache hint is reserved. The old/experimental L3 LSC cache "
57285729
"hint is cache_level::L2 now.");
57295730

5730-
static_assert(std::is_integral_v<OffsetObjT>, "Unsupported offset type");
5731+
static_assert(std::is_integral_v<Toffset>, "Unsupported offset type");
57315732

57325733
if constexpr (L1Hint != cache_hint::none || L2Hint != cache_hint::none ||
57335734
!detail::isPowerOf2(N, 32)) {
@@ -5747,7 +5748,7 @@ atomic_update(AccessorTy acc, simd<OffsetObjT, N> byte_offset,
57475748
}
57485749
} else {
57495750
detail::check_atomic<Op, T, N, 0>();
5750-
static_assert(sizeof(OffsetObjT) == 4, "Only 32 bit offset is supported");
5751+
static_assert(sizeof(Toffset) == 4, "Only 32 bit offset is supported");
57515752

57525753
static_assert(sizeof(T) == 4, "Only 32 bit data is supported");
57535754
const auto si = get_surface_index(acc);
@@ -5779,7 +5780,7 @@ atomic_update(AccessorTy acc, simd<OffsetObjT, N> byte_offset,
57795780
/// @return A vector of the old values at the memory locations before the
57805781
/// update.
57815782
///
5782-
template <atomic_op Op, typename T, int N, typename OffsetObjT,
5783+
template <atomic_op Op, typename T, int N, typename Toffset,
57835784
typename AccessorTy,
57845785
typename PropertyListT =
57855786
ext::oneapi::experimental::detail::empty_properties_t>
@@ -5788,7 +5789,7 @@ __ESIMD_API std::enable_if_t<
57885789
__ESIMD_DNS::is_rw_device_accessor_v<AccessorTy> &&
57895790
ext::oneapi::experimental::is_property_list_v<PropertyListT>,
57905791
simd<T, N>>
5791-
atomic_update(AccessorTy acc, simd<OffsetObjT, N> byte_offset,
5792+
atomic_update(AccessorTy acc, simd<Toffset, N> byte_offset,
57925793
PropertyListT props = {}) {
57935794
simd_mask<N> mask = 1;
57945795
return atomic_update<Op, T, N>(acc, byte_offset, mask, props);
@@ -5884,14 +5885,14 @@ atomic_update(AccessorTy acc, simd_view<OffsetObjT, RegionTy> byte_offset,
58845885
/// @return A vector of the old values at the memory locations before the
58855886
/// update.
58865887
///
5887-
template <atomic_op Op, typename T, int N, typename OffsetObjT,
5888+
template <atomic_op Op, typename T, int N, typename Toffset,
58885889
typename AccessorTy>
58895890
__ESIMD_API
58905891
std::enable_if_t<__ESIMD_DNS::get_num_args<Op>() == 0 &&
58915892
__ESIMD_DNS::is_rw_device_accessor_v<AccessorTy>,
58925893
simd<T, N>>
5893-
atomic_update(AccessorTy acc, OffsetObjT byte_offset, simd_mask<N> mask) {
5894-
return atomic_update<Op, T, N>(acc, simd<OffsetObjT, N>(byte_offset), mask);
5894+
atomic_update(AccessorTy acc, Toffset byte_offset, simd_mask<N> mask) {
5895+
return atomic_update<Op, T, N>(acc, simd<Toffset, N>(byte_offset), mask);
58955896
}
58965897

58975898
/// A variation of \c atomic_update API with \p byte_offset represented as
@@ -5925,10 +5926,10 @@ __ESIMD_API
59255926
/// @brief Single-argument variant of the atomic update operation.
59265927
///
59275928
/// simd<T, N>
5928-
/// atomic_update(AccessorT acc, simd<OffsetObjT, N> byte_offset,
5929+
/// atomic_update(AccessorT acc, simd<Toffset, N> byte_offset,
59295930
/// simd<T, N> src0, simd_mask<N> mask, props = {});//(acc-au1-1)
59305931
/// simd<T, N>
5931-
/// atomic_update(AccessorT acc, simd<OffsetObjT, N> byte_offset,
5932+
/// atomic_update(AccessorT acc, simd<Toffset, N> byte_offset,
59325933
/// simd<T, N> src0, props = {}); // (acc-au1-2)
59335934
///
59345935
/// simd<T, N>
@@ -5944,7 +5945,7 @@ __ESIMD_API
59445945
///
59455946

59465947
/// simd<T, N>
5947-
/// atomic_update(AccessorT acc, simd<OffsetObjT, N> byte_offset,
5948+
/// atomic_update(AccessorT acc, simd<Toffset, N> byte_offset,
59485949
/// simd<T, N> src0, simd_mask<N> mask, props = {});//(acc-au1-1)
59495950
///
59505951
/// Atomically updates \c N memory locations represented by an accessor and
@@ -5975,7 +5976,7 @@ __ESIMD_API
59755976
/// update.
59765977
///
59775978

5978-
template <atomic_op Op, typename T, int N, typename OffsetObjT,
5979+
template <atomic_op Op, typename T, int N, typename Toffset,
59795980
typename AccessorTy,
59805981
typename PropertyListT =
59815982
ext::oneapi::experimental::detail::empty_properties_t>
@@ -5984,7 +5985,7 @@ __ESIMD_API std::enable_if_t<
59845985
__ESIMD_DNS::is_rw_device_accessor_v<AccessorTy> &&
59855986
ext::oneapi::experimental::is_property_list_v<PropertyListT>,
59865987
simd<T, N>>
5987-
atomic_update(AccessorTy acc, simd<OffsetObjT, N> byte_offset, simd<T, N> src0,
5988+
atomic_update(AccessorTy acc, simd<Toffset, N> byte_offset, simd<T, N> src0,
59885989
simd_mask<N> mask, PropertyListT props = {}) {
59895990
#ifdef __ESIMD_FORCE_STATELESS_MEM
59905991
return atomic_update<Op, T, N>(__ESIMD_DNS::accessorToPointer<T>(acc),
@@ -6001,8 +6002,8 @@ atomic_update(AccessorTy acc, simd<OffsetObjT, N> byte_offset, simd<T, N> src0,
60016002
static_assert(!PropertyListT::template has_property<cache_hint_L3_key>(),
60026003
"L3 cache hint is reserved. The old/experimental L3 LSC cache "
60036004
"hint is cache_level::L2 now.");
6004-
static_assert(std::is_integral_v<OffsetObjT>, "Unsupported offset type");
6005-
static_assert(sizeof(OffsetObjT) == 4, "Only 32 bit offset is supported");
6005+
static_assert(std::is_integral_v<Toffset>, "Unsupported offset type");
6006+
static_assert(sizeof(Toffset) == 4, "Only 32 bit offset is supported");
60066007
// Auto-convert FP atomics to LSC version.
60076008
if constexpr (L1Hint != cache_hint::none || L2Hint != cache_hint::none ||
60086009
Op == atomic_op::fmin || Op == atomic_op::fmax ||
@@ -6034,7 +6035,7 @@ atomic_update(AccessorTy acc, simd<OffsetObjT, N> byte_offset, simd<T, N> src0,
60346035
}
60356036

60366037
/// simd<T, N>
6037-
/// atomic_update(AccessorT acc, simd<OffsetObjT, N> byte_offset,
6038+
/// atomic_update(AccessorT acc, simd<Toffset, N> byte_offset,
60386039
/// simd<T, N> src0, props = {}); // (acc-au1-2)
60396040
///
60406041
/// A variation of \c atomic_update API with no mask operand.
@@ -6064,7 +6065,7 @@ atomic_update(AccessorTy acc, simd<OffsetObjT, N> byte_offset, simd<T, N> src0,
60646065
/// @return A vector of the old values at the memory locations before the
60656066
/// update.
60666067
///
6067-
template <atomic_op Op, typename T, int N, typename OffsetObjT,
6068+
template <atomic_op Op, typename T, int N, typename Toffset,
60686069
typename AccessorTy,
60696070
typename PropertyListT =
60706071
ext::oneapi::experimental::detail::empty_properties_t>
@@ -6073,7 +6074,7 @@ __ESIMD_API std::enable_if_t<
60736074
__ESIMD_DNS::is_rw_device_accessor_v<AccessorTy> &&
60746075
ext::oneapi::experimental::is_property_list_v<PropertyListT>,
60756076
simd<T, N>>
6076-
atomic_update(AccessorTy acc, simd<OffsetObjT, N> byte_offset, simd<T, N> src0,
6077+
atomic_update(AccessorTy acc, simd<Toffset, N> byte_offset, simd<T, N> src0,
60776078
PropertyListT props = {}) {
60786079
simd_mask<N> mask = 1;
60796080
return atomic_update<Op, T, N>(acc, byte_offset, src0, mask, props);
@@ -6191,15 +6192,15 @@ atomic_update(AccessorTy acc, simd_view<OffsetObjT, RegionTy> byte_offset,
61916192
/// @return A vector of the old values at the memory locations before the
61926193
/// update.
61936194
///
6194-
template <atomic_op Op, typename Tx, int N, typename OffsetObjT,
6195+
template <atomic_op Op, typename Tx, int N, typename Toffset,
61956196
typename AccessorTy>
61966197
__ESIMD_API std::enable_if_t<
61976198
__ESIMD_DNS::is_rw_device_accessor_v<AccessorTy> &&
61986199
((Op != atomic_op::store && Op != atomic_op::xchg) || N == 1),
61996200
simd<Tx, N>>
6200-
atomic_update(AccessorTy acc, OffsetObjT offset, simd<Tx, N> src0,
6201+
atomic_update(AccessorTy acc, Toffset offset, simd<Tx, N> src0,
62016202
simd_mask<N> mask) {
6202-
return atomic_update<Op, Tx, N>(acc, simd<OffsetObjT, N>(offset), src0, mask);
6203+
return atomic_update<Op, Tx, N>(acc, simd<Toffset, N>(offset), src0, mask);
62036204
}
62046205

62056206
/// A variation of \c atomic_update API with \c offset represented as
@@ -6235,12 +6236,12 @@ atomic_update(AccessorTy acc, uint32_t offset, simd<Tx, N> src0,
62356236
/// @brief Two-argument variant of the atomic update operation.
62366237
///
62376238
/// simd<T, N>
6238-
/// atomic_update(AccessorTy acc, simd<OffsetObjT, N> byte_offset,
6239+
/// atomic_update(AccessorTy acc, simd<Toffset, N> byte_offset,
62396240
/// simd<T, N> src0, simd<T, N> src1,
62406241
// simd_mask<N> mask,props = {}); // (acc-au2-1)
62416242
///
62426243
/// simd<T, N>
6243-
/// atomic_update(AccessorTy acc, simd<OffsetObjT, N> byte_offset,
6244+
/// atomic_update(AccessorTy acc, simd<Toffset, N> byte_offset,
62446245
/// simd<T, N> src0, simd<T, N> src1,
62456246
/// props = {}); // (acc-au2-2)
62466247
/// simd<T, N>
@@ -6255,7 +6256,7 @@ atomic_update(AccessorTy acc, uint32_t offset, simd<Tx, N> src0,
62556256
///
62566257

62576258
/// simd<T, N>
6258-
/// atomic_update(AccessorTy acc, simd<OffsetObjT, N> byte_offset,
6259+
/// atomic_update(AccessorTy acc, simd<Toffset, N> byte_offset,
62596260
/// simd<T, N> src0, simd<T, N> src1,
62606261
// simd_mask<N> mask,props = {}); // (acc-au2-1)
62616262
///
@@ -6284,16 +6285,16 @@ atomic_update(AccessorTy acc, uint32_t offset, simd<Tx, N> src0,
62846285
/// @return A vector of the old values at the memory locations before the
62856286
/// update.
62866287
///
6287-
template <atomic_op Op, typename T, int N, typename OffsetObjT,
6288+
template <atomic_op Op, typename T, int N, typename Toffset,
62886289
typename AccessorTy,
62896290
typename PropertyListT =
62906291
ext::oneapi::experimental::detail::empty_properties_t>
62916292
__ESIMD_API std::enable_if_t<
6292-
__ESIMD_DNS::get_num_args<Op>() == 2 && std::is_integral_v<OffsetObjT> &&
6293+
__ESIMD_DNS::get_num_args<Op>() == 2 && std::is_integral_v<Toffset> &&
62936294
__ESIMD_DNS::is_rw_device_accessor_v<AccessorTy> &&
62946295
ext::oneapi::experimental::is_property_list_v<PropertyListT>,
62956296
simd<T, N>>
6296-
atomic_update(AccessorTy acc, simd<OffsetObjT, N> byte_offset, simd<T, N> src0,
6297+
atomic_update(AccessorTy acc, simd<Toffset, N> byte_offset, simd<T, N> src0,
62976298
simd<T, N> src1, simd_mask<N> mask, PropertyListT props = {}) {
62986299
#ifdef __ESIMD_FORCE_STATELESS_MEM
62996300
return atomic_update<Op, T, N>(__ESIMD_DNS::accessorToPointer<T>(acc),
@@ -6310,8 +6311,8 @@ atomic_update(AccessorTy acc, simd<OffsetObjT, N> byte_offset, simd<T, N> src0,
63106311
static_assert(!PropertyListT::template has_property<cache_hint_L3_key>(),
63116312
"L3 cache hint is reserved. The old/experimental L3 LSC cache "
63126313
"hint is cache_level::L2 now.");
6313-
static_assert(std::is_integral_v<OffsetObjT>, "Unsupported offset type");
6314-
static_assert(sizeof(OffsetObjT) == 4, "Only 32 bit offset is supported");
6314+
static_assert(std::is_integral_v<Toffset>, "Unsupported offset type");
6315+
static_assert(sizeof(Toffset) == 4, "Only 32 bit offset is supported");
63156316
// Use LSC atomic when cache hints are present, FP atomics is used,
63166317
// non-power of two length is used, or operation width greater than 32.
63176318
if constexpr (L1Hint != cache_hint::none || L2Hint != cache_hint::none ||
@@ -6336,7 +6337,7 @@ atomic_update(AccessorTy acc, simd<OffsetObjT, N> byte_offset, simd<T, N> src0,
63366337
}
63376338

63386339
/// simd<T, N>
6339-
/// atomic_update(AccessorTy acc, simd<OffsetObjT, N> byte_offset,
6340+
/// atomic_update(AccessorTy acc, simd<Toffset, N> byte_offset,
63406341
/// simd<T, N> src0, simd<T, N> src1,
63416342
/// props = {}); // (acc-au2-2)
63426343
///
@@ -6356,7 +6357,7 @@ atomic_update(AccessorTy acc, simd<OffsetObjT, N> byte_offset, simd<T, N> src0,
63566357
/// @return A vector of the old values at the memory locations before the
63576358
/// update.
63586359
///
6359-
template <atomic_op Op, typename T, int N, typename OffsetObjT,
6360+
template <atomic_op Op, typename T, int N, typename Toffset,
63606361
typename AccessorTy,
63616362
typename PropertyListT =
63626363
ext::oneapi::experimental::detail::empty_properties_t>
@@ -6365,7 +6366,7 @@ __ESIMD_API std::enable_if_t<
63656366
__ESIMD_DNS::is_rw_device_accessor_v<AccessorTy> &&
63666367
ext::oneapi::experimental::is_property_list_v<PropertyListT>,
63676368
simd<T, N>>
6368-
atomic_update(AccessorTy acc, simd<OffsetObjT, N> byte_offset, simd<T, N> src0,
6369+
atomic_update(AccessorTy acc, simd<Toffset, N> byte_offset, simd<T, N> src0,
63696370
simd<T, N> src1, PropertyListT props = {}) {
63706371
simd_mask<N> mask = 1;
63716372
return atomic_update<Op, T, N>(acc, byte_offset, src0, src1, mask, props);
@@ -6467,13 +6468,13 @@ atomic_update(AccessorTy acc, simd_view<OffsetObjT, OffsetRegionTy> byte_offset,
64676468
/// @return A vector of the old values at the memory locations before the
64686469
/// update.
64696470
///
6470-
template <atomic_op Op, typename Tx, int N, typename OffsetObjT,
6471+
template <atomic_op Op, typename Tx, int N, typename Toffset,
64716472
typename AccessorTy>
64726473
__ESIMD_API std::enable_if_t<__ESIMD_DNS::is_rw_device_accessor_v<AccessorTy>,
64736474
simd<Tx, N>>
6474-
atomic_update(AccessorTy acc, OffsetObjT offset, simd<Tx, N> src0,
6475+
atomic_update(AccessorTy acc, Toffset offset, simd<Tx, N> src0,
64756476
simd<Tx, N> src1, simd_mask<N> mask) {
6476-
return atomic_update<Op, Tx, N>(acc, simd<OffsetObjT, N>(offset), src0, src1,
6477+
return atomic_update<Op, Tx, N>(acc, simd<Toffset, N>(offset), src0, src1,
64776478
mask);
64786479
}
64796480

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